linux_dsm_epyc7002/arch/arm/include
Dietmar Eggemann 02051ead97 ARM: coresight: common definition for (OS) Lock Access Register key value
Coresight components and debug are using a common lock control mechansim.
Writing 0xC5ACCE55 to the Lock Access Register (LAR) in case of a coresight
components enables further access to the coresight device registers. Writing
any other value to it removes the write access.
Writing 0xC5ACCE55 to the OS Lock Access Register (OSLAR) in case of debug
locks the debug register for further access to the debug registers. Writing
any other value to it unlocks the debug registers.

Unfortunately, the existing coresight code uses the terms lock and unlock the
other way around. Unlocking stands for enabling write access and locking for
removing write access.

That is why the definition of the LAR and OSLAR key value has been changed to
CS_LAR_KEY.

Signed-off-by: Dietmar Eggemann <dietmar.eggemann@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2013-01-10 21:13:05 +00:00
..
asm ARM: coresight: common definition for (OS) Lock Access Register key value 2013-01-10 21:13:05 +00:00
debug ARM: arm-soc: multiplatform conversion patches 2012-12-13 10:57:16 -08:00
uapi/asm Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/signal 2012-12-20 18:05:28 -08:00