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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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277efd30cf
On r8a7791 the hardware boot mode bit MD21 indicates if hardware debug mode is enabled or not. In case hardware debug mode is enabled print a warning and refrain from booting secondary CPU cores. Without this patch Koelsch with SW8-4 set to OFF will hang at SMP boot. Signed-off-by: Magnus Damm <damm@opensource.se> Tested-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
76 lines
2.2 KiB
C
76 lines
2.2 KiB
C
/*
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* SMP support for r8a7791
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*
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* Copyright (C) 2013 Renesas Solutions Corp.
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* Copyright (C) 2013 Magnus Damm
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <linux/io.h>
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#include <asm/smp_plat.h>
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#include <mach/common.h>
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#include <mach/r8a7791.h>
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#include <mach/rcar-gen2.h>
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#define RST 0xe6160000
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#define CA15BAR 0x0020
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#define CA15RESCNT 0x0040
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#define RAM 0xe6300000
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static void __init r8a7791_smp_prepare_cpus(unsigned int max_cpus)
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{
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void __iomem *p;
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u32 bar;
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/* let APMU code install data related to shmobile_boot_vector */
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shmobile_smp_apmu_prepare_cpus(max_cpus);
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/* RAM for jump stub, because BAR requires 256KB aligned address */
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p = ioremap_nocache(RAM, shmobile_boot_size);
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memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
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iounmap(p);
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/* setup reset vectors */
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p = ioremap_nocache(RST, 0x63);
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bar = (RAM >> 8) & 0xfffffc00;
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writel_relaxed(bar, p + CA15BAR);
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writel_relaxed(bar | 0x10, p + CA15BAR);
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/* enable clocks to all CPUs */
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writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) | 0xa5a50000,
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p + CA15RESCNT);
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iounmap(p);
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}
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static int r8a7791_smp_boot_secondary(unsigned int cpu,
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struct task_struct *idle)
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{
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/* Error out when hardware debug mode is enabled */
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if (rcar_gen2_read_mode_pins() & BIT(21)) {
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pr_warn("Unable to boot CPU%u when MD21 is set\n", cpu);
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return -ENOTSUPP;
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}
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return shmobile_smp_apmu_boot_secondary(cpu, idle);
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}
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struct smp_operations r8a7791_smp_ops __initdata = {
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.smp_prepare_cpus = r8a7791_smp_prepare_cpus,
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.smp_boot_secondary = r8a7791_smp_boot_secondary,
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#ifdef CONFIG_HOTPLUG_CPU
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.cpu_disable = shmobile_smp_cpu_disable,
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.cpu_die = shmobile_smp_apmu_cpu_die,
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.cpu_kill = shmobile_smp_apmu_cpu_kill,
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#endif
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};
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