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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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f24fcff1d2
This patch adds support of hardware semaphores for stm32mp1 SoC. The hardware block provides 32 semaphores. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
71 lines
1.8 KiB
Plaintext
71 lines
1.8 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0
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#
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# Generic HWSPINLOCK framework
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#
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menuconfig HWSPINLOCK
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bool "Hardware Spinlock drivers"
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config HWSPINLOCK_OMAP
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tristate "OMAP Hardware Spinlock device"
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depends on HWSPINLOCK
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depends on ARCH_OMAP4 || SOC_OMAP5 || SOC_DRA7XX || SOC_AM33XX || SOC_AM43XX
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help
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Say y here to support the OMAP Hardware Spinlock device (firstly
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introduced in OMAP4).
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If unsure, say N.
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config HWSPINLOCK_QCOM
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tristate "Qualcomm Hardware Spinlock device"
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depends on HWSPINLOCK
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depends on ARCH_QCOM
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select MFD_SYSCON
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help
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Say y here to support the Qualcomm Hardware Mutex functionality, which
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provides a synchronisation mechanism for the various processors on
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the SoC.
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If unsure, say N.
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config HWSPINLOCK_SIRF
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tristate "SIRF Hardware Spinlock device"
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depends on HWSPINLOCK
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depends on ARCH_SIRF
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help
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Say y here to support the SIRF Hardware Spinlock device, which
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provides a synchronisation mechanism for the various processors
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on the SoC.
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It's safe to say n here if you're not interested in SIRF hardware
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spinlock or just want a bare minimum kernel.
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config HWSPINLOCK_SPRD
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tristate "SPRD Hardware Spinlock device"
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depends on ARCH_SPRD
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depends on HWSPINLOCK
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help
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Say y here to support the SPRD Hardware Spinlock device.
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If unsure, say N.
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config HWSPINLOCK_STM32
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tristate "STM32 Hardware Spinlock device"
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depends on MACH_STM32MP157
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depends on HWSPINLOCK
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help
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Say y here to support the STM32 Hardware Spinlock device.
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If unsure, say N.
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config HSEM_U8500
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tristate "STE Hardware Semaphore functionality"
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depends on HWSPINLOCK
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depends on ARCH_U8500
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help
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Say y here to support the STE Hardware Semaphore functionality, which
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provides a synchronisation mechanism for the various processor on the
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SoC.
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If unsure, say N.
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