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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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6fdc037094
The DMA mapping API cannot map on-stack addresses, as explained in Documentation/DMA-mapping.txt. Convert the two cases of on-stack packet payload buffers in firewire-core (payload of lock requests in the bus manager work and in iso resource management) to slab-allocated memory. There are a number on-stack buffers for quadlet write or quadlet read requests in firewire-core and firewire-sbp2. These are harmless; they are copied to/ from card driver internal DMA buffers since quadlet payloads are inlined with packet headers. Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
568 lines
15 KiB
C
568 lines
15 KiB
C
/*
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* Copyright (C) 2005-2007 Kristian Hoegsberg <krh@bitplanet.net>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software Foundation,
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* Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#include <linux/bug.h>
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#include <linux/completion.h>
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#include <linux/crc-itu-t.h>
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#include <linux/device.h>
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#include <linux/errno.h>
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#include <linux/firewire.h>
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#include <linux/firewire-constants.h>
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#include <linux/jiffies.h>
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#include <linux/kernel.h>
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#include <linux/kref.h>
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#include <linux/list.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/spinlock.h>
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#include <linux/timer.h>
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#include <linux/workqueue.h>
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#include <asm/atomic.h>
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#include <asm/byteorder.h>
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#include "core.h"
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int fw_compute_block_crc(u32 *block)
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{
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__be32 be32_block[256];
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int i, length;
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length = (*block >> 16) & 0xff;
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for (i = 0; i < length; i++)
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be32_block[i] = cpu_to_be32(block[i + 1]);
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*block |= crc_itu_t(0, (u8 *) be32_block, length * 4);
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return length;
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}
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static DEFINE_MUTEX(card_mutex);
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static LIST_HEAD(card_list);
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static LIST_HEAD(descriptor_list);
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static int descriptor_count;
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#define BIB_CRC(v) ((v) << 0)
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#define BIB_CRC_LENGTH(v) ((v) << 16)
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#define BIB_INFO_LENGTH(v) ((v) << 24)
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#define BIB_LINK_SPEED(v) ((v) << 0)
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#define BIB_GENERATION(v) ((v) << 4)
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#define BIB_MAX_ROM(v) ((v) << 8)
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#define BIB_MAX_RECEIVE(v) ((v) << 12)
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#define BIB_CYC_CLK_ACC(v) ((v) << 16)
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#define BIB_PMC ((1) << 27)
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#define BIB_BMC ((1) << 28)
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#define BIB_ISC ((1) << 29)
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#define BIB_CMC ((1) << 30)
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#define BIB_IMC ((1) << 31)
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static u32 *generate_config_rom(struct fw_card *card, size_t *config_rom_length)
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{
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struct fw_descriptor *desc;
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static u32 config_rom[256];
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int i, j, length;
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/*
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* Initialize contents of config rom buffer. On the OHCI
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* controller, block reads to the config rom accesses the host
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* memory, but quadlet read access the hardware bus info block
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* registers. That's just crack, but it means we should make
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* sure the contents of bus info block in host memory matches
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* the version stored in the OHCI registers.
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*/
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memset(config_rom, 0, sizeof(config_rom));
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config_rom[0] = BIB_CRC_LENGTH(4) | BIB_INFO_LENGTH(4) | BIB_CRC(0);
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config_rom[1] = 0x31333934;
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config_rom[2] =
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BIB_LINK_SPEED(card->link_speed) |
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BIB_GENERATION(card->config_rom_generation++ % 14 + 2) |
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BIB_MAX_ROM(2) |
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BIB_MAX_RECEIVE(card->max_receive) |
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BIB_BMC | BIB_ISC | BIB_CMC | BIB_IMC;
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config_rom[3] = card->guid >> 32;
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config_rom[4] = card->guid;
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/* Generate root directory. */
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i = 5;
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config_rom[i++] = 0;
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config_rom[i++] = 0x0c0083c0; /* node capabilities */
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j = i + descriptor_count;
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/* Generate root directory entries for descriptors. */
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list_for_each_entry (desc, &descriptor_list, link) {
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if (desc->immediate > 0)
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config_rom[i++] = desc->immediate;
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config_rom[i] = desc->key | (j - i);
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i++;
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j += desc->length;
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}
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/* Update root directory length. */
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config_rom[5] = (i - 5 - 1) << 16;
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/* End of root directory, now copy in descriptors. */
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list_for_each_entry (desc, &descriptor_list, link) {
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memcpy(&config_rom[i], desc->data, desc->length * 4);
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i += desc->length;
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}
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/* Calculate CRCs for all blocks in the config rom. This
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* assumes that CRC length and info length are identical for
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* the bus info block, which is always the case for this
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* implementation. */
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for (i = 0; i < j; i += length + 1)
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length = fw_compute_block_crc(config_rom + i);
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*config_rom_length = j;
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return config_rom;
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}
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static void update_config_roms(void)
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{
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struct fw_card *card;
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u32 *config_rom;
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size_t length;
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list_for_each_entry (card, &card_list, link) {
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config_rom = generate_config_rom(card, &length);
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card->driver->set_config_rom(card, config_rom, length);
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}
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}
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int fw_core_add_descriptor(struct fw_descriptor *desc)
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{
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size_t i;
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/*
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* Check descriptor is valid; the length of all blocks in the
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* descriptor has to add up to exactly the length of the
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* block.
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*/
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i = 0;
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while (i < desc->length)
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i += (desc->data[i] >> 16) + 1;
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if (i != desc->length)
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return -EINVAL;
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mutex_lock(&card_mutex);
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list_add_tail(&desc->link, &descriptor_list);
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descriptor_count++;
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if (desc->immediate > 0)
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descriptor_count++;
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update_config_roms();
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mutex_unlock(&card_mutex);
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return 0;
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}
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EXPORT_SYMBOL(fw_core_add_descriptor);
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void fw_core_remove_descriptor(struct fw_descriptor *desc)
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{
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mutex_lock(&card_mutex);
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list_del(&desc->link);
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descriptor_count--;
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if (desc->immediate > 0)
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descriptor_count--;
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update_config_roms();
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mutex_unlock(&card_mutex);
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}
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EXPORT_SYMBOL(fw_core_remove_descriptor);
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static void allocate_broadcast_channel(struct fw_card *card, int generation)
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{
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int channel, bandwidth = 0;
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fw_iso_resource_manage(card, generation, 1ULL << 31, &channel,
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&bandwidth, true, card->bm_transaction_data);
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if (channel == 31) {
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card->broadcast_channel_allocated = true;
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device_for_each_child(card->device, (void *)(long)generation,
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fw_device_set_broadcast_channel);
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}
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}
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static const char gap_count_table[] = {
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63, 5, 7, 8, 10, 13, 16, 18, 21, 24, 26, 29, 32, 35, 37, 40
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};
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void fw_schedule_bm_work(struct fw_card *card, unsigned long delay)
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{
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int scheduled;
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fw_card_get(card);
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scheduled = schedule_delayed_work(&card->work, delay);
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if (!scheduled)
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fw_card_put(card);
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}
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static void fw_card_bm_work(struct work_struct *work)
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{
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struct fw_card *card = container_of(work, struct fw_card, work.work);
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struct fw_device *root_device;
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struct fw_node *root_node;
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unsigned long flags;
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int root_id, new_root_id, irm_id, local_id;
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int gap_count, generation, grace, rcode;
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bool do_reset = false;
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bool root_device_is_running;
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bool root_device_is_cmc;
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spin_lock_irqsave(&card->lock, flags);
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if (card->local_node == NULL) {
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spin_unlock_irqrestore(&card->lock, flags);
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goto out_put_card;
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}
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generation = card->generation;
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root_node = card->root_node;
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fw_node_get(root_node);
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root_device = root_node->data;
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root_device_is_running = root_device &&
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atomic_read(&root_device->state) == FW_DEVICE_RUNNING;
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root_device_is_cmc = root_device && root_device->cmc;
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root_id = root_node->node_id;
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irm_id = card->irm_node->node_id;
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local_id = card->local_node->node_id;
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grace = time_after(jiffies, card->reset_jiffies + DIV_ROUND_UP(HZ, 8));
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if (is_next_generation(generation, card->bm_generation) ||
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(card->bm_generation != generation && grace)) {
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/*
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* This first step is to figure out who is IRM and
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* then try to become bus manager. If the IRM is not
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* well defined (e.g. does not have an active link
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* layer or does not responds to our lock request, we
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* will have to do a little vigilante bus management.
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* In that case, we do a goto into the gap count logic
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* so that when we do the reset, we still optimize the
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* gap count. That could well save a reset in the
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* next generation.
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*/
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if (!card->irm_node->link_on) {
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new_root_id = local_id;
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fw_notify("IRM has link off, making local node (%02x) root.\n",
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new_root_id);
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goto pick_me;
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}
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card->bm_transaction_data[0] = cpu_to_be32(0x3f);
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card->bm_transaction_data[1] = cpu_to_be32(local_id);
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spin_unlock_irqrestore(&card->lock, flags);
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rcode = fw_run_transaction(card, TCODE_LOCK_COMPARE_SWAP,
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irm_id, generation, SCODE_100,
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CSR_REGISTER_BASE + CSR_BUS_MANAGER_ID,
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card->bm_transaction_data,
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sizeof(card->bm_transaction_data));
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if (rcode == RCODE_GENERATION)
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/* Another bus reset, BM work has been rescheduled. */
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goto out;
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if (rcode == RCODE_COMPLETE &&
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card->bm_transaction_data[0] != cpu_to_be32(0x3f)) {
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/* Somebody else is BM. Only act as IRM. */
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if (local_id == irm_id)
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allocate_broadcast_channel(card, generation);
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goto out;
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}
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spin_lock_irqsave(&card->lock, flags);
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if (rcode != RCODE_COMPLETE) {
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/*
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* The lock request failed, maybe the IRM
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* isn't really IRM capable after all. Let's
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* do a bus reset and pick the local node as
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* root, and thus, IRM.
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*/
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new_root_id = local_id;
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fw_notify("BM lock failed, making local node (%02x) root.\n",
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new_root_id);
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goto pick_me;
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}
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} else if (card->bm_generation != generation) {
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/*
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* We weren't BM in the last generation, and the last
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* bus reset is less than 125ms ago. Reschedule this job.
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*/
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spin_unlock_irqrestore(&card->lock, flags);
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fw_schedule_bm_work(card, DIV_ROUND_UP(HZ, 8));
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goto out;
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}
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/*
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* We're bus manager for this generation, so next step is to
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* make sure we have an active cycle master and do gap count
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* optimization.
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*/
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card->bm_generation = generation;
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if (root_device == NULL) {
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/*
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* Either link_on is false, or we failed to read the
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* config rom. In either case, pick another root.
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*/
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new_root_id = local_id;
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} else if (!root_device_is_running) {
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/*
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* If we haven't probed this device yet, bail out now
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* and let's try again once that's done.
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*/
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spin_unlock_irqrestore(&card->lock, flags);
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goto out;
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} else if (root_device_is_cmc) {
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/*
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* FIXME: I suppose we should set the cmstr bit in the
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* STATE_CLEAR register of this node, as described in
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* 1394-1995, 8.4.2.6. Also, send out a force root
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* packet for this node.
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*/
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new_root_id = root_id;
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} else {
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/*
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* Current root has an active link layer and we
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* successfully read the config rom, but it's not
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* cycle master capable.
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*/
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new_root_id = local_id;
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}
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pick_me:
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/*
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* Pick a gap count from 1394a table E-1. The table doesn't cover
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* the typically much larger 1394b beta repeater delays though.
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*/
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if (!card->beta_repeaters_present &&
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root_node->max_hops < ARRAY_SIZE(gap_count_table))
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gap_count = gap_count_table[root_node->max_hops];
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else
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gap_count = 63;
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/*
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* Finally, figure out if we should do a reset or not. If we have
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* done less than 5 resets with the same physical topology and we
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* have either a new root or a new gap count setting, let's do it.
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*/
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if (card->bm_retries++ < 5 &&
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(card->gap_count != gap_count || new_root_id != root_id))
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do_reset = true;
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spin_unlock_irqrestore(&card->lock, flags);
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if (do_reset) {
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fw_notify("phy config: card %d, new root=%x, gap_count=%d\n",
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card->index, new_root_id, gap_count);
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fw_send_phy_config(card, new_root_id, generation, gap_count);
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fw_core_initiate_bus_reset(card, 1);
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/* Will allocate broadcast channel after the reset. */
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} else {
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if (local_id == irm_id)
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allocate_broadcast_channel(card, generation);
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}
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out:
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fw_node_put(root_node);
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out_put_card:
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fw_card_put(card);
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}
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static void flush_timer_callback(unsigned long data)
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{
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struct fw_card *card = (struct fw_card *)data;
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fw_flush_transactions(card);
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}
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void fw_card_initialize(struct fw_card *card,
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const struct fw_card_driver *driver,
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struct device *device)
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{
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static atomic_t index = ATOMIC_INIT(-1);
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card->index = atomic_inc_return(&index);
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card->driver = driver;
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card->device = device;
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card->current_tlabel = 0;
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card->tlabel_mask = 0;
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card->color = 0;
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card->broadcast_channel = BROADCAST_CHANNEL_INITIAL;
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kref_init(&card->kref);
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init_completion(&card->done);
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INIT_LIST_HEAD(&card->transaction_list);
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spin_lock_init(&card->lock);
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setup_timer(&card->flush_timer,
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flush_timer_callback, (unsigned long)card);
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card->local_node = NULL;
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INIT_DELAYED_WORK(&card->work, fw_card_bm_work);
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}
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EXPORT_SYMBOL(fw_card_initialize);
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int fw_card_add(struct fw_card *card,
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u32 max_receive, u32 link_speed, u64 guid)
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{
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u32 *config_rom;
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size_t length;
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int ret;
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card->max_receive = max_receive;
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card->link_speed = link_speed;
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card->guid = guid;
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mutex_lock(&card_mutex);
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config_rom = generate_config_rom(card, &length);
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list_add_tail(&card->link, &card_list);
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mutex_unlock(&card_mutex);
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ret = card->driver->enable(card, config_rom, length);
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if (ret < 0) {
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mutex_lock(&card_mutex);
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list_del(&card->link);
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mutex_unlock(&card_mutex);
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}
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return ret;
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}
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EXPORT_SYMBOL(fw_card_add);
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/*
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* The next few functions implement a dummy driver that is used once a card
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* driver shuts down an fw_card. This allows the driver to cleanly unload,
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* as all IO to the card will be handled (and failed) by the dummy driver
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* instead of calling into the module. Only functions for iso context
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* shutdown still need to be provided by the card driver.
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*/
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static int dummy_enable(struct fw_card *card, u32 *config_rom, size_t length)
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{
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BUG();
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return -1;
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}
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static int dummy_update_phy_reg(struct fw_card *card, int address,
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int clear_bits, int set_bits)
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{
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return -ENODEV;
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}
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static int dummy_set_config_rom(struct fw_card *card,
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u32 *config_rom, size_t length)
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{
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/*
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* We take the card out of card_list before setting the dummy
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* driver, so this should never get called.
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*/
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BUG();
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return -1;
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}
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static void dummy_send_request(struct fw_card *card, struct fw_packet *packet)
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{
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packet->callback(packet, card, -ENODEV);
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}
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static void dummy_send_response(struct fw_card *card, struct fw_packet *packet)
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{
|
|
packet->callback(packet, card, -ENODEV);
|
|
}
|
|
|
|
static int dummy_cancel_packet(struct fw_card *card, struct fw_packet *packet)
|
|
{
|
|
return -ENOENT;
|
|
}
|
|
|
|
static int dummy_enable_phys_dma(struct fw_card *card,
|
|
int node_id, int generation)
|
|
{
|
|
return -ENODEV;
|
|
}
|
|
|
|
static const struct fw_card_driver dummy_driver_template = {
|
|
.enable = dummy_enable,
|
|
.update_phy_reg = dummy_update_phy_reg,
|
|
.set_config_rom = dummy_set_config_rom,
|
|
.send_request = dummy_send_request,
|
|
.cancel_packet = dummy_cancel_packet,
|
|
.send_response = dummy_send_response,
|
|
.enable_phys_dma = dummy_enable_phys_dma,
|
|
};
|
|
|
|
void fw_card_release(struct kref *kref)
|
|
{
|
|
struct fw_card *card = container_of(kref, struct fw_card, kref);
|
|
|
|
complete(&card->done);
|
|
}
|
|
|
|
void fw_core_remove_card(struct fw_card *card)
|
|
{
|
|
struct fw_card_driver dummy_driver = dummy_driver_template;
|
|
|
|
card->driver->update_phy_reg(card, 4,
|
|
PHY_LINK_ACTIVE | PHY_CONTENDER, 0);
|
|
fw_core_initiate_bus_reset(card, 1);
|
|
|
|
mutex_lock(&card_mutex);
|
|
list_del_init(&card->link);
|
|
mutex_unlock(&card_mutex);
|
|
|
|
/* Switch off most of the card driver interface. */
|
|
dummy_driver.free_iso_context = card->driver->free_iso_context;
|
|
dummy_driver.stop_iso = card->driver->stop_iso;
|
|
card->driver = &dummy_driver;
|
|
|
|
fw_destroy_nodes(card);
|
|
|
|
/* Wait for all users, especially device workqueue jobs, to finish. */
|
|
fw_card_put(card);
|
|
wait_for_completion(&card->done);
|
|
|
|
WARN_ON(!list_empty(&card->transaction_list));
|
|
del_timer_sync(&card->flush_timer);
|
|
}
|
|
EXPORT_SYMBOL(fw_core_remove_card);
|
|
|
|
int fw_core_initiate_bus_reset(struct fw_card *card, int short_reset)
|
|
{
|
|
int reg = short_reset ? 5 : 1;
|
|
int bit = short_reset ? PHY_BUS_SHORT_RESET : PHY_BUS_RESET;
|
|
|
|
return card->driver->update_phy_reg(card, reg, 0, bit);
|
|
}
|
|
EXPORT_SYMBOL(fw_core_initiate_bus_reset);
|