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linux_dsm_epyc7002/arch/mips/include/asm/mach-cavium-octeon
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Petar Jovanovic 846fbcfe6f MIPS: Octeon: Expose support for mips32r1, mips32r2 and mips64r1 
Define Cavium Octeon as a CPU that has support for mips32r1, mips32r2 and
mips64r1. This will affect show_cpuinfo() that will now correctly expose
mips32r1, mips32r2 and mips64r1 as supported ISAs.

Signed-off-by: Petar Jovanovic <petar.jovanovic@rt-rk.com>
Reviewed-by: Maciej W. Rozycki <macro@imgtec.com>
Acked-by: David Daney <david.daney@cavium.com>
Cc: petar.jovanovic@imgtec.com
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/15749/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29 15:21:52 +02:00
..
cpu-feature-overrides.h MIPS: Octeon: Expose support for mips32r1, mips32r2 and mips64r1 2017-08-29 15:21:52 +02:00
dma-coherence.h treewide: Constify most dma_map_ops structures 2017-01-24 12:23:35 -05:00
irq.h MIPS: Octeon: Remove forced mappings of USB interrupts. 2016-07-28 12:01:06 +02:00
kernel-entry-init.h MIPS: Octeon: Enable KASLR 2017-01-03 16:34:35 +01:00
mangle-port.h MIPS: Octeon: mangle-port: fix build failure with VDSO code 2016-09-19 17:21:37 +02:00
spaces.h MIPS/OCTEON: Override default address space layout. 2013-06-21 18:07:02 +02:00
war.h MIPS: OCTEON: Implement DCache errata workaround for all CN6XXX 2015-02-20 15:31:27 +01:00