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015c8dd0cb
The hypervisor doesn't allow PCD or PWT to be set on guest ptes, so make sure they're masked out. Also, fix up some previous mispatching. Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
643 lines
14 KiB
C
643 lines
14 KiB
C
/*
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* Xen mmu operations
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*
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* This file contains the various mmu fetch and update operations.
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* The most important job they must perform is the mapping between the
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* domain's pfn and the overall machine mfns.
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*
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* Xen allows guests to directly update the pagetable, in a controlled
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* fashion. In other words, the guest modifies the same pagetable
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* that the CPU actually uses, which eliminates the overhead of having
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* a separate shadow pagetable.
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*
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* In order to allow this, it falls on the guest domain to map its
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* notion of a "physical" pfn - which is just a domain-local linear
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* address - into a real "machine address" which the CPU's MMU can
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* use.
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*
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* A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be
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* inserted directly into the pagetable. When creating a new
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* pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely,
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* when reading the content back with __(pgd|pmd|pte)_val, it converts
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* the mfn back into a pfn.
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*
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* The other constraint is that all pages which make up a pagetable
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* must be mapped read-only in the guest. This prevents uncontrolled
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* guest updates to the pagetable. Xen strictly enforces this, and
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* will disallow any pagetable update which will end up mapping a
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* pagetable page RW, and will disallow using any writable page as a
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* pagetable.
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*
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* Naively, when loading %cr3 with the base of a new pagetable, Xen
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* would need to validate the whole pagetable before going on.
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* Naturally, this is quite slow. The solution is to "pin" a
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* pagetable, which enforces all the constraints on the pagetable even
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* when it is not actively in use. This menas that Xen can be assured
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* that it is still valid when you do load it into %cr3, and doesn't
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* need to revalidate it.
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*
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* Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
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*/
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#include <linux/sched.h>
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#include <linux/highmem.h>
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#include <linux/bug.h>
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#include <asm/pgtable.h>
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#include <asm/tlbflush.h>
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#include <asm/mmu_context.h>
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#include <asm/paravirt.h>
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#include <asm/xen/hypercall.h>
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#include <asm/xen/hypervisor.h>
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#include <xen/page.h>
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#include <xen/interface/xen.h>
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#include "multicalls.h"
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#include "mmu.h"
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xmaddr_t arbitrary_virt_to_machine(unsigned long address)
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{
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pte_t *pte = lookup_address(address);
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unsigned offset = address & PAGE_MASK;
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BUG_ON(pte == NULL);
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return XMADDR((pte_mfn(*pte) << PAGE_SHIFT) + offset);
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}
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void make_lowmem_page_readonly(void *vaddr)
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{
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pte_t *pte, ptev;
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unsigned long address = (unsigned long)vaddr;
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pte = lookup_address(address);
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BUG_ON(pte == NULL);
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ptev = pte_wrprotect(*pte);
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if (HYPERVISOR_update_va_mapping(address, ptev, 0))
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BUG();
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}
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void make_lowmem_page_readwrite(void *vaddr)
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{
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pte_t *pte, ptev;
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unsigned long address = (unsigned long)vaddr;
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pte = lookup_address(address);
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BUG_ON(pte == NULL);
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ptev = pte_mkwrite(*pte);
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if (HYPERVISOR_update_va_mapping(address, ptev, 0))
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BUG();
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}
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void xen_set_pmd(pmd_t *ptr, pmd_t val)
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{
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struct multicall_space mcs;
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struct mmu_update *u;
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preempt_disable();
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mcs = xen_mc_entry(sizeof(*u));
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u = mcs.args;
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u->ptr = virt_to_machine(ptr).maddr;
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u->val = pmd_val_ma(val);
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MULTI_mmu_update(mcs.mc, u, 1, NULL, DOMID_SELF);
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xen_mc_issue(PARAVIRT_LAZY_MMU);
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preempt_enable();
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}
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/*
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* Associate a virtual page frame with a given physical page frame
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* and protection flags for that frame.
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*/
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void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
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{
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pgd_t *pgd;
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pud_t *pud;
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pmd_t *pmd;
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pte_t *pte;
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pgd = swapper_pg_dir + pgd_index(vaddr);
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if (pgd_none(*pgd)) {
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BUG();
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return;
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}
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pud = pud_offset(pgd, vaddr);
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if (pud_none(*pud)) {
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BUG();
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return;
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}
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pmd = pmd_offset(pud, vaddr);
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if (pmd_none(*pmd)) {
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BUG();
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return;
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}
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pte = pte_offset_kernel(pmd, vaddr);
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/* <mfn,flags> stored as-is, to permit clearing entries */
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xen_set_pte(pte, mfn_pte(mfn, flags));
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/*
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* It's enough to flush this one mapping.
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* (PGE mappings get flushed as well)
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*/
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__flush_tlb_one(vaddr);
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}
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void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
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pte_t *ptep, pte_t pteval)
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{
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if (mm == current->mm || mm == &init_mm) {
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if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) {
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struct multicall_space mcs;
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mcs = xen_mc_entry(0);
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MULTI_update_va_mapping(mcs.mc, addr, pteval, 0);
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xen_mc_issue(PARAVIRT_LAZY_MMU);
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return;
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} else
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if (HYPERVISOR_update_va_mapping(addr, pteval, 0) == 0)
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return;
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}
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xen_set_pte(ptep, pteval);
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}
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#ifdef CONFIG_X86_PAE
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void xen_set_pud(pud_t *ptr, pud_t val)
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{
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struct multicall_space mcs;
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struct mmu_update *u;
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preempt_disable();
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mcs = xen_mc_entry(sizeof(*u));
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u = mcs.args;
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u->ptr = virt_to_machine(ptr).maddr;
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u->val = pud_val_ma(val);
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MULTI_mmu_update(mcs.mc, u, 1, NULL, DOMID_SELF);
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xen_mc_issue(PARAVIRT_LAZY_MMU);
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preempt_enable();
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}
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void xen_set_pte(pte_t *ptep, pte_t pte)
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{
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ptep->pte_high = pte.pte_high;
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smp_wmb();
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ptep->pte_low = pte.pte_low;
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}
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void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
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{
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set_64bit((u64 *)ptep, pte_val_ma(pte));
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}
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void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
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{
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ptep->pte_low = 0;
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smp_wmb(); /* make sure low gets written first */
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ptep->pte_high = 0;
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}
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void xen_pmd_clear(pmd_t *pmdp)
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{
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xen_set_pmd(pmdp, __pmd(0));
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}
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unsigned long long xen_pte_val(pte_t pte)
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{
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unsigned long long ret = 0;
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if (pte.pte_low) {
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ret = ((unsigned long long)pte.pte_high << 32) | pte.pte_low;
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ret = machine_to_phys(XMADDR(ret)).paddr | 1;
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}
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return ret;
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}
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unsigned long long xen_pmd_val(pmd_t pmd)
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{
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unsigned long long ret = pmd.pmd;
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if (ret)
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ret = machine_to_phys(XMADDR(ret)).paddr | 1;
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return ret;
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}
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unsigned long long xen_pgd_val(pgd_t pgd)
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{
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unsigned long long ret = pgd.pgd;
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if (ret)
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ret = machine_to_phys(XMADDR(ret)).paddr | 1;
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return ret;
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}
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pte_t xen_make_pte(unsigned long long pte)
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{
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if (pte & 1)
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pte = phys_to_machine(XPADDR(pte)).maddr;
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return (pte_t){ .pte = pte };
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}
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pmd_t xen_make_pmd(unsigned long long pmd)
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{
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if (pmd & 1)
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pmd = phys_to_machine(XPADDR(pmd)).maddr;
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return (pmd_t){ pmd };
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}
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pgd_t xen_make_pgd(unsigned long long pgd)
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{
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if (pgd & _PAGE_PRESENT)
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pgd = phys_to_machine(XPADDR(pgd)).maddr;
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return (pgd_t){ pgd };
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}
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#else /* !PAE */
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void xen_set_pte(pte_t *ptep, pte_t pte)
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{
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*ptep = pte;
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}
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unsigned long xen_pte_val(pte_t pte)
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{
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unsigned long ret = pte.pte_low;
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if (ret & _PAGE_PRESENT)
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ret = machine_to_phys(XMADDR(ret)).paddr;
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return ret;
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}
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unsigned long xen_pgd_val(pgd_t pgd)
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{
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unsigned long ret = pgd.pgd;
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if (ret)
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ret = machine_to_phys(XMADDR(ret)).paddr | 1;
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return ret;
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}
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pte_t xen_make_pte(unsigned long pte)
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{
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if (pte & _PAGE_PRESENT)
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pte = phys_to_machine(XPADDR(pte)).maddr;
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pte &= ~(_PAGE_PCD | _PAGE_PWT);
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return (pte_t){ pte };
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}
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pgd_t xen_make_pgd(unsigned long pgd)
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{
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if (pgd & _PAGE_PRESENT)
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pgd = phys_to_machine(XPADDR(pgd)).maddr;
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return (pgd_t){ pgd };
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}
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#endif /* CONFIG_X86_PAE */
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enum pt_level {
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PT_PGD,
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PT_PUD,
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PT_PMD,
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PT_PTE
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};
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/*
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(Yet another) pagetable walker. This one is intended for pinning a
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pagetable. This means that it walks a pagetable and calls the
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callback function on each page it finds making up the page table,
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at every level. It walks the entire pagetable, but it only bothers
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pinning pte pages which are below pte_limit. In the normal case
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this will be TASK_SIZE, but at boot we need to pin up to
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FIXADDR_TOP. But the important bit is that we don't pin beyond
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there, because then we start getting into Xen's ptes.
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*/
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static int pgd_walk(pgd_t *pgd_base, int (*func)(struct page *, enum pt_level),
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unsigned long limit)
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{
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pgd_t *pgd = pgd_base;
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int flush = 0;
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unsigned long addr = 0;
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unsigned long pgd_next;
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BUG_ON(limit > FIXADDR_TOP);
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if (xen_feature(XENFEAT_auto_translated_physmap))
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return 0;
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for (; addr != FIXADDR_TOP; pgd++, addr = pgd_next) {
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pud_t *pud;
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unsigned long pud_limit, pud_next;
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pgd_next = pud_limit = pgd_addr_end(addr, FIXADDR_TOP);
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if (!pgd_val(*pgd))
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continue;
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pud = pud_offset(pgd, 0);
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if (PTRS_PER_PUD > 1) /* not folded */
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flush |= (*func)(virt_to_page(pud), PT_PUD);
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for (; addr != pud_limit; pud++, addr = pud_next) {
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pmd_t *pmd;
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unsigned long pmd_limit;
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pud_next = pud_addr_end(addr, pud_limit);
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if (pud_next < limit)
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pmd_limit = pud_next;
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else
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pmd_limit = limit;
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if (pud_none(*pud))
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continue;
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pmd = pmd_offset(pud, 0);
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if (PTRS_PER_PMD > 1) /* not folded */
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flush |= (*func)(virt_to_page(pmd), PT_PMD);
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for (; addr != pmd_limit; pmd++) {
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addr += (PAGE_SIZE * PTRS_PER_PTE);
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if ((pmd_limit-1) < (addr-1)) {
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addr = pmd_limit;
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break;
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}
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if (pmd_none(*pmd))
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continue;
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flush |= (*func)(pmd_page(*pmd), PT_PTE);
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}
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}
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}
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flush |= (*func)(virt_to_page(pgd_base), PT_PGD);
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return flush;
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}
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static spinlock_t *lock_pte(struct page *page)
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{
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spinlock_t *ptl = NULL;
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#if NR_CPUS >= CONFIG_SPLIT_PTLOCK_CPUS
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ptl = __pte_lockptr(page);
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spin_lock(ptl);
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#endif
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return ptl;
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}
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static void do_unlock(void *v)
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{
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spinlock_t *ptl = v;
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spin_unlock(ptl);
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}
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static void xen_do_pin(unsigned level, unsigned long pfn)
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{
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struct mmuext_op *op;
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struct multicall_space mcs;
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mcs = __xen_mc_entry(sizeof(*op));
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op = mcs.args;
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op->cmd = level;
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op->arg1.mfn = pfn_to_mfn(pfn);
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MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
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}
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static int pin_page(struct page *page, enum pt_level level)
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{
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unsigned pgfl = test_and_set_bit(PG_pinned, &page->flags);
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int flush;
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if (pgfl)
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flush = 0; /* already pinned */
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else if (PageHighMem(page))
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/* kmaps need flushing if we found an unpinned
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highpage */
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flush = 1;
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else {
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void *pt = lowmem_page_address(page);
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unsigned long pfn = page_to_pfn(page);
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struct multicall_space mcs = __xen_mc_entry(0);
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spinlock_t *ptl;
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flush = 0;
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ptl = NULL;
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if (level == PT_PTE)
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ptl = lock_pte(page);
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MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
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pfn_pte(pfn, PAGE_KERNEL_RO),
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level == PT_PGD ? UVMF_TLB_FLUSH : 0);
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if (level == PT_PTE)
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xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn);
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if (ptl) {
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/* Queue a deferred unlock for when this batch
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is completed. */
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xen_mc_callback(do_unlock, ptl);
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}
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}
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return flush;
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}
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/* This is called just after a mm has been created, but it has not
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been used yet. We need to make sure that its pagetable is all
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read-only, and can be pinned. */
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void xen_pgd_pin(pgd_t *pgd)
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{
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unsigned level;
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xen_mc_batch();
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if (pgd_walk(pgd, pin_page, TASK_SIZE)) {
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/* re-enable interrupts for kmap_flush_unused */
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xen_mc_issue(0);
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kmap_flush_unused();
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xen_mc_batch();
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}
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#ifdef CONFIG_X86_PAE
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level = MMUEXT_PIN_L3_TABLE;
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#else
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level = MMUEXT_PIN_L2_TABLE;
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#endif
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xen_do_pin(level, PFN_DOWN(__pa(pgd)));
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xen_mc_issue(0);
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}
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/* The init_mm pagetable is really pinned as soon as its created, but
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that's before we have page structures to store the bits. So do all
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the book-keeping now. */
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static __init int mark_pinned(struct page *page, enum pt_level level)
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{
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SetPagePinned(page);
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return 0;
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}
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void __init xen_mark_init_mm_pinned(void)
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{
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pgd_walk(init_mm.pgd, mark_pinned, FIXADDR_TOP);
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}
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static int unpin_page(struct page *page, enum pt_level level)
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{
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unsigned pgfl = test_and_clear_bit(PG_pinned, &page->flags);
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if (pgfl && !PageHighMem(page)) {
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void *pt = lowmem_page_address(page);
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unsigned long pfn = page_to_pfn(page);
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spinlock_t *ptl = NULL;
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struct multicall_space mcs;
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if (level == PT_PTE) {
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ptl = lock_pte(page);
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xen_do_pin(MMUEXT_UNPIN_TABLE, pfn);
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}
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mcs = __xen_mc_entry(0);
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MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
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pfn_pte(pfn, PAGE_KERNEL),
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level == PT_PGD ? UVMF_TLB_FLUSH : 0);
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if (ptl) {
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/* unlock when batch completed */
|
|
xen_mc_callback(do_unlock, ptl);
|
|
}
|
|
}
|
|
|
|
return 0; /* never need to flush on unpin */
|
|
}
|
|
|
|
/* Release a pagetables pages back as normal RW */
|
|
static void xen_pgd_unpin(pgd_t *pgd)
|
|
{
|
|
xen_mc_batch();
|
|
|
|
xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
|
|
|
|
pgd_walk(pgd, unpin_page, TASK_SIZE);
|
|
|
|
xen_mc_issue(0);
|
|
}
|
|
|
|
void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next)
|
|
{
|
|
spin_lock(&next->page_table_lock);
|
|
xen_pgd_pin(next->pgd);
|
|
spin_unlock(&next->page_table_lock);
|
|
}
|
|
|
|
void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm)
|
|
{
|
|
spin_lock(&mm->page_table_lock);
|
|
xen_pgd_pin(mm->pgd);
|
|
spin_unlock(&mm->page_table_lock);
|
|
}
|
|
|
|
|
|
#ifdef CONFIG_SMP
|
|
/* Another cpu may still have their %cr3 pointing at the pagetable, so
|
|
we need to repoint it somewhere else before we can unpin it. */
|
|
static void drop_other_mm_ref(void *info)
|
|
{
|
|
struct mm_struct *mm = info;
|
|
|
|
if (__get_cpu_var(cpu_tlbstate).active_mm == mm)
|
|
leave_mm(smp_processor_id());
|
|
|
|
/* If this cpu still has a stale cr3 reference, then make sure
|
|
it has been flushed. */
|
|
if (x86_read_percpu(xen_current_cr3) == __pa(mm->pgd)) {
|
|
load_cr3(swapper_pg_dir);
|
|
arch_flush_lazy_cpu_mode();
|
|
}
|
|
}
|
|
|
|
static void drop_mm_ref(struct mm_struct *mm)
|
|
{
|
|
cpumask_t mask;
|
|
unsigned cpu;
|
|
|
|
if (current->active_mm == mm) {
|
|
if (current->mm == mm)
|
|
load_cr3(swapper_pg_dir);
|
|
else
|
|
leave_mm(smp_processor_id());
|
|
arch_flush_lazy_cpu_mode();
|
|
}
|
|
|
|
/* Get the "official" set of cpus referring to our pagetable. */
|
|
mask = mm->cpu_vm_mask;
|
|
|
|
/* It's possible that a vcpu may have a stale reference to our
|
|
cr3, because its in lazy mode, and it hasn't yet flushed
|
|
its set of pending hypercalls yet. In this case, we can
|
|
look at its actual current cr3 value, and force it to flush
|
|
if needed. */
|
|
for_each_online_cpu(cpu) {
|
|
if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd))
|
|
cpu_set(cpu, mask);
|
|
}
|
|
|
|
if (!cpus_empty(mask))
|
|
xen_smp_call_function_mask(mask, drop_other_mm_ref, mm, 1);
|
|
}
|
|
#else
|
|
static void drop_mm_ref(struct mm_struct *mm)
|
|
{
|
|
if (current->active_mm == mm)
|
|
load_cr3(swapper_pg_dir);
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* While a process runs, Xen pins its pagetables, which means that the
|
|
* hypervisor forces it to be read-only, and it controls all updates
|
|
* to it. This means that all pagetable updates have to go via the
|
|
* hypervisor, which is moderately expensive.
|
|
*
|
|
* Since we're pulling the pagetable down, we switch to use init_mm,
|
|
* unpin old process pagetable and mark it all read-write, which
|
|
* allows further operations on it to be simple memory accesses.
|
|
*
|
|
* The only subtle point is that another CPU may be still using the
|
|
* pagetable because of lazy tlb flushing. This means we need need to
|
|
* switch all CPUs off this pagetable before we can unpin it.
|
|
*/
|
|
void xen_exit_mmap(struct mm_struct *mm)
|
|
{
|
|
get_cpu(); /* make sure we don't move around */
|
|
drop_mm_ref(mm);
|
|
put_cpu();
|
|
|
|
spin_lock(&mm->page_table_lock);
|
|
|
|
/* pgd may not be pinned in the error exit path of execve */
|
|
if (PagePinned(virt_to_page(mm->pgd)))
|
|
xen_pgd_unpin(mm->pgd);
|
|
|
|
spin_unlock(&mm->page_table_lock);
|
|
}
|