mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
584eca7060
Operating Point are specified per HW version. The OPP voltages are kept in a separate DTSI file because some boards may not define CPU regulator in their device-tree if voltage scaling isn't necessary, like for example in a case of tegra20-trimslice which is outlet-powered device. Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
303 lines
6.5 KiB
Plaintext
303 lines
6.5 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
|
|
|
|
/ {
|
|
cpu0_opp_table: cpu_opp_table0 {
|
|
compatible = "operating-points-v2";
|
|
opp-shared;
|
|
|
|
opp@216000000_750 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x0F 0x0003>;
|
|
opp-hz = /bits/ 64 <216000000>;
|
|
};
|
|
|
|
opp@216000000_800 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x0F 0x0004>;
|
|
opp-hz = /bits/ 64 <216000000>;
|
|
};
|
|
|
|
opp@312000000_750 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x0F 0x0003>;
|
|
opp-hz = /bits/ 64 <312000000>;
|
|
};
|
|
|
|
opp@312000000_800 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x0F 0x0004>;
|
|
opp-hz = /bits/ 64 <312000000>;
|
|
};
|
|
|
|
opp@456000000_750 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x0C 0x0003>;
|
|
opp-hz = /bits/ 64 <456000000>;
|
|
};
|
|
|
|
opp@456000000_800 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x03 0x0006>;
|
|
opp-hz = /bits/ 64 <456000000>;
|
|
};
|
|
|
|
opp@456000000_800_2_2 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x04 0x0004>;
|
|
opp-hz = /bits/ 64 <456000000>;
|
|
};
|
|
|
|
opp@456000000_800_3_2 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x08 0x0004>;
|
|
opp-hz = /bits/ 64 <456000000>;
|
|
};
|
|
|
|
opp@456000000_825 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x03 0x0001>;
|
|
opp-hz = /bits/ 64 <456000000>;
|
|
};
|
|
|
|
opp@608000000_750 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x08 0x0003>;
|
|
opp-hz = /bits/ 64 <608000000>;
|
|
};
|
|
|
|
opp@608000000_800 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x04 0x0006>;
|
|
opp-hz = /bits/ 64 <608000000>;
|
|
};
|
|
|
|
opp@608000000_800_3_2 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x08 0x0004>;
|
|
opp-hz = /bits/ 64 <608000000>;
|
|
};
|
|
|
|
opp@608000000_825 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x04 0x0001>;
|
|
opp-hz = /bits/ 64 <608000000>;
|
|
};
|
|
|
|
opp@608000000_850 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x03 0x0006>;
|
|
opp-hz = /bits/ 64 <608000000>;
|
|
};
|
|
|
|
opp@608000000_900 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x03 0x0001>;
|
|
opp-hz = /bits/ 64 <608000000>;
|
|
};
|
|
|
|
opp@760000000_775 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x08 0x0003>;
|
|
opp-hz = /bits/ 64 <760000000>;
|
|
};
|
|
|
|
opp@760000000_800 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x08 0x0004>;
|
|
opp-hz = /bits/ 64 <760000000>;
|
|
};
|
|
|
|
opp@760000000_850 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x04 0x0006>;
|
|
opp-hz = /bits/ 64 <760000000>;
|
|
};
|
|
|
|
opp@760000000_875 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x04 0x0001>;
|
|
opp-hz = /bits/ 64 <760000000>;
|
|
};
|
|
|
|
opp@760000000_875_1_1 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x02 0x0002>;
|
|
opp-hz = /bits/ 64 <760000000>;
|
|
};
|
|
|
|
opp@760000000_875_0_2 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x01 0x0004>;
|
|
opp-hz = /bits/ 64 <760000000>;
|
|
};
|
|
|
|
opp@760000000_875_1_2 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x02 0x0004>;
|
|
opp-hz = /bits/ 64 <760000000>;
|
|
};
|
|
|
|
opp@760000000_900 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x01 0x0002>;
|
|
opp-hz = /bits/ 64 <760000000>;
|
|
};
|
|
|
|
opp@760000000_975 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x03 0x0001>;
|
|
opp-hz = /bits/ 64 <760000000>;
|
|
};
|
|
|
|
opp@816000000_800 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x08 0x0007>;
|
|
opp-hz = /bits/ 64 <816000000>;
|
|
};
|
|
|
|
opp@816000000_850 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x04 0x0002>;
|
|
opp-hz = /bits/ 64 <816000000>;
|
|
};
|
|
|
|
opp@816000000_875 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x04 0x0005>;
|
|
opp-hz = /bits/ 64 <816000000>;
|
|
};
|
|
|
|
opp@816000000_950 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x03 0x0006>;
|
|
opp-hz = /bits/ 64 <816000000>;
|
|
};
|
|
|
|
opp@816000000_1000 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x03 0x0001>;
|
|
opp-hz = /bits/ 64 <816000000>;
|
|
};
|
|
|
|
opp@912000000_850 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x08 0x0007>;
|
|
opp-hz = /bits/ 64 <912000000>;
|
|
};
|
|
|
|
opp@912000000_900 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x04 0x0002>;
|
|
opp-hz = /bits/ 64 <912000000>;
|
|
};
|
|
|
|
opp@912000000_925 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x04 0x0001>;
|
|
opp-hz = /bits/ 64 <912000000>;
|
|
};
|
|
|
|
opp@912000000_950 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x02 0x0006>;
|
|
opp-hz = /bits/ 64 <912000000>;
|
|
};
|
|
|
|
opp@912000000_950_0_2 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x01 0x0004>;
|
|
opp-hz = /bits/ 64 <912000000>;
|
|
};
|
|
|
|
opp@912000000_950_2_2 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x04 0x0004>;
|
|
opp-hz = /bits/ 64 <912000000>;
|
|
};
|
|
|
|
opp@912000000_1000 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x01 0x0002>;
|
|
opp-hz = /bits/ 64 <912000000>;
|
|
};
|
|
|
|
opp@912000000_1050 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x03 0x0001>;
|
|
opp-hz = /bits/ 64 <912000000>;
|
|
};
|
|
|
|
opp@1000000000_875 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x08 0x0007>;
|
|
opp-hz = /bits/ 64 <1000000000>;
|
|
};
|
|
|
|
opp@1000000000_900 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x04 0x0002>;
|
|
opp-hz = /bits/ 64 <1000000000>;
|
|
};
|
|
|
|
opp@1000000000_950 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x04 0x0004>;
|
|
opp-hz = /bits/ 64 <1000000000>;
|
|
};
|
|
|
|
opp@1000000000_975 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x04 0x0001>;
|
|
opp-hz = /bits/ 64 <1000000000>;
|
|
};
|
|
|
|
opp@1000000000_1000 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x02 0x0006>;
|
|
opp-hz = /bits/ 64 <1000000000>;
|
|
};
|
|
|
|
opp@1000000000_1000_0_2 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x01 0x0004>;
|
|
opp-hz = /bits/ 64 <1000000000>;
|
|
};
|
|
|
|
opp@1000000000_1025 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x01 0x0002>;
|
|
opp-hz = /bits/ 64 <1000000000>;
|
|
};
|
|
|
|
opp@1000000000_1100 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x03 0x0001>;
|
|
opp-hz = /bits/ 64 <1000000000>;
|
|
};
|
|
|
|
opp@1200000000_1000 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x08 0x0004>;
|
|
opp-hz = /bits/ 64 <1200000000>;
|
|
};
|
|
|
|
opp@1200000000_1050 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x04 0x0004>;
|
|
opp-hz = /bits/ 64 <1200000000>;
|
|
};
|
|
|
|
opp@1200000000_1100 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x02 0x0004>;
|
|
opp-hz = /bits/ 64 <1200000000>;
|
|
};
|
|
|
|
opp@1200000000_1125 {
|
|
clock-latency-ns = <400000>;
|
|
opp-supported-hw = <0x01 0x0004>;
|
|
opp-hz = /bits/ 64 <1200000000>;
|
|
};
|
|
};
|
|
};
|