linux_dsm_epyc7002/drivers/gpu
Laurent Pinchart 00d082cc4e drm: rcar-du: lvds: Set LVEN and LVRES bits together on D3
On the D3 SoC the LVDS PHY must be enabled in the same register write
that enables the LVDS output. Skip writing the LVEN bit independently
on that platform, it will be set by the write that sets LVRES.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
2019-03-28 06:12:42 +02:00
..
drm drm: rcar-du: lvds: Set LVEN and LVRES bits together on D3 2019-03-28 06:12:42 +02:00
host1x gpu: host1x: Continue CDMA execution starting with a next job 2019-02-07 18:34:25 +01:00
ipu-v3 media updates for v5.1-rc1 2019-03-09 14:45:54 -08:00
vga - qxl: Remove the conflicting framebuffers earlier 2019-03-14 11:37:46 +10:00
Makefile