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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-26 02:25:44 +07:00
00cb41d5ad
The kernel mapping will tried to optimize its mapping by using bigger size. In rv64, it tries to use PMD_SIZE, and tryies to use PGDIR_SIZE in rv32. To ensure that the start address of these sections could fit the mapping entry size, make them align to the biggest alignment. Define a macro SECTION_ALIGN because the HPAGE_SIZE or PMD_SIZE, etc., are invisible in linker script. This patch is prepared for STRICT_KERNEL_RWX support. Signed-off-by: Zong Li <zong.li@sifive.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
89 lines
1.3 KiB
ArmAsm
89 lines
1.3 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2012 Regents of the University of California
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* Copyright (C) 2017 SiFive
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*/
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#define LOAD_OFFSET PAGE_OFFSET
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#include <asm/vmlinux.lds.h>
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#include <asm/page.h>
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#include <asm/cache.h>
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#include <asm/thread_info.h>
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#include <asm/set_memory.h>
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OUTPUT_ARCH(riscv)
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ENTRY(_start)
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jiffies = jiffies_64;
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SECTIONS
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{
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/* Beginning of code and text segment */
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. = LOAD_OFFSET;
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_start = .;
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__init_begin = .;
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HEAD_TEXT_SECTION
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INIT_TEXT_SECTION(PAGE_SIZE)
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INIT_DATA_SECTION(16)
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/* we have to discard exit text and such at runtime, not link time */
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.exit.text :
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{
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EXIT_TEXT
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}
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.exit.data :
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{
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EXIT_DATA
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}
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PERCPU_SECTION(L1_CACHE_BYTES)
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__init_end = .;
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. = ALIGN(SECTION_ALIGN);
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.text : {
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_text = .;
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_stext = .;
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TEXT_TEXT
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SCHED_TEXT
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CPUIDLE_TEXT
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LOCK_TEXT
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KPROBES_TEXT
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ENTRY_TEXT
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IRQENTRY_TEXT
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SOFTIRQENTRY_TEXT
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*(.fixup)
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_etext = .;
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}
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/* Start of data section */
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_sdata = .;
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RO_DATA(SECTION_ALIGN)
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.srodata : {
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*(.srodata*)
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}
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EXCEPTION_TABLE(0x10)
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. = ALIGN(SECTION_ALIGN);
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_data = .;
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RW_DATA(L1_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE)
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.sdata : {
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__global_pointer$ = . + 0x800;
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*(.sdata*)
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/* End of data section */
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_edata = .;
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}
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BSS_SECTION(PAGE_SIZE, PAGE_SIZE, 0)
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.rel.dyn : {
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*(.rel.dyn*)
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}
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_end = .;
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STABS_DEBUG
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DWARF_DEBUG
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DISCARDS
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}
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