mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
825f4e0271
A quite large set of SoC updates this cycle. In no particular order: - Multi-cluster power management for Samsung Exynos, adding support for big.LITTLE CPU switching on EXYNOS5 - SMP support for Marvell Armada 375 and 38x - SMP rework on Allwinner A31 - Xilinx Zynq support for SOC_BUS, big endian - Marvell orion5x platform cleanup, modernizing the implementation and moving to DT. - _Finally_ moving Samsung Exynos over to support MULTIPLATFORM, so that their platform can be enabled in the same kernel binary as most of the other v7 platforms in the tree. \o/ The work isn't quite complete, there's some driver fixes still needed, but the basics now work. New SoC support added: - Freescale i.MX6SX - LSI Axxia AXM55xx SoCs - Samsung EXYNOS 3250, 5260, 5410, 5420 and 5800 - STi STIH407 Plus a large set of various smaller updates for different platforms. I'm probably missing some important one here. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQIcBAABAgAGBQJTjOKWAAoJEIwa5zzehBx36aEP/2vTD7x9FC59FACNHJ8iO7aw 0ebTgBBjI1Np6X18O+M7URbxV5TaBgwpUm/NDN86p03MpQ2eOXr8r47qVxe/HhZs AdlTvzgE6QwxcVL/HeCKKUEN3BPH74+TZgFl9I5aSzNjpR39xETeK1aWP/ZiAl/q /lGRZAQ59+c7Ung00Hg0g2YDxH9WFpK50Nj90ROnyjKSFkhIYngXYVpZB3maOypq Pgib/U8IraKZ52oGJw3yinSoORr7FdcUdAGWGTz/lQdNL/jYDfQ6GkRW2oblWXdt 3Xvj9UW6NmkbMICucMvFuuW1nXAgutZuTp9w7mBxsiUlYepxPv/DXM6yiI1WGlEb BeVOmOreNeN2nT6avv/uUhk3Osq63Jn9x8cz5y+7/lgWQwllh3/c+G01RotvgJEQ vpQq5ps9fMxIAMaNP6N/YqMJI1IOrBj0iXxaZEDw3VYM/k4lSvtb3VXP9c/rqApu U4i6hpSIGzrraU4NrjndYPndcLeNOVZbByETQKosZXuCo6G1sb7FstNSkzI9vSo8 O/pujIVUfYyBW82GzZGDw+aa7DWA29FPeUQ3p+sj5MSCg051xXT8h6QwqMo2K/zY 5ATs/qo6w7zH/Ou9rtHTRynCIb0GQJThDSlWtuXFedUF9quEltS+TDz/2o+dWtGJ yBFGKDRuBB20D36w9xqg =6LYI -----END PGP SIGNATURE----- Merge tag 'soc-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc into next Pull part one of ARM SoC updates from Olof Johansson: "A quite large set of SoC updates this cycle. In no particular order: - Multi-cluster power management for Samsung Exynos, adding support for big.LITTLE CPU switching on EXYNOS5 - SMP support for Marvell Armada 375 and 38x - SMP rework on Allwinner A31 - Xilinx Zynq support for SOC_BUS, big endian - Marvell orion5x platform cleanup, modernizing the implementation and moving to DT. - _Finally_ moving Samsung Exynos over to support MULTIPLATFORM, so that their platform can be enabled in the same kernel binary as most of the other v7 platforms in the tree. \o/ The work isn't quite complete, there's some driver fixes still needed, but the basics now work. New SoC support added: - Freescale i.MX6SX - LSI Axxia AXM55xx SoCs - Samsung EXYNOS 3250, 5260, 5410, 5420 and 5800 - STi STIH407 plus a large set of various smaller updates for different platforms. I'm probably missing some important one here" * tag 'soc-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (281 commits) ARM: exynos: don't run exynos4 l2x0 setup on other platforms ARM: exynos: Fix "allmodconfig" build errors in mcpm and hotplug ARM: EXYNOS: mcpm rename the power_down_finish ARM: EXYNOS: Enable mcpm for dual-cluster exynos5800 SoC ARM: EXYNOS: Enable multi-platform build support ARM: EXYNOS: Consolidate Kconfig entries ARM: EXYNOS: Add support for EXYNOS5410 SoC ARM: EXYNOS: Support secondary CPU boot of Exynos3250 ARM: EXYNOS: Add Exynos3250 SoC ID ARM: EXYNOS: Add 5800 SoC support ARM: EXYNOS: initial board support for exynos5260 SoC clk: exynos5410: register clocks using common clock framework ARM: debug: qcom: add UART addresses to Kconfig help for APQ8084 ARM: sunxi: allow building without reset controller Documentation: devicetree: arm: sort enable-method entries ARM: rockchip: convert smp bringup to CPU_METHOD_OF_DECLARE clk: exynos5250: Add missing sysmmu clocks for DISP and ISP blocks ARM: dts: axxia: Add reset controller power: reset: Add Axxia system reset driver ARM: axxia: Adding defconfig for AXM55xx ...
300 lines
5.9 KiB
Plaintext
300 lines
5.9 KiB
Plaintext
/*
|
|
* at91-sama5d3_xplained.dts - Device Tree file for the SAMA5D3 Xplained board
|
|
*
|
|
* Copyright (C) 2014 Atmel,
|
|
* 2014 Nicolas Ferre <nicolas.ferre@atmel.com>
|
|
*
|
|
* Licensed under GPLv2 or later.
|
|
*/
|
|
/dts-v1/;
|
|
#include "sama5d36.dtsi"
|
|
|
|
/ {
|
|
model = "SAMA5D3 Xplained";
|
|
compatible = "atmel,sama5d3-xplained", "atmel,sama5d3", "atmel,sama5";
|
|
|
|
chosen {
|
|
bootargs = "console=ttyS0,115200";
|
|
};
|
|
|
|
memory {
|
|
reg = <0x20000000 0x10000000>;
|
|
};
|
|
|
|
slow_xtal {
|
|
clock-frequency = <32768>;
|
|
};
|
|
|
|
main_xtal {
|
|
clock-frequency = <12000000>;
|
|
};
|
|
|
|
ahb {
|
|
apb {
|
|
mmc0: mmc@f0000000 {
|
|
pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7 &pinctrl_mmc0_cd>;
|
|
status = "okay";
|
|
slot@0 {
|
|
reg = <0>;
|
|
bus-width = <8>;
|
|
cd-gpios = <&pioE 0 GPIO_ACTIVE_LOW>;
|
|
};
|
|
};
|
|
|
|
spi0: spi@f0004000 {
|
|
cs-gpios = <&pioD 13 0>, <0>, <0>, <&pioD 16 0>;
|
|
status = "okay";
|
|
};
|
|
|
|
can0: can@f000c000 {
|
|
status = "okay";
|
|
};
|
|
|
|
i2c0: i2c@f0014000 {
|
|
pinctrl-0 = <&pinctrl_i2c0_pu>;
|
|
status = "okay";
|
|
};
|
|
|
|
i2c1: i2c@f0018000 {
|
|
status = "okay";
|
|
|
|
pmic: act8865@5b {
|
|
compatible = "active-semi,act8865";
|
|
reg = <0x5b>;
|
|
status = "okay";
|
|
|
|
regulators {
|
|
vcc_1v8_reg: DCDC_REG1 {
|
|
regulator-name = "VCC_1V8";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
vcc_1v2_reg: DCDC_REG2 {
|
|
regulator-name = "VCC_1V2";
|
|
regulator-min-microvolt = <1200000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
vcc_3v3_reg: DCDC_REG3 {
|
|
regulator-name = "VCC_3V3";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
vddfuse_reg: LDO_REG1 {
|
|
regulator-name = "FUSE_2V5";
|
|
regulator-min-microvolt = <2500000>;
|
|
regulator-max-microvolt = <2500000>;
|
|
};
|
|
|
|
vddana_reg: LDO_REG2 {
|
|
regulator-name = "VDDANA";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
macb0: ethernet@f0028000 {
|
|
phy-mode = "rgmii";
|
|
status = "okay";
|
|
};
|
|
|
|
pwm0: pwm@f002c000 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_pwm0_pwmh0_0 &pinctrl_pwm0_pwmh1_0>;
|
|
status = "okay";
|
|
};
|
|
|
|
usart0: serial@f001c000 {
|
|
status = "okay";
|
|
};
|
|
|
|
usart1: serial@f0020000 {
|
|
pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>;
|
|
status = "okay";
|
|
};
|
|
|
|
uart0: serial@f0024000 {
|
|
status = "okay";
|
|
};
|
|
|
|
mmc1: mmc@f8000000 {
|
|
pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>;
|
|
status = "okay";
|
|
slot@0 {
|
|
reg = <0>;
|
|
bus-width = <4>;
|
|
cd-gpios = <&pioE 1 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
};
|
|
|
|
spi1: spi@f8008000 {
|
|
cs-gpios = <&pioC 25 0>;
|
|
status = "okay";
|
|
};
|
|
|
|
adc0: adc@f8018000 {
|
|
pinctrl-0 = <
|
|
&pinctrl_adc0_adtrg
|
|
&pinctrl_adc0_ad0
|
|
&pinctrl_adc0_ad1
|
|
&pinctrl_adc0_ad2
|
|
&pinctrl_adc0_ad3
|
|
&pinctrl_adc0_ad4
|
|
&pinctrl_adc0_ad5
|
|
&pinctrl_adc0_ad6
|
|
&pinctrl_adc0_ad7
|
|
&pinctrl_adc0_ad8
|
|
&pinctrl_adc0_ad9
|
|
>;
|
|
status = "okay";
|
|
};
|
|
|
|
i2c2: i2c@f801c000 {
|
|
dmas = <0>, <0>; /* Do not use DMA for i2c2 */
|
|
pinctrl-0 = <&pinctrl_i2c2_pu>;
|
|
status = "okay";
|
|
};
|
|
|
|
macb1: ethernet@f802c000 {
|
|
phy-mode = "rmii";
|
|
status = "okay";
|
|
};
|
|
|
|
dbgu: serial@ffffee00 {
|
|
status = "okay";
|
|
};
|
|
|
|
pinctrl@fffff200 {
|
|
board {
|
|
pinctrl_i2c0_pu: i2c0_pu {
|
|
atmel,pins =
|
|
<AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
|
|
<AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
|
|
};
|
|
|
|
pinctrl_i2c2_pu: i2c2_pu {
|
|
atmel,pins =
|
|
<AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
|
|
<AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
|
|
};
|
|
|
|
pinctrl_mmc0_cd: mmc0_cd {
|
|
atmel,pins =
|
|
<AT91_PIOE 0 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
|
|
};
|
|
|
|
pinctrl_mmc1_cd: mmc1_cd {
|
|
atmel,pins =
|
|
<AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
|
|
};
|
|
|
|
pinctrl_usba_vbus: usba_vbus {
|
|
atmel,pins =
|
|
<AT91_PIOE 9 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* PE9, conflicts with A9 */
|
|
};
|
|
};
|
|
};
|
|
|
|
pmc: pmc@fffffc00 {
|
|
main: mainck {
|
|
clock-frequency = <12000000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
nand0: nand@60000000 {
|
|
nand-bus-width = <8>;
|
|
nand-ecc-mode = "hw";
|
|
atmel,has-pmecc;
|
|
atmel,pmecc-cap = <4>;
|
|
atmel,pmecc-sector-size = <512>;
|
|
nand-on-flash-bbt;
|
|
status = "okay";
|
|
|
|
at91bootstrap@0 {
|
|
label = "at91bootstrap";
|
|
reg = <0x0 0x40000>;
|
|
};
|
|
|
|
bootloader@40000 {
|
|
label = "bootloader";
|
|
reg = <0x40000 0x80000>;
|
|
};
|
|
|
|
bootloaderenv@c0000 {
|
|
label = "bootloader env";
|
|
reg = <0xc0000 0xc0000>;
|
|
};
|
|
|
|
dtb@180000 {
|
|
label = "device tree";
|
|
reg = <0x180000 0x80000>;
|
|
};
|
|
|
|
kernel@200000 {
|
|
label = "kernel";
|
|
reg = <0x200000 0x600000>;
|
|
};
|
|
|
|
rootfs@800000 {
|
|
label = "rootfs";
|
|
reg = <0x800000 0x0f800000>;
|
|
};
|
|
};
|
|
|
|
usb0: gadget@00500000 {
|
|
atmel,vbus-gpio = <&pioE 9 GPIO_ACTIVE_HIGH>; /* PE9, conflicts with A9 */
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usba_vbus>;
|
|
status = "okay";
|
|
};
|
|
|
|
usb1: ohci@00600000 {
|
|
num-ports = <3>;
|
|
atmel,vbus-gpio = <0
|
|
&pioE 3 GPIO_ACTIVE_LOW
|
|
&pioE 4 GPIO_ACTIVE_LOW
|
|
>;
|
|
status = "okay";
|
|
};
|
|
|
|
usb2: ehci@00700000 {
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
gpio_keys {
|
|
compatible = "gpio-keys";
|
|
|
|
bp3 {
|
|
label = "PB_USER";
|
|
gpios = <&pioE 29 GPIO_ACTIVE_LOW>;
|
|
linux,code = <0x104>;
|
|
gpio-key,wakeup;
|
|
};
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
|
|
d2 {
|
|
label = "d2";
|
|
gpios = <&pioE 23 GPIO_ACTIVE_LOW>; /* PE23, conflicts with A23, CTS2 */
|
|
linux,default-trigger = "heartbeat";
|
|
};
|
|
|
|
d3 {
|
|
label = "d3";
|
|
gpios = <&pioE 24 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
};
|
|
};
|