AuxXxilium/linux_dsm_epyc7002
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00a9730e10
linux_dsm_epyc7002/arch/csky/include/uapi/asm
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Guo Ren 00a9730e10 csky: Cache and TLB routines 
This patch adds cache and tlb sync codes for abiv1 & abiv2.

Signed-off-by: Guo Ren <ren_guo@c-sky.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
2018-10-25 23:36:19 +08:00
..
cachectl.h csky: Cache and TLB routines 2018-10-25 23:36:19 +08:00
Kbuild
unistd.h csky: System Call 2018-10-25 23:36:19 +08:00