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d175d699df
The plic_find_hart_id() can be useful to other interrupt controller drivers (such as RISC-V local interrupt driver) so we rename this function to riscv_of_parent_hartid() and place it in arch directory along with riscv_of_processor_hartid(). Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Acked-by: Palmer Dabbelt <palmerdabbelt@google.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com> Reviewed-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
134 lines
3.1 KiB
C
134 lines
3.1 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2012 Regents of the University of California
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*/
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#include <linux/init.h>
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#include <linux/seq_file.h>
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#include <linux/of.h>
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#include <asm/smp.h>
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/*
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* Returns the hart ID of the given device tree node, or -ENODEV if the node
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* isn't an enabled and valid RISC-V hart node.
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*/
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int riscv_of_processor_hartid(struct device_node *node)
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{
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const char *isa;
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u32 hart;
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if (!of_device_is_compatible(node, "riscv")) {
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pr_warn("Found incompatible CPU\n");
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return -ENODEV;
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}
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if (of_property_read_u32(node, "reg", &hart)) {
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pr_warn("Found CPU without hart ID\n");
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return -ENODEV;
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}
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if (!of_device_is_available(node)) {
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pr_info("CPU with hartid=%d is not available\n", hart);
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return -ENODEV;
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}
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if (of_property_read_string(node, "riscv,isa", &isa)) {
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pr_warn("CPU with hartid=%d has no \"riscv,isa\" property\n", hart);
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return -ENODEV;
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}
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if (isa[0] != 'r' || isa[1] != 'v') {
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pr_warn("CPU with hartid=%d has an invalid ISA of \"%s\"\n", hart, isa);
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return -ENODEV;
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}
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return hart;
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}
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/*
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* Find hart ID of the CPU DT node under which given DT node falls.
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*
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* To achieve this, we walk up the DT tree until we find an active
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* RISC-V core (HART) node and extract the cpuid from it.
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*/
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int riscv_of_parent_hartid(struct device_node *node)
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{
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for (; node; node = node->parent) {
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if (of_device_is_compatible(node, "riscv"))
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return riscv_of_processor_hartid(node);
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}
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return -1;
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}
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#ifdef CONFIG_PROC_FS
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static void print_isa(struct seq_file *f, const char *isa)
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{
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/* Print the entire ISA as it is */
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seq_puts(f, "isa\t\t: ");
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seq_write(f, isa, strlen(isa));
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seq_puts(f, "\n");
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}
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static void print_mmu(struct seq_file *f, const char *mmu_type)
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{
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#if defined(CONFIG_32BIT)
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if (strcmp(mmu_type, "riscv,sv32") != 0)
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return;
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#elif defined(CONFIG_64BIT)
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if (strcmp(mmu_type, "riscv,sv39") != 0 &&
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strcmp(mmu_type, "riscv,sv48") != 0)
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return;
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#endif
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seq_printf(f, "mmu\t\t: %s\n", mmu_type+6);
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}
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static void *c_start(struct seq_file *m, loff_t *pos)
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{
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*pos = cpumask_next(*pos - 1, cpu_online_mask);
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if ((*pos) < nr_cpu_ids)
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return (void *)(uintptr_t)(1 + *pos);
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return NULL;
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}
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static void *c_next(struct seq_file *m, void *v, loff_t *pos)
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{
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(*pos)++;
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return c_start(m, pos);
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}
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static void c_stop(struct seq_file *m, void *v)
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{
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}
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static int c_show(struct seq_file *m, void *v)
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{
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unsigned long cpu_id = (unsigned long)v - 1;
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struct device_node *node = of_get_cpu_node(cpu_id, NULL);
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const char *compat, *isa, *mmu;
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seq_printf(m, "processor\t: %lu\n", cpu_id);
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seq_printf(m, "hart\t\t: %lu\n", cpuid_to_hartid_map(cpu_id));
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if (!of_property_read_string(node, "riscv,isa", &isa))
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print_isa(m, isa);
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if (!of_property_read_string(node, "mmu-type", &mmu))
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print_mmu(m, mmu);
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if (!of_property_read_string(node, "compatible", &compat)
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&& strcmp(compat, "riscv"))
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seq_printf(m, "uarch\t\t: %s\n", compat);
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seq_puts(m, "\n");
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of_node_put(node);
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return 0;
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}
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const struct seq_operations cpuinfo_op = {
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.start = c_start,
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.next = c_next,
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.stop = c_stop,
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.show = c_show
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};
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#endif /* CONFIG_PROC_FS */
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