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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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a64597227d
The workaround for the wrong hierarchy of the 3DG-{A,B} power domains on
RZ/G2E ES1.0 corrected the parent domains. However, the 3DG-{A,B} power
domains were still initialized and powered in the wrong order, causing
3DG operation to fail.
Fix this by changing the order in the table at runtime, when running on
an affected SoC.
This work is based on the work done by Geert for R-Car E3.
Fixes: f37d211c68 ("soc: renesas: rcar-sysc: Add r8a774c0 support")
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
54 lines
1.6 KiB
C
54 lines
1.6 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Renesas RZ/G2E System Controller
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* Copyright (C) 2018 Renesas Electronics Corp.
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*
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* Based on Renesas R-Car E3 System Controller
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*/
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#include <linux/bug.h>
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#include <linux/kernel.h>
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#include <linux/sys_soc.h>
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#include <dt-bindings/power/r8a774c0-sysc.h>
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#include "rcar-sysc.h"
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static struct rcar_sysc_area r8a774c0_areas[] __initdata = {
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{ "always-on", 0, 0, R8A774C0_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
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{ "ca53-scu", 0x140, 0, R8A774C0_PD_CA53_SCU, R8A774C0_PD_ALWAYS_ON,
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PD_SCU },
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{ "ca53-cpu0", 0x200, 0, R8A774C0_PD_CA53_CPU0, R8A774C0_PD_CA53_SCU,
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PD_CPU_NOCR },
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{ "ca53-cpu1", 0x200, 1, R8A774C0_PD_CA53_CPU1, R8A774C0_PD_CA53_SCU,
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PD_CPU_NOCR },
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{ "a3vc", 0x380, 0, R8A774C0_PD_A3VC, R8A774C0_PD_ALWAYS_ON },
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{ "a2vc1", 0x3c0, 1, R8A774C0_PD_A2VC1, R8A774C0_PD_A3VC },
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{ "3dg-a", 0x100, 0, R8A774C0_PD_3DG_A, R8A774C0_PD_ALWAYS_ON },
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{ "3dg-b", 0x100, 1, R8A774C0_PD_3DG_B, R8A774C0_PD_3DG_A },
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};
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/* Fixups for RZ/G2E ES1.0 revision */
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static const struct soc_device_attribute r8a774c0[] __initconst = {
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{ .soc_id = "r8a774c0", .revision = "ES1.0" },
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{ /* sentinel */ }
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};
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static int __init r8a774c0_sysc_init(void)
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{
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if (soc_device_match(r8a774c0)) {
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/* Fix incorrect 3DG hierarchy */
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swap(r8a774c0_areas[6], r8a774c0_areas[7]);
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r8a774c0_areas[6].parent = R8A774C0_PD_ALWAYS_ON;
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r8a774c0_areas[7].parent = R8A774C0_PD_3DG_B;
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}
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return 0;
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}
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const struct rcar_sysc_info r8a774c0_sysc_info __initconst = {
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.init = r8a774c0_sysc_init,
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.areas = r8a774c0_areas,
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.num_areas = ARRAY_SIZE(r8a774c0_areas),
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};
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