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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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60b517181a
[ Upstream commit af2096f285077e3339eb835ad06c50bdd59f01b5 ]
This patch adds missing MODULE_DEVICE_TABLE definition which generates
correct modalias for automatic loading of this cpufreq driver when it is
compiled as an external module.
Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes: f328584f7b
("cpufreq: Add sun50i nvmem based CPU scaling driver")
Reviewed-by: Yangtao Li <tiny.windzz@gmail.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
223 lines
5.0 KiB
C
223 lines
5.0 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Allwinner CPUFreq nvmem based driver
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*
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* The sun50i-cpufreq-nvmem driver reads the efuse value from the SoC to
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* provide the OPP framework with required information.
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*
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* Copyright (C) 2019 Yangtao Li <tiny.windzz@gmail.com>
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/module.h>
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#include <linux/nvmem-consumer.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/pm_opp.h>
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#include <linux/slab.h>
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#define MAX_NAME_LEN 7
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#define NVMEM_MASK 0x7
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#define NVMEM_SHIFT 5
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static struct platform_device *cpufreq_dt_pdev, *sun50i_cpufreq_pdev;
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/**
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* sun50i_cpufreq_get_efuse() - Determine speed grade from efuse value
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* @versions: Set to the value parsed from efuse
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*
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* Returns 0 if success.
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*/
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static int sun50i_cpufreq_get_efuse(u32 *versions)
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{
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struct nvmem_cell *speedbin_nvmem;
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struct device_node *np;
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struct device *cpu_dev;
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u32 *speedbin, efuse_value;
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size_t len;
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int ret;
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cpu_dev = get_cpu_device(0);
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if (!cpu_dev)
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return -ENODEV;
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np = dev_pm_opp_of_get_opp_desc_node(cpu_dev);
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if (!np)
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return -ENOENT;
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ret = of_device_is_compatible(np,
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"allwinner,sun50i-h6-operating-points");
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if (!ret) {
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of_node_put(np);
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return -ENOENT;
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}
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speedbin_nvmem = of_nvmem_cell_get(np, NULL);
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of_node_put(np);
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if (IS_ERR(speedbin_nvmem)) {
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if (PTR_ERR(speedbin_nvmem) != -EPROBE_DEFER)
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pr_err("Could not get nvmem cell: %ld\n",
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PTR_ERR(speedbin_nvmem));
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return PTR_ERR(speedbin_nvmem);
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}
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speedbin = nvmem_cell_read(speedbin_nvmem, &len);
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nvmem_cell_put(speedbin_nvmem);
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if (IS_ERR(speedbin))
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return PTR_ERR(speedbin);
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efuse_value = (*speedbin >> NVMEM_SHIFT) & NVMEM_MASK;
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/*
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* We treat unexpected efuse values as if the SoC was from
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* the slowest bin. Expected efuse values are 1-3, slowest
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* to fastest.
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*/
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if (efuse_value >= 1 && efuse_value <= 3)
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*versions = efuse_value - 1;
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else
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*versions = 0;
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kfree(speedbin);
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return 0;
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};
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static int sun50i_cpufreq_nvmem_probe(struct platform_device *pdev)
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{
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struct opp_table **opp_tables;
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char name[MAX_NAME_LEN];
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unsigned int cpu;
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u32 speed = 0;
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int ret;
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opp_tables = kcalloc(num_possible_cpus(), sizeof(*opp_tables),
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GFP_KERNEL);
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if (!opp_tables)
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return -ENOMEM;
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ret = sun50i_cpufreq_get_efuse(&speed);
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if (ret)
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return ret;
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snprintf(name, MAX_NAME_LEN, "speed%d", speed);
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for_each_possible_cpu(cpu) {
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struct device *cpu_dev = get_cpu_device(cpu);
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if (!cpu_dev) {
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ret = -ENODEV;
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goto free_opp;
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}
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opp_tables[cpu] = dev_pm_opp_set_prop_name(cpu_dev, name);
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if (IS_ERR(opp_tables[cpu])) {
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ret = PTR_ERR(opp_tables[cpu]);
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pr_err("Failed to set prop name\n");
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goto free_opp;
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}
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}
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cpufreq_dt_pdev = platform_device_register_simple("cpufreq-dt", -1,
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NULL, 0);
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if (!IS_ERR(cpufreq_dt_pdev)) {
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platform_set_drvdata(pdev, opp_tables);
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return 0;
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}
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ret = PTR_ERR(cpufreq_dt_pdev);
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pr_err("Failed to register platform device\n");
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free_opp:
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for_each_possible_cpu(cpu) {
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if (IS_ERR_OR_NULL(opp_tables[cpu]))
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break;
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dev_pm_opp_put_prop_name(opp_tables[cpu]);
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}
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kfree(opp_tables);
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return ret;
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}
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static int sun50i_cpufreq_nvmem_remove(struct platform_device *pdev)
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{
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struct opp_table **opp_tables = platform_get_drvdata(pdev);
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unsigned int cpu;
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platform_device_unregister(cpufreq_dt_pdev);
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for_each_possible_cpu(cpu)
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dev_pm_opp_put_prop_name(opp_tables[cpu]);
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kfree(opp_tables);
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return 0;
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}
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static struct platform_driver sun50i_cpufreq_driver = {
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.probe = sun50i_cpufreq_nvmem_probe,
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.remove = sun50i_cpufreq_nvmem_remove,
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.driver = {
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.name = "sun50i-cpufreq-nvmem",
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},
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};
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static const struct of_device_id sun50i_cpufreq_match_list[] = {
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{ .compatible = "allwinner,sun50i-h6" },
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{}
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};
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MODULE_DEVICE_TABLE(of, sun50i_cpufreq_match_list);
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static const struct of_device_id *sun50i_cpufreq_match_node(void)
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{
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const struct of_device_id *match;
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struct device_node *np;
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np = of_find_node_by_path("/");
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match = of_match_node(sun50i_cpufreq_match_list, np);
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of_node_put(np);
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return match;
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}
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/*
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* Since the driver depends on nvmem drivers, which may return EPROBE_DEFER,
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* all the real activity is done in the probe, which may be defered as well.
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* The init here is only registering the driver and the platform device.
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*/
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static int __init sun50i_cpufreq_init(void)
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{
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const struct of_device_id *match;
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int ret;
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match = sun50i_cpufreq_match_node();
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if (!match)
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return -ENODEV;
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ret = platform_driver_register(&sun50i_cpufreq_driver);
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if (unlikely(ret < 0))
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return ret;
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sun50i_cpufreq_pdev =
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platform_device_register_simple("sun50i-cpufreq-nvmem",
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-1, NULL, 0);
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ret = PTR_ERR_OR_ZERO(sun50i_cpufreq_pdev);
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if (ret == 0)
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return 0;
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platform_driver_unregister(&sun50i_cpufreq_driver);
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return ret;
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}
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module_init(sun50i_cpufreq_init);
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static void __exit sun50i_cpufreq_exit(void)
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{
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platform_device_unregister(sun50i_cpufreq_pdev);
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platform_driver_unregister(&sun50i_cpufreq_driver);
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}
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module_exit(sun50i_cpufreq_exit);
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MODULE_DESCRIPTION("Sun50i-h6 cpufreq driver");
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MODULE_LICENSE("GPL v2");
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