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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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299b610117
SGI Octane (IP30) doesn't have RTC register directly mapped into CPU address space, but accesses RTC registers with an address and data register. This is now supported by additional access functions, which are selected by a new field in platform data. Removed plat_read/plat_write since there is no user and their usage could introduce lifetime issue, when functions are placed in different modules. Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de> Acked-by: Joshua Kinard <kumba@gentoo.org> Reviewed-by: Joshua Kinard <kumba@gentoo.org> Link: https://lore.kernel.org/r/20191014214621.25257-1-tbogendoerfer@suse.de Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
139 lines
3.0 KiB
C
139 lines
3.0 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
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*/
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/serial_8250.h>
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#include <linux/rtc/ds1685.h>
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#include <asm/ip32/mace.h>
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#include <asm/ip32/ip32_ints.h>
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extern void ip32_prepare_poweroff(void);
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#define MACEISA_SERIAL1_OFFS offsetof(struct sgi_mace, isa.serial1)
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#define MACEISA_SERIAL2_OFFS offsetof(struct sgi_mace, isa.serial2)
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#define MACE_PORT(offset,_irq) \
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{ \
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.mapbase = MACE_BASE + offset, \
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.irq = _irq, \
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.uartclk = 1843200, \
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.iotype = UPIO_MEM, \
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.flags = UPF_SKIP_TEST|UPF_IOREMAP, \
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.regshift = 8, \
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}
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static struct plat_serial8250_port uart8250_data[] = {
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MACE_PORT(MACEISA_SERIAL1_OFFS, MACEISA_SERIAL1_IRQ),
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MACE_PORT(MACEISA_SERIAL2_OFFS, MACEISA_SERIAL2_IRQ),
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{ },
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};
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static struct platform_device uart8250_device = {
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.name = "serial8250",
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.id = PLAT8250_DEV_PLATFORM,
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.dev = {
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.platform_data = uart8250_data,
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},
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};
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static int __init uart8250_init(void)
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{
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return platform_device_register(&uart8250_device);
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}
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device_initcall(uart8250_init);
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static __init int meth_devinit(void)
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{
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struct platform_device *pd;
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int ret;
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pd = platform_device_alloc("meth", -1);
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if (!pd)
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return -ENOMEM;
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ret = platform_device_add(pd);
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if (ret)
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platform_device_put(pd);
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return ret;
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}
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device_initcall(meth_devinit);
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static __init int sgio2audio_devinit(void)
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{
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struct platform_device *pd;
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int ret;
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pd = platform_device_alloc("sgio2audio", -1);
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if (!pd)
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return -ENOMEM;
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ret = platform_device_add(pd);
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if (ret)
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platform_device_put(pd);
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return ret;
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}
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device_initcall(sgio2audio_devinit);
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static __init int sgio2btns_devinit(void)
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{
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return IS_ERR(platform_device_register_simple("sgibtns", -1, NULL, 0));
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}
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device_initcall(sgio2btns_devinit);
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#define MACE_RTC_RES_START (MACE_BASE + offsetof(struct sgi_mace, isa.rtc))
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#define MACE_RTC_RES_END (MACE_RTC_RES_START + 32767)
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static struct resource ip32_rtc_resources[] = {
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{
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.start = MACEISA_RTC_IRQ,
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.end = MACEISA_RTC_IRQ,
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.flags = IORESOURCE_IRQ
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}, {
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.start = MACE_RTC_RES_START,
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.end = MACE_RTC_RES_END,
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.flags = IORESOURCE_MEM,
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}
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};
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/* RTC registers on IP32 are each padded by 256 bytes (0x100). */
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static struct ds1685_rtc_platform_data
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ip32_rtc_platform_data[] = {
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{
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.regstep = 0x100,
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.bcd_mode = true,
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.no_irq = false,
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.uie_unsupported = false,
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.access_type = ds1685_reg_direct,
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.plat_prepare_poweroff = ip32_prepare_poweroff,
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},
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};
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struct platform_device ip32_rtc_device = {
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.name = "rtc-ds1685",
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.id = -1,
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.dev = {
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.platform_data = ip32_rtc_platform_data,
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},
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.num_resources = ARRAY_SIZE(ip32_rtc_resources),
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.resource = ip32_rtc_resources,
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};
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static __init int sgio2_rtc_devinit(void)
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{
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return platform_device_register(&ip32_rtc_device);
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}
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device_initcall(sgio2_rtc_devinit);
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