// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (C) 2018 BTicino
 * Copyright (C) 2018 Amarula Solutions B.V.
 */

/dts-v1/;

#include <dt-bindings/gpio/gpio.h>
#include "imx6dl.dtsi"

/ {
	model = "BTicino i.MX6DL Mamoj board";
	compatible = "bticino,imx6dl-mamoj", "fsl,imx6dl";

	backlight_lcd: backlight-lcd {
		compatible = "pwm-backlight";
		pwms = <&pwm3 0 25000>; /* 25000ns -> 40kHz */
		brightness-levels = <0 4 8 16 32 64 128 160 192 224 255>;
		default-brightness-level = <7>;
	};

	display: disp0 {
		compatible = "fsl,imx-parallel-display";
		#address-cells = <1>;
		#size-cells = <0>;
		interface-pix-fmt = "rgb24";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_ipu1_lcdif>;
		status = "okay";

		port@0 {
			reg = <0>;

			lcd_display_in: endpoint {
				remote-endpoint = <&ipu1_di0_disp0>;
			};
		};

		port@1 {
			reg = <1>;

			lcd_display_out: endpoint {
				remote-endpoint = <&lcd_panel_in>;
			};
		};
	};

	panel-lcd {
		compatible = "rocktech,rk070er9427";
		backlight = <&backlight_lcd>;
		power-supply = <&reg_lcd_lr>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_ipu1_lcdif_pwr>;

		port {
			lcd_panel_in: endpoint {
				remote-endpoint = <&lcd_display_out>;
			};
		};
	};

	reg_lcd_3v3: regulator-lcd-dvdd {
		compatible = "regulator-fixed";
		regulator-name = "lcd-dvdd";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio3 1 0>;
		enable-active-high;
		startup-delay-us = <21000>;
	};

	reg_lcd_power: regulator-lcd-power {
		compatible = "regulator-fixed";
		regulator-name = "lcd-enable";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio3 6 0>;
		enable-active-high;
		vin-supply = <&reg_lcd_3v3>;
	};

	reg_lcd_vgl: regulator-lcd-vgl {
		compatible = "regulator-fixed";
		regulator-name = "lcd-vgl";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio2 20 GPIO_ACTIVE_HIGH>;
		startup-delay-us = <6000>;
		enable-active-high;
		vin-supply = <&reg_lcd_power>;
	};

	reg_lcd_vgh: regulator-lcd-vgh {
		compatible = "regulator-fixed";
		regulator-name = "lcd-vgh";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;
		startup-delay-us = <6000>;
		enable-active-high;
		vin-supply = <&reg_lcd_avdd>;
	};

	reg_lcd_vcom: regulator-lcd-vcom {
		compatible = "regulator-fixed";
		regulator-name = "lcd-vcom";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio4 14 GPIO_ACTIVE_HIGH>;
		startup-delay-us = <11000>;
		enable-active-high;
		vin-supply = <&reg_lcd_vgh>;
	};

	reg_lcd_lr: regulator-lcd-lr {
		compatible = "regulator-fixed";
		regulator-name = "lcd-lr";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		vin-supply = <&reg_lcd_vcom>;
	};

	reg_lcd_avdd: regulator-lcd-avdd {
		compatible = "regulator-fixed";
		regulator-name = "lcd-avdd";
		regulator-min-microvolt = <10280000>;
		regulator-max-microvolt = <10280000>;
		gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
		startup-delay-us = <6000>;
		enable-active-high;
		vin-supply = <&reg_lcd_vgl>;
	};

	reg_wl18xx_vmmc:  regulator-wl18xx-vmcc {
		compatible = "regulator-fixed";
		regulator-name = "vwl1807";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_wlan>;
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		gpio = <&gpio6 21 GPIO_ACTIVE_HIGH>;
		startup-delay-us = <70000>;
		enable-active-high;
	};
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "mii";
	status = "okay";
};

&i2c3 {
	clock-frequency = <400000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";
};

&i2c4 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c4>;
	status = "okay";

	pfuze100: pmic@8 {
		compatible = "fsl,pfuze100";
		reg = <0x08>;

		regulators {
			/* CPU vdd_arm core */
			sw1a_reg: sw1ab {
				regulator-min-microvolt = <300000>;
				regulator-max-microvolt = <1875000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			/* SOC vdd_soc */
			sw1c_reg: sw1c {
				regulator-min-microvolt = <300000>;
				regulator-max-microvolt = <1875000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			/* I/O power GEN_3V3 */
			sw2_reg: sw2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
			};

			/* DDR memory */
			sw3a_reg: sw3a {
				regulator-min-microvolt = <400000>;
				regulator-max-microvolt = <1975000>;
				regulator-boot-on;
				regulator-always-on;
			};

			/* DDR memory */
			sw3b_reg: sw3b {
				regulator-min-microvolt = <400000>;
				regulator-max-microvolt = <1975000>;
				regulator-boot-on;
				regulator-always-on;
			};

			/* not used */
			sw4_reg: sw4 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <3300000>;
			};

			/* not used */
			swbst_reg: swbst {
				regulator-min-microvolt = <5000000>;
				regulator-max-microvolt = <5150000>;
			};

			/* PMIC vsnvs. EX boot mode */
			snvs_reg: vsnvs {
				regulator-min-microvolt = <1000000>;
				regulator-max-microvolt = <3000000>;
				regulator-boot-on;
				regulator-always-on;
			};

			vref_reg: vrefddr {
				regulator-boot-on;
				regulator-always-on;
			};

			/* not used */
			vgen1_reg: vgen1 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
			};

			/* not used */
			vgen2_reg: vgen2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
			};

			/* not used */
			vgen3_reg: vgen3 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
			};

			/* 1v8 general power */
			vgen4_reg: vgen4 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			/* 2v8 general power IMX6 */
			vgen5_reg: vgen5 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			/* 3v3 Ethernet */
			vgen6_reg: vgen6 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
		};
	};
};

&ipu1_di0_disp0 {
	remote-endpoint = <&lcd_display_in>;
};

&pwm3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm3>;
	status = "okay";
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3>;
	status = "okay";
};

&usdhc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc1>;
	bus-width = <4>;
	vmmc-supply = <&reg_wl18xx_vmmc>;
	no-1-8-v;
	non-removable;
	wakeup-source;
	keep-power-in-suspend;
	cap-power-off-card;
	max-frequency = <25000000>;
	#address-cells = <1>;
	#size-cells = <0>;
	status = "okay";

	wlcore: wlcore@2 {
		compatible = "ti,wl1837";
		reg = <2>;
		interrupt-parent = <&gpio6>;
		interrupts = <23 IRQ_TYPE_LEVEL_HIGH>;
		tcxo-clock-frequency = <26000000>;
	};
};

&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	bus-width = <8>;
	non-removable;
	keep-power-in-suspend;
	status = "okay";
};

&iomuxc {
	pinctrl_enet: enetgrp {
		fsl,pins = <
			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b1
			MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0	0x1b0b0
			MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1	0x1b0b0
			MX6QDL_PAD_KEY_ROW2__ENET_TX_DATA2	0x1b0b0
			MX6QDL_PAD_KEY_ROW0__ENET_TX_DATA3	0x1b0b0
			MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN	0x1b0b0
			MX6QDL_PAD_GPIO_19__ENET_TX_ER		0x1b0b0
			MX6QDL_PAD_GPIO_18__ENET_RX_CLK		0x1b0b1
			MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0	0x1b0b0
			MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1	0x1b0b0
			MX6QDL_PAD_KEY_COL2__ENET_RX_DATA2	0x1b0b0
			MX6QDL_PAD_KEY_COL0__ENET_RX_DATA3      0x1b0b0
			MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN	0x1b0b0
			MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER	0x1b0b0
			MX6QDL_PAD_KEY_COL3__ENET_CRS		0x1b0b0
			MX6QDL_PAD_KEY_ROW1__ENET_COL		0x1b0b0
		>;
	};

	pinctrl_i2c3: i2c3grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_3__I2C3_SCL     0x4001b8b1
			MX6QDL_PAD_GPIO_6__I2C3_SDA     0x4001b8b1
		>;
	};

	pinctrl_i2c4: i2c4grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_7__I2C4_SCL	0x4001b8b1
			MX6QDL_PAD_GPIO_8__I2C4_SDA	0x4001b8b1
		>;
	};

	pinctrl_ipu1_lcdif: pinctrlipu1lcdif { /* parallel port 24-bit */
		fsl,pins = <
			MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 /* VDOUT_PCLK */
			MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10
			MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10 /* VDOUT_HSYNC */
			MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10 /* VDOUT_VSYNC */
			MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04	   0x10 /* VDOUT_RESET */
			MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x10
			MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10
			MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10
			MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10
			MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10
			MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10
			MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10
			MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10
			MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10
			MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10
			MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10
			MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10
			MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10
			MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10
			MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10
			MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10
			MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10
			MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x10
			MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x10
			MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x10
			MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x10
			MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x10
			MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x10
			MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x10
		>;
	};

	pinctrl_ipu1_lcdif_pwr: ipu1lcdifpwrgrp {
		fsl,pins = <
			MX6QDL_PAD_EIM_DA1__GPIO3_IO01		0x40013058 /* EN_LCD33V */
			MX6QDL_PAD_SD4_DAT5__GPIO2_IO13		0x4001b0b0 /* EN_AVDD */
			MX6QDL_PAD_EIM_D31__GPIO3_IO31		0x40013058 /* ENVGH */
			MX6QDL_PAD_EIM_A18__GPIO2_IO20		0x40013058 /* ENVGL */
			MX6QDL_PAD_EIM_DA6__GPIO3_IO06		0x40013058 /* LCD_POWER */
			MX6QDL_PAD_KEY_COL4__GPIO4_IO14		0x40013058 /* EN_VCOM_LCD */
			MX6QDL_PAD_KEY_ROW4__GPIO4_IO15		0x40013058 /* LCD_L_R */
			MX6QDL_PAD_EIM_DA2__GPIO3_IO02		0x40013058 /* LCD_U_D */
		>;
	};

	pinctrl_pwm3: pwm3grp {
		fsl,pins = <
			MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
		>;
	};

	pinctrl_uart3: uart3grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1
			MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_usdhc1: usdhc1grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_CMD__SD1_CMD    0x17069
			MX6QDL_PAD_SD1_CLK__SD1_CLK    0x10079
			MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17069
			MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17069
			MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17069
			MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17069
		>;
	};

	pinctrl_usdhc3: usdhc3grp {
		fsl,pins = <
			MX6QDL_PAD_SD3_CMD__SD3_CMD	0x17059
			MX6QDL_PAD_SD3_CLK__SD3_CLK	0x10059
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0	0x17059
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1	0x17059
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2	0x17059
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3	0x17059
			MX6QDL_PAD_SD3_DAT4__SD3_DATA4	0x17059
			MX6QDL_PAD_SD3_DAT5__SD3_DATA5	0x17059
			MX6QDL_PAD_SD3_DAT6__SD3_DATA6	0x17059
			MX6QDL_PAD_SD3_DAT7__SD3_DATA7	0x17059
		>;
	};

	pinctrl_wlan: wlangrp {
		fsl,pins = <
			MX6QDL_PAD_RGMII_TD1__GPIO6_IO21	0x4001b0b0
		>;
	};
};