/* * Copyright 2013 Armadeus Systems - <support@armadeus.com> * * The code contained herein is licensed under the GNU General Public * License. You may obtain a copy of the GNU General Public License * Version 2 or later at the following locations: * * http://www.opensource.org/licenses/gpl-license.html * http://www.gnu.org/copyleft/gpl.html */ /* APF51Dev is a docking board for the APF51 SOM */ #include "imx51-apf51.dts" / { model = "Armadeus Systems APF51Dev docking/development board"; compatible = "armadeus,imx51-apf51dev", "armadeus,imx51-apf51", "fsl,imx51"; backlight@bl1{ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_backlight>; compatible = "gpio-backlight"; gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>; default-on; }; display@di1 { compatible = "fsl,imx-parallel-display"; interface-pix-fmt = "bgr666"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ipu_disp1>; display-timings { lw700 { native-mode; clock-frequency = <33000033>; hactive = <800>; vactive = <480>; hback-porch = <96>; hfront-porch = <96>; vback-porch = <20>; vfront-porch = <21>; hsync-len = <64>; vsync-len = <4>; hsync-active = <1>; vsync-active = <1>; de-active = <1>; pixelclk-active = <0>; }; }; port { display_in: endpoint { remote-endpoint = <&ipu_di0_disp0>; }; }; }; gpio-keys { compatible = "gpio-keys"; user-key { label = "user"; gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; linux,code = <256>; /* BTN_0 */ }; }; leds { compatible = "gpio-leds"; user { label = "Heartbeat"; gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; }; }; }; &ecspi1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ecspi1>; fsl,spi-num-chipselects = <2>; cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>, <&gpio4 25 GPIO_ACTIVE_HIGH>; status = "okay"; }; &ecspi2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ecspi2>; fsl,spi-num-chipselects = <2>; cs-gpios = <&gpio3 28 GPIO_ACTIVE_LOW>, <&gpio3 27 GPIO_ACTIVE_LOW>; status = "okay"; }; &esdhc1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_esdhc1>; cd-gpios = <&gpio2 29 GPIO_ACTIVE_LOW>; bus-width = <4>; status = "okay"; }; &esdhc2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_esdhc2>; bus-width = <4>; non-removable; status = "okay"; }; &i2c2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; }; &iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hog>; imx51-apf51dev { pinctrl_backlight: bl1grp { fsl,pins = < MX51_PAD_DI1_D1_CS__GPIO3_4 0x1F5 >; }; pinctrl_hog: hoggrp { fsl,pins = < MX51_PAD_EIM_EB2__GPIO2_22 0x0C5 MX51_PAD_EIM_EB3__GPIO2_23 0x0C5 MX51_PAD_EIM_CS4__GPIO2_29 0x100 MX51_PAD_NANDF_D13__GPIO3_27 0x0C5 MX51_PAD_NANDF_D12__GPIO3_28 0x0C5 MX51_PAD_CSPI1_SS0__GPIO4_24 0x0C5 MX51_PAD_CSPI1_SS1__GPIO4_25 0x0C5 MX51_PAD_GPIO1_2__GPIO1_2 0x0C5 MX51_PAD_GPIO1_3__GPIO1_3 0x0C5 >; }; pinctrl_ecspi1: ecspi1grp { fsl,pins = < MX51_PAD_CSPI1_MISO__ECSPI1_MISO 0x185 MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI 0x185 MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK 0x185 >; }; pinctrl_ecspi2: ecspi2grp { fsl,pins = < MX51_PAD_NANDF_RB3__ECSPI2_MISO 0x185 MX51_PAD_NANDF_D15__ECSPI2_MOSI 0x185 MX51_PAD_NANDF_RB2__ECSPI2_SCLK 0x185 >; }; pinctrl_esdhc1: esdhc1grp { fsl,pins = < MX51_PAD_SD1_CMD__SD1_CMD 0x400020d5 MX51_PAD_SD1_CLK__SD1_CLK 0x20d5 MX51_PAD_SD1_DATA0__SD1_DATA0 0x20d5 MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5 MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5 MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5 >; }; pinctrl_esdhc2: esdhc2grp { fsl,pins = < MX51_PAD_SD2_CMD__SD2_CMD 0x400020d5 MX51_PAD_SD2_CLK__SD2_CLK 0x20d5 MX51_PAD_SD2_DATA0__SD2_DATA0 0x20d5 MX51_PAD_SD2_DATA1__SD2_DATA1 0x20d5 MX51_PAD_SD2_DATA2__SD2_DATA2 0x20d5 MX51_PAD_SD2_DATA3__SD2_DATA3 0x20d5 >; }; pinctrl_i2c2: i2c2grp { fsl,pins = < MX51_PAD_EIM_D27__I2C2_SCL 0x400001ed MX51_PAD_EIM_D24__I2C2_SDA 0x400001ed >; }; pinctrl_ipu_disp1: ipudisp1grp { fsl,pins = < MX51_PAD_DISP1_DAT0__DISP1_DAT0 0x5 MX51_PAD_DISP1_DAT1__DISP1_DAT1 0x5 MX51_PAD_DISP1_DAT2__DISP1_DAT2 0x5 MX51_PAD_DISP1_DAT3__DISP1_DAT3 0x5 MX51_PAD_DISP1_DAT4__DISP1_DAT4 0x5 MX51_PAD_DISP1_DAT5__DISP1_DAT5 0x5 MX51_PAD_DISP1_DAT6__DISP1_DAT6 0x5 MX51_PAD_DISP1_DAT7__DISP1_DAT7 0x5 MX51_PAD_DISP1_DAT8__DISP1_DAT8 0x5 MX51_PAD_DISP1_DAT9__DISP1_DAT9 0x5 MX51_PAD_DISP1_DAT10__DISP1_DAT10 0x5 MX51_PAD_DISP1_DAT11__DISP1_DAT11 0x5 MX51_PAD_DISP1_DAT12__DISP1_DAT12 0x5 MX51_PAD_DISP1_DAT13__DISP1_DAT13 0x5 MX51_PAD_DISP1_DAT14__DISP1_DAT14 0x5 MX51_PAD_DISP1_DAT15__DISP1_DAT15 0x5 MX51_PAD_DISP1_DAT16__DISP1_DAT16 0x5 MX51_PAD_DISP1_DAT17__DISP1_DAT17 0x5 MX51_PAD_DISP1_DAT18__DISP1_DAT18 0x5 MX51_PAD_DISP1_DAT19__DISP1_DAT19 0x5 MX51_PAD_DISP1_DAT20__DISP1_DAT20 0x5 MX51_PAD_DISP1_DAT21__DISP1_DAT21 0x5 MX51_PAD_DISP1_DAT22__DISP1_DAT22 0x5 MX51_PAD_DISP1_DAT23__DISP1_DAT23 0x5 MX51_PAD_DI1_PIN2__DI1_PIN2 0x5 MX51_PAD_DI1_PIN3__DI1_PIN3 0x5 >; }; }; }; &ipu_di0_disp0 { remote-endpoint = <&display_in>; };