Commit Graph

27112 Commits

Author SHA1 Message Date
Arnd Bergmann
6979cd54c0 drm: msm: remove unused variable
A recent cleanup removed the only user of the 'kms' variable in
msm_preclose(), causing a harmless compiler warning:

drivers/gpu/drm/msm/msm_drv.c: In function 'msm_preclose':
drivers/gpu/drm/msm/msm_drv.c:468:18: error: unused variable 'kms' [-Werror=unused-variable]

This removes the variable as well.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: 4016260ba4 ("drm/msm: fix bug after preclose removal")
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-05-08 10:22:16 -04:00
Rob Clark
2755734390 drm/msm: fix ->last_fence() after recover
It is no longer true that we discard all in-flight submits on recover
(these days we only discard the first one that hung).  After the first
re-submitted batch completes it would overwrite the fence with a correct
value, but there would be a window of time which showed all re-submitted
batches as already complete.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-05-08 10:22:15 -04:00
Rob Clark
b6295f9a38 drm/msm: 'struct fence' conversion
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-05-08 10:22:15 -04:00
Rob Clark
ba00c3f2f0 drm/msm: remove fence_cbs
This was only used for atomic commit these days.  So instead just give
atomic it's own work-queue where we can do a block on each bo in turn.
Simplifies things a whole bunch and makes the 'struct fence' conversion
easier.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-05-08 10:22:14 -04:00
Rob Clark
ca762a8ae7 drm/msm: introduce msm_fence_context
Better encapsulate the per-timeline stuff into fence-context.  For now
there is just a single fence-context, but eventually we'll also have one
per-CRTC to enable fully explicit fencing.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-05-08 10:19:51 -04:00
Rob Clark
340faef241 drm/msm: split locking and pinning BO's
Split up locking and pinning buffers in the submit path.  This is needed
because we'll want to insert fencing in between the two steps.

This makes things end up looking more similar to etnaviv submit code
(which was originally modelled on the msm code but has already added
'struct fence' support).

Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-05-08 10:16:03 -04:00
Rob Clark
7d12a279d4 drm/msm/gpu: simplify tracking in-flight bo's
Since we already track the array of bo's in the submit object, just
unconditionally take and drop ref's per submit (rather than only taking
ref's if bo is not already active).  This simplifies later patches.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-05-08 10:16:03 -04:00
Rob Clark
340ff4104f drm/msm: split out timeout_to_jiffies helper
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-05-08 10:16:03 -04:00
Rob Clark
79f0e20215 drm/msm: use imported dmabuf's reservation object
This was always the intention, but somehow it was never wired up
properly.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-05-08 10:16:02 -04:00
Rob Clark
fde5de6cb4 drm/msm: move fence code to it's own file
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-05-08 10:16:02 -04:00
Rob Clark
edcd60ce24 drm/msm: move debugfs code to it's own file
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-05-08 10:16:02 -04:00
Rob Clark
feb46f02c3 drm/msm: make HDCP support optional
It is already optional at runtime.  But this at least simplifies
backports to kernels without QCOM_SCM.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-05-08 10:16:02 -04:00
Jie Qiu
9e629c17aa drm/mediatek: Add DPI sub driver
Add DPI connector/encoder to support HDMI output via the
attached HDMI bridge.

Signed-off-by: Jie Qiu <jie.qiu@mediatek.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-05-06 17:47:38 +02:00
CK Hu
2e54c14e31 drm/mediatek: Add DSI sub driver
This patch add a drm encoder/connector driver for the MIPI DSI function
block of the Mediatek display subsystem and a phy driver for the MIPI TX
D-PHY control module.

Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-05-06 17:47:37 +02:00
CK Hu
119f517362 drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.
This patch adds an initial DRM driver for the Mediatek MT8173 DISP
subsystem. It currently supports two fixed output streams from the
OVL0/OVL1 sources to the DSI0/DPI0 sinks, respectively.

Signed-off-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: YT Shen <yt.shen@mediatek.com>
Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Signed-off-by: Mao Huang <littlecvr@chromium.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-05-06 17:47:35 +02:00
Daniel Vetter
8863dc7f56 drm/i915: Correctly refcount connectors in hw state readou
This was forgotten when adding the the refcounting to
drm_connector_state.

v2: Don't forget to unreference existing connectors. This isn't
relevant on driver load, but this code also runs on resume, and there
we already have an atomic state. Spotted by Chris Wilson.

Cc: Gabriel Feceoru <gabriel.feceoru@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Marius Vlad <marius.c.vlad@intel.com>
Cc: Dave Airlie <airlied@redhat.com>
Fixes: d2307dea14 ("drm/atomic: use connector references (v3)")
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1462541943-19620-1-git-send-email-daniel.vetter@ffwll.ch
2016-05-06 16:09:12 +02:00
Thierry Reding
83127f67e4 drm/panel: Flesh out kerneldoc
Write more complete kerneldoc comments for the DRM panel API and
integrate the helpers in the DRM DocBook reference.

Signed-off-by: Thierry Reding <treding@nvidia.com>drm/panel: Add helper for simple panel connector
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/20160506140137.GA4641@ulmo.ba.sec
2016-05-06 16:04:48 +02:00
Lucas Stach
a10e2bde5d drm/etnaviv: fix mmap operations for userptr and dma-buf objects
Add an indirect object operations call to allow distinct implementations
of the mmap operation based on the type of the object.

This ensures that the exporter is called to set up the mmap for imported
dma-bufs and disallows mapping of userptr objects through the DRM file,
as this might lead to serious corruption of kernel internal state.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
2016-05-06 10:42:33 +02:00
Lucas Stach
0e7f26e6b9 drm/etnaviv: take etnaviv_gem_obj in etnaviv_gem_mmap_obj
This function will be changed to be called indirectly and this
prototype change brings it in line with all the other indirect
object calls.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
2016-05-06 10:42:32 +02:00
Lucas Stach
946dd8d5ec drm/etnaviv: use deferrable timer for hangcheck handler
The hangcheck handler is already running with very coarse timeouts,
so it doesn't hurt to combine this timer with other wakeups in the
system.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
2016-05-06 10:42:31 +02:00
Dave Airlie
fd50c3a032 Merge branch 'for-next' of http://git.agner.ch/git/linux-drm-fsl-dcu into drm-next
fsl-dcu pixel clock polarity support
* 'for-next' of http://git.agner.ch/git/linux-drm-fsl-dcu:
  drm/fsl-dcu: use bus_flags for pixel clock polarity
  drm: introduce bus_flags in drm_display_info
2016-05-06 14:17:43 +10:00
Dave Airlie
a64424d722 Merge branch 'drm-next-4.7' of git://people.freedesktop.org/~agd5f/linux into drm-next
This is the first big radeon/amdgpu pull request for 4.7.  Highlights:
    - Polaris support in amdgpu
      Current display stack on par with other asics, for advanced features DAL is required
      Power management support
      Support for GFX, Compute, SDMA, UVD, VCE
    - VCE and UVD init/fini cleanup in radeon
    - GPUVM improvements
    - Scheduler improvements
    - Clockgating improvements
    - Powerplay improvements
    - TTM changes to support driver specific LRU update mechanism
    - Radeon support for new Mesa features
    - ASYNC pageflip support for radeon
    - Lots of bug fixes and code cleanups

* 'drm-next-4.7' of git://people.freedesktop.org/~agd5f/linux: (180 commits)
  drm/amdgpu: Replace rcu_assign_pointer() with RCU_INIT_POINTER()
  drm/amdgpu: use drm_mode_vrefresh() rather than mode->vrefresh
  drm/amdgpu/uvd6: add bypass support for fiji (v3)
  drm/amdgpu/fiji: set UVD CG state when enabling UVD DPM (v2)
  drm/powerplay: add missing clockgating callback for tonga
  drm/amdgpu: Constify some tables
  drm/amd/powerplay: Delete dead struct declaration
  drm/amd/powerplay/hwmgr: don't add invalid voltage
  drm/amd/powerplay/hwmgr: prevent VDDC from exceeding 2V
  MAINTAINERS: Remove unneded wildcard for the Radeon/AMDGPU drivers
  drm/radeon: add cayman VM support for append packet.
  drm/amd/amdgpu: Add debugfs entries for smc/didt/pcie
  drm/amd/amdgpu: Drop print_status callbacks.
  drm/amd/powerplay: revise reading/writing pptable on Polaris10
  drm/amd/powerplay: revise reading/writing pptable on Tonga
  drm/amd/powerplay: revise reading/writing pptable on Fiji
  drm/amd/powerplay: revise caching the soft pptable and add it's size
  drm/amd/powerplay: add dpm force multiple levels on cz/tonga/fiji/polaris (v2)
  drm/amd/powerplay: fix fan speed percent setting error on Polaris10
  drm/amd/powerplay: fix bug dpm can't work when resume back on Polaris
  ...
2016-05-06 14:17:22 +10:00
Stefan Agner
2c80661d2e drm/fsl-dcu: use bus_flags for pixel clock polarity
The drivers current default configuration drives the pixel data
on rising edge of the pixel clock. However, most display sample
data on rising edge... This leads to color shift artefacts visible
especially at edges.

This patch changes the relevant defines to be useful and actually
set the bits, and changes pixel clock polarity to drive the pixel
data on falling edge by default. The patch also adds an explicit
pixel clock polarity flag to the display introduced with the driver
(NEC WQVGA "nec,nl4827hc19-05b") using the new bus_flags field to
retain the initial behavior.

Signed-off-by: Stefan Agner <stefan@agner.ch>
2016-05-05 10:09:06 -07:00
Stefan Agner
f0aa08387b drm: introduce bus_flags in drm_display_info
Introduce bus_flags to specify display bus properties like signal
polarities. This is useful for parallel display buses, e.g. to
specify the pixel clock or data enable polarity.

Suggested-by: Thierry Reding <thierry.reding@gmail.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Manfred Schlaegl <manfred.schlaegl@gmx.at>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Stefan Agner <stefan@agner.ch>
2016-05-05 10:09:01 -07:00
Maarten Lankhorst
f2d580b9a8 drm/core: Do not preserve framebuffer on rmfb, v4.
It turns out that preserving framebuffers after the rmfb call breaks
vmwgfx userspace. This was originally introduced because it was thought
nobody relied on the behavior, but unfortunately it seems there are
exceptions.

drm_framebuffer_remove may fail with -EINTR now, so a straight revert
is impossible. There is no way to remove the framebuffer from the lists
and active planes without introducing a race because of the different
locking requirements. Instead call drm_framebuffer_remove from a
workqueue, which is unaffected by signals.

Changes since v1:
- Add comment.
Changes since v2:
- Add fastpath for refcount = 1. (danvet)
Changes since v3:
- Rebased.
- Restore lastclose framebuffer removal too.

Cc: stable@vger.kernel.org #v4.4+
Fixes: 1380313281 ("drm/core: Preserve the framebuffer after removing it.")
Testcase: kms_rmfb_basic
References: https://lists.freedesktop.org/archives/dri-devel/2016-March/102876.html
Cc: Thomas Hellstrom <thellstrom@vmware.com>
Cc: David Herrmann <dh.herrmann@gmail.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Tested-by: Thomas Hellstrom <thellstrom@vmware.com> #v3
Tested-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/6c63ca37-0e7e-ac7f-a6d2-c7822e3d611f@linux.intel.com
2016-05-05 13:50:53 +02:00
Lyude
af509d38bb drm/fb_helper: Fix a few typos
s/modest/modeset/
s/aftert/after/

Signed-off-by: Lyude <cpaul@redhat.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1462375734-8213-3-git-send-email-cpaul@redhat.com
2016-05-05 09:12:42 +02:00
Dave Airlie
0552f7651b drm/i915/mst: use reference counted connectors. (v3)
Don't just free the connector when we get the destroy callback.

Drop a reference to it, and set it's mst_port to NULL so
no more mst work is done on it.

v2: core mst accepts NULLs fine. Cleanup EDID code properly.
v3: drop the extra reference we were taking.

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-05-05 12:52:07 +10:00
Dave Airlie
d2307dea14 drm/atomic: use connector references (v3)
Take a reference when setting a crtc on a connecter,
also take one when duplicating if a crtc is set,
and drop one on destroy if a crtc is set.

v2: take Daniel Stone's advice and simplify the
ref/unref dances, also take care of NULL as connector
to state reset.

v3: remove need for connector NULL check.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-05-05 12:52:05 +10:00
Dave Airlie
0955c1250e drm/crtc: take references to connectors used in a modeset. (v2)
This just takes a reference on the connector when we set a mode
in the non-atomic paths.

v2: Follow Daniel Stone's suggestions on when to take/drop
references.

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-05-05 12:52:01 +10:00
Dave Airlie
6e86d58be3 drm/fb_helper: add connector reference counting. (v2)
This takes a reference count when fbdev adds the connector,
and drops it when it removes the connector.

It also drops the now unneeded code to find connectors
and remove the from the modeset as they are reference counted.

v2: drop references when removing all connectors at end.

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-05-05 12:51:57 +10:00
Dave Airlie
b164d31f50 drm/modes: add connector reference counting. (v2)
This uses the previous changes to add reference counts
to drm connector objects.

v2: move fbdev changes to their own patch.
add some kerneldoc

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-05-05 12:51:53 +10:00
Dave Airlie
fca097169f Merge tag 'drm-intel-fixes-2016-05-02' of git://anongit.freedesktop.org/drm-intel into drm-fixes
i915 fixes for 4.6. A bit more than I'd like at this stage, but
OTOH they're all stable material.

* tag 'drm-intel-fixes-2016-05-02' of git://anongit.freedesktop.org/drm-intel:
  drm/i915: Make RPS EI/thresholds multiple of 25 on SNB-BDW
  drm/i915: Fake HDMI live status
  drm/i915: Fix eDP low vswing for Broadwell
  drm/i915/ddi: Fix eDP VDD handling during booting and suspend/resume
  drm/i915: Fix system resume if PCI device remained enabled
  drm/i915: Avoid stalling on pending flips for legacy cursor updates
2016-05-05 12:12:09 +10:00
Dave Airlie
80623de03b Merge branch 'drm-fixes-4.6' of git://people.freedesktop.org/~agd5f/linux into drm-fixes
two fixes for hw lockups and one for a double free

* 'drm-fixes-4.6' of git://people.freedesktop.org/~agd5f/linux:
  drm/amdgpu: make sure vertical front porch is at least 1
  drm/radeon: make sure vertical front porch is at least 1
  drm/amdgpu: set metadata pointer to NULL after freeing.
2016-05-05 10:37:25 +10:00
Philipp Zabel
503fe87bd0 gpu: ipu-v3: Fix imx-ipuv3-crtc module autoloading
If of_node is set before calling platform_device_add, the driver core
will try to use of: modalias matching, which fails because the device
tree nodes don't have a compatible property set. This patch fixes
imx-ipuv3-crtc module autoloading by setting the of_node property only
after the platform modalias is set.

Fixes: 304e6be652 ("gpu: ipu-v3: Assign of_node of child platform devices to corresponding ports")
Reported-by: Dennis Gilmore <dennis@ausil.us>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Tested-By: Dennis Gilmore <dennis@ausil.us>
Cc: stable@vger.kernel.org # 4.4+
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-05-05 10:34:52 +10:00
Muhammad Falak R Wani
84fae133f0 drm/amdgpu: Replace rcu_assign_pointer() with RCU_INIT_POINTER()
The rcu_assign_pointer() ensures that the initialization of a structure
is carried out before storing a pointer to that structre. It is always
safe to use RCU_INIT_POINTER() to NULL a pointer, instead of
rcu_assign_pointer().
This results in slightly smaller/faster code.

The following semantic patch was used:
<smpl>

@@
@@

- rcu_assign_pointer
+ RCU_INIT_POINTER
  (..., NULL)

</smpl>

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Muhammad Falak R Wani <falakreyaz@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:31:06 -04:00
Alex Deucher
6b8812eb00 drm/amdgpu: use drm_mode_vrefresh() rather than mode->vrefresh
This is a port of radeon commit:
3d2d98ee1a
drm/radeon: use drm_mode_vrefresh() rather than mode->vrefresh
to amdgpu.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-05-04 20:31:02 -04:00
Alex Deucher
a0cdef9e82 drm/amdgpu/uvd6: add bypass support for fiji (v3)
Handle uvd clock bypass settings as part of clockgating
setup.

v2: fix gate logic
v3: fix header include

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:30:57 -04:00
Alex Deucher
bdf1ecea3c drm/amdgpu/fiji: set UVD CG state when enabling UVD DPM (v2)
Need to call the IP cg callbacks.

v2: fix gate logic

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:30:44 -04:00
Alex Deucher
ce90dbd9b8 drm/powerplay: add missing clockgating callback for tonga
Without this clockgating is not enabled.

Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:30:38 -04:00
Nils Wallménius
909a0631b1 drm/amdgpu: Constify some tables
Some more tables with constant data were added with the polaris support

v2: missed a few

Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:30:34 -04:00
Nils Wallménius
58174c2787 drm/amd/powerplay: Delete dead struct declaration
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:30:31 -04:00
Moritz Kühner
ac0cc35008 drm/amd/powerplay/hwmgr: don't add invalid voltage
if atomctrl_get_voltage_evv_on_sclk returns non zero (fail) in the expansion
of the PP_ASSERT_WITH_CODE macro the continue will actually do nothing
(The macro uses a do ... while(0) as scope, which eats the continue).
Based on the code I don't think this was the intent.
Unfortunately fixing this requires rewriting the control flow and
removing the macros.

v2: added signed of by
fixed error message print

v3: agd: drop DRM_ERROR

Signed-off-by: Moritz Kühner <kuehner.moritz@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:30:27 -04:00
Moritz Kühner
c790f87318 drm/amd/powerplay/hwmgr: prevent VDDC from exceeding 2V
If the tonga gpu is controlled by SVID2 tonga_get_evv_voltage will only print
an error if the voltage exceeds 2V although a comment clearly states that it
needs be less than 2V.

v2: added signed of by

Signed-off-by: Moritz Kühner <kuehner.moritz@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:30:24 -04:00
Dave Airlie
84ef4c12ee drm/radeon: add cayman VM support for append packet.
This adds support for SET_APPEND_CNT packet3 to the VM paths.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:30:16 -04:00
Tom St Denis
adcec288bc drm/amd/amdgpu: Add debugfs entries for smc/didt/pcie
This adds 3 new files that can be read/written to access
indirect GPU registers.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:30:11 -04:00
Tom St Denis
16a7989ac6 drm/amd/amdgpu: Drop print_status callbacks.
First patch in series to move to user mode
debug tools we're removing the print_status callbacks.

These functions were unused at the moment anyway.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:30:06 -04:00
Eric Huang
a72d5604ea drm/amd/powerplay: revise reading/writing pptable on Polaris10
Change the way we store pptables in the driver to better
facilitate eventual runtime updates for debugging.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:30:02 -04:00
Eric Huang
92dea67dd6 drm/amd/powerplay: revise reading/writing pptable on Tonga
Change the way we store pptables in the driver to better
facilitate eventual runtime updates for debugging.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:29:59 -04:00
Eric Huang
65ba4f227c drm/amd/powerplay: revise reading/writing pptable on Fiji
Change the way we store pptables in the driver to better
facilitate eventual runtime updates for debugging.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:29:55 -04:00
Eric Huang
1551019523 drm/amd/powerplay: revise caching the soft pptable and add it's size
This fixes a bug in the pptable access interface that could lead to
a crash.  Check the pointer before using it.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:29:52 -04:00
Eric Huang
5632708f44 drm/amd/powerplay: add dpm force multiple levels on cz/tonga/fiji/polaris (v2)
Allows you to force multiple levels rather than just one via the new
sysfs interrface.

v2: squash in:
drm/amd/powerplay: ensure clock level set by user is valid.
From Rex.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:29:47 -04:00
Eric Huang
5122438954 drm/amd/powerplay: fix fan speed percent setting error on Polaris10
The logic was reversed.

Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:29:43 -04:00
Eric Huang
681ed01c62 drm/amd/powerplay: fix bug dpm can't work when resume back on Polaris
Need to initialize the values to 0 since they get or'ed with additional
values.  If the initialization is missing, on resume, they may end up
with a combination of stale data and new data.

Fixes dpm on resume.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:29:39 -04:00
Rex Zhu
7d367c2aea drm/amd/powerplay: fix some initialize error on polaris10.
1. don't enable SclkThrottleLowNotification, it's not supported.
2. Set missing mclk_dpm0_activity_target

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:29:34 -04:00
Rex Zhu
7383bcb94a drm/amd/powerplay: return 0 when interface not implement on some asic.
Don't fail if certain optional interface callbacks are missing.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:29:27 -04:00
Mykola Lysenko
0b45541df3 drm/amdgpu: fix memory leak in CGS (FW info)
Previously requested FW pointer should not be
overwritten on a subsequent call.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Mykola Lysenko <Mykola.Lysenko@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:29:20 -04:00
Rex Zhu
b0d113453a drm/amd/powerplay: update vce power gate state for baffin.
Forgot to save the current gate state so we don't know
what the current state is if we try and gate/ungate the
block.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:29:15 -04:00
Eric Huang
c8c67448b7 drm/amd/powerplay: Fix a bug for enabling ACDC gpio interrupt
Only enable it if it's supported rather than unconitionally.

Signed-off-by: Eric Yang <eric.yang2@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:29:11 -04:00
Rex Zhu
dcf799e54b drm/amd/powerplay: fix issue that get wrong reference clock value.
use wrong parameter to compute the reference clock.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:29:07 -04:00
Rex Zhu
e16ff21d2a drm/amd/powerplay: parameter updates according to SMC.
Update to latest changes for SMC team.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:29:03 -04:00
Rex Zhu
9e26bbb36a drm/amd/powerplay: add fan control mode interface for baffin
Add interface for manual fan control.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:28:59 -04:00
Rex Zhu
f0911de82c drm/amd/powerplay: enable some feature for baffin/ellesmere. (v2)
Sync up with internal updates.

v2: squash in:
drm/amd/powerplay: set revert flag for enable thermal protect.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:28:53 -04:00
Rex Zhu
925a51c442 drm/amdgpu: code style refine.
Whitespace fix.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:28:50 -04:00
Alex Deucher
5f88567c62 drm/amd/powerplay: fix copy paste error in error message
Noticed-by: Vasily Anonimov <vasily.anonimov@googlemail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:28:44 -04:00
Slava Grigorev
ae17c999f0 drm/amd/amdgpu: fix 64-bit division
Signed-off-by: Slava Grigorev <slava.grigorev@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:28:37 -04:00
Flora Cui
f89510686c drm/amdgpu: add polaris10/11 smc fw declaration
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:28:33 -04:00
Rex Zhu
5de95e55de drm/amd/powerplay: Disable Spread Spectrum on DPM 0 on baffin as SPLL Shut Down feature is enabled.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Flora Cui <Flora.Cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:28:24 -04:00
Rex Zhu
2043f43e4b drm/amd/powerplay: enable set lowest mclk clock on baffin.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:28:19 -04:00
Rex Zhu
971f8daafa drm/amd/powrplay: fix issue that get wrong enable flag.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:28:13 -04:00
Rex Zhu
b4c6f99ee7 drm/amd/powerplay: fix mclk in high clock for baffin
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:28:08 -04:00
Rex Zhu
b2d9614318 drm/amd/powerplay: print gpu loading and uvd/vce power gate enablement for polaris10/11.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:28:02 -04:00
Flora Cui
2cc0c0b5cd drm/amdgpu: change ELM/BAF to Polaris10/Polaris11
Adjust to preferred code names.

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:27:57 -04:00
Flora Cui
a3ad7a9ad8 drm/amdgpu: add ELM/BAF pci ids
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:27:51 -04:00
Flora Cui
c0c1f579e6 drm/amdgpu: update the core VI support for ELM/BAF
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:27:45 -04:00
Flora Cui
c5a93a282f drm/amdgpu: ungate SMC clockgating first before suspend
46c34bcb6a15dd85329a39a5e72c62108626acdc put all block’s clockgating
support in SMC. The sequence in suspend routine should be adjusted
accordingly, otherwise it causes asic hang.

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:27:39 -04:00
Eric Huang
f4bfffddd7 drm/amd/amdgpu: add power gating init for Baffin
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:27:34 -04:00
Eric Huang
2b6cd97797 drm/amd/amdgpu: add power gating initialization support for GFX8.0
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:27:28 -04:00
Flora Cui
538333f0dc drm/amd/powerplay: add default clockgating handling
This is to workaround regression introduced in
46c34bcb6a15dd85329a39a5e72c62108626acdc. It should be reverted with a
final fix.

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:27:22 -04:00
Eric Huang
62a86fc234 drm/amd/amdgpu: add medium grain powergating support for Baffin
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:27:16 -04:00
Eric Huang
7df48927b2 drm/amd/powerplay: add GFX per cu powergating for Baffin
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:27:09 -04:00
Eric Huang
65f85e7d82 drm/amd/powerplay: add GFX per cu powergating support through SMU/powerplay
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:27:02 -04:00
Eric Huang
bacec8985f drm/amd/amdgpu: add query GFX cu info in CGS query system info
Needed for per CU powergating.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:26:55 -04:00
Eric Huang
8fe3d33307 drm/amd/powerplay: add GFX/SYS clockgating support for ELM/BAF
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:26:48 -04:00
Eric Huang
03e3905f21 drm/amd/powerplay: add all blocks clockgating support through SMU/powerplay
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:26:42 -04:00
yanyang1
e85c7d664d drm/amd/powerplay: update baffin & ellesmere smc_sk firmware.
sync the code form catalyst CL:#1230866.

Signed-off-by: yanyang1 <Young.Yang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:26:33 -04:00
yanyang1
a6ece7ffd9 drm/amd/powerplay: Add smc_sk firmware to baffin & ellesmere.
update relational h files.

Signed-off-by: yanyang1 <Young.Yang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:26:26 -04:00
yanyang1
735f002b14 drm/amd/amdgpu: Add smc_sk firmware in baffin & ellesmere.
add CGS_UCODE_ID_SMU_SK.

Signed-off-by: yanyang1 <Young.Yang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:26:19 -04:00
Eric Huang
92c6d645ee drm/amd/powerplay: add UVD&VCE DPM and powergating support for elm/baf
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:26:13 -04:00
Eric Huang
eede52627b drm/amd/powerplay: add thermal control for elm/baf
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:26:07 -04:00
Rex Zhu
0ff71753ef drm/amd/powerplay: enable powerplay for baffin.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:26:01 -04:00
Rex Zhu
b83c4ab9ca drm/amd/powerplay: init hwmgr for ELM/BAF
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:25:56 -04:00
Rex Zhu
a23eefa2f4 drm/amd/powerplay: enable dpm for baffin.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:25:50 -04:00
rezhu
c81726252e drm/amd/powerplay: add smu support for ellesmere/baffin
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:25:43 -04:00
rezhu
b304ac83ee drm/amd/powerplay: add header files for ellesmere smu manager.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:25:38 -04:00
Sonny Jiang
1b4eeea5f7 drm/amdgpu: add VCE support to ELM/BAF
Ellesmere and Baffin are VCE 3.4

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:25:29 -04:00
Sonny Jiang
38d7581764 drm/amdgpu: add UVD support for ELM/BAF
Ellesmere and Baffin are UVD 6.3

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:25:18 -04:00
Flora Cui
68182d909b drm/amdgpu: add GFX support for ELM/BAF
V2: use gfx_8_0_*.h instead of gfx_8_1_*.h
v3: agd: integrate support for gfx info table

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:25:11 -04:00
Flora Cui
d7120b8f22 drm/amdgpu: add mmRLC_CGCG_CGLS_CTRL_3D & mmRLC_CGCG_RAMP_CTRL_3D
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:25:02 -04:00
Alex Deucher
397a270eff drm/amdgpu: add an interface to get gfx constants from atombios
Fetch the values from atom rather than hardcoding them in the
driver.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:24:57 -04:00
Flora Cui
2cea03de10 drm/amdgpu: add SDMA support for ELM/BAF
V2: seperate baffin & ellesmere settings instead of using fiji ones.

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:24:50 -04:00
Flora Cui
60909285ef drm/amdgpu: add DCE golden setting for ELM/BAF
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:24:38 -04:00
Flora Cui
c9778572e9 drm/amdgpu: add GMC support for ELM/BAF
V2: add golden_settings_baffin_a11 instead of reuse golden_settings_fiji_a10

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:24:27 -04:00
Alex Deucher
b18e6ad781 drm/amdgpu/dce11: add dce clock setting for ELM/BAF
Setup the disp clock and dp reference clock.  This is
now a separate command table on elm/baf compared to
older asics.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2016-05-04 20:24:22 -04:00
Alex Deucher
22f0c5bd14 drm/amdgpu/dce11: update pll programming for ELM/BAF
SetPixelClock table handles pll divider calculation and
spread spectrum setup, so no need to use calculate the
dividers and call the ss enable cmd table.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2016-05-04 20:24:17 -04:00
Alex Deucher
927a81c98e drm/amdgpu: add ELM/BAF support to dce_v11_0_pick_pll (v2)
New PLL scheme on ELM/BAF.

v2: squash in pll fix.  Plls are part of the phys.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2016-05-04 20:24:13 -04:00
Alex Deucher
d031287a43 drm/amdgpu/atom: add support for new UNIPHYTransmitterContol cmd table
New uniphy transmitter setup table for elm/baf.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2016-05-04 20:24:08 -04:00
Alex Deucher
4b5844e8bf drm/amdgpu/atom: add support for new DIGxEncoderControl cmd table
New digital encoder setup table for elm/baf.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2016-05-04 20:24:04 -04:00
Alex Deucher
ee681c9aa2 drm/amdgpu/atom: add support for new SetPixelClock table
New version of the SetPixelClock table for elm/baf.  The
new table calculates the pll dividers and handles spread
spectrum calculations and setup.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2016-05-04 20:23:58 -04:00
Alex Deucher
541cd55557 drm/amdgpu/atom: add SetDCEClock helper
New cmd table for ELM/BAF for setting the dispclock or
dprefclock.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2016-05-04 20:23:53 -04:00
Alex Deucher
6e14e92b3d drm/amdgpu: update atombios.h (v2)
update to internal version 893

v2: Pull in gfx_info changes from 898

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2016-05-04 20:23:49 -04:00
Alex Deucher
2238445925 drm/amdgpu: bump the afmt limit for CZ, ST, Polaris
Fixes array overflow on these chips.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-05-04 20:23:43 -04:00
Alex Deucher
f195038c7e drm/amdgpu: use defines for CRTCs and AMFT blocks
Prerequiste for the next patch which ups the limits.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-05-04 20:23:35 -04:00
Alex Deucher
d525eb8d2e drm/amdgpu: add ELM/BAF DCE11 configs (v2)
Add support for the display configuration on elm/baf.

v2: add missing Stoney case

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2016-05-04 20:23:28 -04:00
Alex Deucher
b81223001f drm/amdgpu: add ELM/BAF asic types
New asic types for ellesmere and baffin.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2016-05-04 20:23:22 -04:00
Alex Deucher
7edbb0d389 drm/amd: add DCE 11.2 register headers
Add register headers for DCE (Display and Composition Engine)
11.2.

Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:23:19 -04:00
Bas Nieuwenhuizen
3d02b7fee9 drm/radeon: Allow setting shader registers using DMA/COPY packet3 on SI.
Mesa uses a COPY_DATA packet to copy the grid size for indirect dispatches
into COMPUTE_USER_DATA_*.

Setting those registers with a SET_SH_REG packet is allowed, not allowing
them with other packets seems like an oversight.

v2: Clarify commit message.

Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:23:15 -04:00
Christian König
b76af4a419 drm/amdgpu: remove sorting of CS BOs
Not needed any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:23:12 -04:00
Christian König
29b3259a3a drm/amdgpu: group BOs by log2 of the size on the LRU v2
This allows us to have small BOs on the LRU before big ones.

v2: fix of by one and list corruption bug

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:23:08 -04:00
Dave Airlie
1359d6e494 drm/amdgpu: drop apply quirks for now.
This isn't being used so drop it.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:23:02 -04:00
Chunming Zhou
178d7cb8d5 drm/amdgpu: fix error checking when reuse vmid on same ring
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:22:58 -04:00
Chunming Zhou
68befebee4 drm/amdgpu: only update last_flush when vmid doesn't have other new owner
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:22:55 -04:00
Chunming Zhou
66067ad73c drm/amdgpu: double fence slot
we introduced vmid fence, so one hw submission could produce two fences.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:22:48 -04:00
Alex Deucher
1bf912ffa6 drm/amdgpu: enable sdma clockgating on ST
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:22:45 -04:00
Alex Deucher
6f17a257d3 drm/amdgpu: enable sdma clockgating on CZ
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:22:40 -04:00
Alex Deucher
ce22362b79 drm/amdgpu/sdma: rename fiji cg functions
They care common for all sdma 3.0 parts

Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:22:36 -04:00
Alex Deucher
b6711d1b88 drm/amdgpu: enable gmc clockgating for ST
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:22:34 -04:00
Alex Deucher
03c335d3d5 drm/amdgpu: enable gmc clockgating for CZ
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:22:30 -04:00
Alex Deucher
76f10b9ada drm/amdgpu/vi: rename fiji cg functions
They can be used for other VI parts.

Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:22:27 -04:00
Alex Deucher
6469490567 drm/amdgpu: enable gfx clockgating for ST (v2)
v2: just enable MGCG for now since CGCG causes hangs

Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:22:24 -04:00
Alex Deucher
70eced9b2e drm/amdgpu: enable gfx clockgating for CZ
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:22:20 -04:00
Alex Deucher
dbff57bc7b drm/amdgpu/gfx: rework fiji cg functions so they can be shared
They can be shared with other asics with minor modifications.

Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:22:17 -04:00
Alex Deucher
79e5412c58 drm/amdgpu: add a new set of rlc function pointers
Different asics tend to have different ways to interact
with the RLC.  This just covers enter/exit of safe mode
for updating CG and PG state, but could be extended to
cover other RLC operations in the future if necessary.

Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:22:11 -04:00
Alex Deucher
146f256fae drm/amdgpu/gfx: adjust gfx_v8_0_send_serdes_cmd for ST
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:22:05 -04:00
Alex Deucher
79deaaf4a9 drm/amdgpu/gfx8: rename send_serdes_cmd
So it can be shared with CZ/ST.

Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:22:02 -04:00
Alex Deucher
3fde56b8db drm/amdgpu/gmc: add proper CG flags for fiji
We were already enabling these CG features, this uses
the standard interface for doing so.

Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:21:59 -04:00
Alex Deucher
c90766cf4e drm/amdgpu/common: add proper CG flags for fiji
We were already enabling these CG features, this uses
the standard interface for doing so.

Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:21:55 -04:00
Alex Deucher
e08d53cb69 drm/amdgpu/sdma: add proper CG flags for fiji
We were already enabling these CG features, this uses
the standard interface for doing so.

Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:21:52 -04:00
Alex Deucher
14698b6c79 drm/amdgpu/gfx: add proper CG flags for fiji
We were already enabling these CG features, this uses
the standard interface for doing so.

Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:21:48 -04:00
Alex Deucher
4fae91c5e2 drm/amdgpu: add new CG flag for ROM clockgating
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:21:43 -04:00
Christian König
98c2872ae9 drm/ttm: implement LRU add callbacks v2
This allows fine grained control for the driver where to add a BO into the LRU.

v2: fix typo in comment

Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:21:38 -04:00
Christian König
c3ea576e05 drm/ttm: add optional LRU removal callback v2
Useful for driver specific LRU handling.

v2: fix typo in comment

Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:21:34 -04:00
Christian König
00cfd664f6 drm/ttm: remove unused validation sequence
Not used any more.

Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:21:30 -04:00
Christian König
8aa6d4fc5f drm/ttm: remove lazy parameter from ttm_bo_wait
Not used any more.

Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:21:26 -04:00
Christian König
dfd5e50ea4 drm/ttm: remove use_ticket parameter from ttm_bo_reserve
Not used any more.

Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:21:21 -04:00
Christian König
5ee7b41a8b drm/ttm: don't wait for BO on initial allocation
When we use an extern reservation object that otherwise waits for every
fence registered with it.

Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:21:15 -04:00
Christian König
eb43096900 drm/amdgpu: fix the coding style in amdgpu_ring.c
No functional change.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:21:12 -04:00
Christian König
771c8ec177 drm/amdgpu: use the ring name for debugfs (v2)
Instead of hard coding just another name in the ring code.

v2: squash in Tom's rebase fix

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:21:03 -04:00
Christian König
b38d99c4f4 drm/amdgpu: reduce the ring size for SDMA
Those are way too large.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:20:58 -04:00
Christian König
2800de2e9e drm/amdgpu: reduce the ring size for GFX
Those are way too large.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:20:54 -04:00
Christian König
a3f1cf355e drm/amdgpu: use max_dw in ring_init
Instead of specifying the total ring size calculate that from the maximum
number of dw a submission can have and the number of concurrent submissions.

This fixes UVD with 8 concurrent submissions or more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:20:50 -04:00