As preparation we want all common BCM2711 + BCM2835/6/7 functions in
bcm283x.dtsi and all BCM2835/6/7 specific in the new
bcm2835-common.dtsi. Since i2c2 is BCM2835 specific, we also need
to move it to bcm2835-common.dtsi.
Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Acked-by: Eric Anholt <eric@anholt.net>
There might be headless setups of the Compute Module without HDMI,
so better enable HDMI at board level. Btw this allows moving HDMI
base definition into upcoming bcm2835-common.dtsi.
Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
Now with the varity of several RPi boards, the memory should be defined
at board level. This step gives us the chance to fix the memory size
of the RPi 1 B+, Zero (incl. W) and Compute Module 1.
Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Acked-by: Eric Anholt <eric@anholt.net>
Starting with RPi 4 this is the first board, which doesn't use sdhost
as default SD interface. So the MMC interfaces should be defined finally at
board level. Since all boards using sdhci already does this, we can drop the
pinctrl part from bcm2835-rpi.dtsi.
Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Acked-by: Eric Anholt <eric@anholt.net>
As usual, the drivers/tee and drivers/reset subsystems get merged
here, with the expected set of smaller updates and some new hardware
support. The tee subsystem now supports device drivers to be attached
to a tee, the first example here is a random number driver with its
implementation in the secure world.
Three new power domain drivers get added for specific chip families:
- Broadcom BCM283x chips (used in Raspberry Pi)
- Qualcomm Snapdragon phone chips
- Xilinx ZynqMP FPGA SoCs
One new driver is added to talk to the BPMP firmware on NVIDIA
Tegra210
Existing drivers are extended for new SoC variants from NXP,
NVIDIA, Amlogic and Qualcomm.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC driver updates from Arnd Bergmann:
"As usual, the drivers/tee and drivers/reset subsystems get merged
here, with the expected set of smaller updates and some new hardware
support. The tee subsystem now supports device drivers to be attached
to a tee, the first example here is a random number driver with its
implementation in the secure world.
Three new power domain drivers get added for specific chip families:
- Broadcom BCM283x chips (used in Raspberry Pi)
- Qualcomm Snapdragon phone chips
- Xilinx ZynqMP FPGA SoCs
One new driver is added to talk to the BPMP firmware on NVIDIA
Tegra210
Existing drivers are extended for new SoC variants from NXP, NVIDIA,
Amlogic and Qualcomm"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (113 commits)
tee: optee: update optee_msg.h and optee_smc.h to dual license
tee: add cancellation support to client interface
dpaa2-eth: configure the cache stashing amount on a queue
soc: fsl: dpio: configure cache stashing destination
soc: fsl: dpio: enable frame data cache stashing per software portal
soc: fsl: guts: make fsl_guts_get_svr() static
hwrng: make symbol 'optee_rng_id_table' static
tee: optee: Fix unsigned comparison with less than zero
hwrng: Fix unsigned comparison with less than zero
tee: fix possible error pointer ctx dereferencing
hwrng: optee: Initialize some structs using memset instead of braces
tee: optee: Initialize some structs using memset instead of braces
soc: fsl: dpio: fix memory leak of a struct qbman on error exit path
clk: tegra: dfll: Make symbol 'tegra210_cpu_cvb_tables' static
soc: qcom: llcc-slice: Fix typos
qcom: soc: llcc-slice: Consolidate some code
qcom: soc: llcc-slice: Clear the global drv_data pointer on error
drivers: soc: xilinx: Add ZynqMP power domain driver
firmware: xilinx: Add APIs to control node status/power
dt-bindings: power: Add ZynqMP power domain bindings
...
Compiling the bcm2835-rpi.dtsi with W=1 leads to the following warning:
Warning (avoid_unnecessary_addr_size): /soc/firmware: unnecessary
#address-cells/#size-cells without "ranges" or child "reg" property
Fix this by removing these unnecessary properties.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Compiling the bcm283x DTS with W=1 leads to the following warning:
Warning (unit_address_vs_reg): /memory: node has a reg or ranges property,
but no unit name
Fix this by adding the unit address.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
The GRAFX domain only contains V3D, and this driver should be the only
accessor of V3D (firmware usage gets disabled when V3D is in the DT),
so we can safely make Linux control the GRAFX and GRAFX_V3D power
domains.
Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
The size field in a Device Tree "reg" property is encoded in bytes, not
words.
Fixes: 614fa22119 ("ARM: dts: bcm2835: Add VCHIQ node to the Raspberry Pi boards. (v3)")
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
To allow VCHIQ to determine the correct cache line size, use the new
"brcm,bcm2836-vchiq" compatible string on BCM2836 and BCM2837.
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
All RPi 1 and 2 boards used the PWM (audio out) on pin 40 and 45.
So it was easy to define them in bcm2835-rpi.dtsi. Starting with RPi 3
this wont work anymore, because it uses pin 40 and 41. Furthermore the
Zero variants doesn't have audio out.
This patch fixes this pin conflict by moving the PWM node to the board-level.
Change summary:
RPi 3 B: PWM1 45 -> 41
Zero, Zero W: PWM disabled
all other: no functional change
Reported-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Eric Anholt <eric@anholt.net>
This is the usual set of changes for device trees, with over 700
non-merged changesets. There is an ongoing set of dtc warning fixes and
the usual bugfixes, cleanups and added device support.
The most interesting bit as usual is support for new machines listed
below:
- The Allwinner H6 makes its debut with the Pine-H64 board, and we get
two new machines based on its older siblings: the H5 based OrangePi
Zero+ and the A64 based Teres-I Laptop from Olimex. On the 32-bit side,
we add The Olimex som204 based on Allwinner A20, and the Banana Pi M2
Zero development board (based on H2).
- NVIDIA adds support for Tegra194 aka "Xavier", plus their p2972
development board and p2888 CPU module.
- The Nuvoton npcm750 is a BMC that was newly added, for now we only
support running on the evaluation board.
- STmicroelectronics stm32 gains support for the stm32mp157c and two
evaluation boards.
- The Toradex Colibri board family grows a few members based on the
i.MX6ULL variant.
- The Advantec DMS-BA16 is a Qseven module using the NXP i.MX6
family of chips.
- The Phytec phyBOARD Mira is a family of industrial boards based on
i.MX6. For now, four models get added.
- TI am335x based PDU-001 is an industrial embedded machine used for
traffic monitoring
- The Aspeed platform now supports running on the BMC on the Qualcomm
Centriq 2400 server
- Samsung Exynos4 based Galaxy S3 is a family of mobile phones Qualcomm
msm8974 based Galaxy S5 is a rather different phone made by the same
company.
- The Xilinx Zynq and ZynqMP platforms now gained a lot of dts file
for the various boards made by Xilinx themselves, as well as the
Digilent Zybo Z7.
- The ARM Versatile family now supports the "IB2" interface board.
- The Renesas H2 based "Stout" and the H3 based Salvator-X are more
evaluation boards named after a kind of beer, as most of them are.
The r8a77980 (V3H) based "Condor" apparently doesn't follow that
tradition. ;-)
- ROC-RK3328-CC is a simple developement board from the Libre Computer
Project, based on the Rockchips RK3328 SoC
- Haiku is another development board plus Qseven module based on Rockchips
RK3368 and made by Theobroma Systems.
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC device tree updates from Arnd Bergmann:
"This is the usual set of changes for device trees, with over 700
non-merged changesets. There is an ongoing set of dtc warning fixes
and the usual bugfixes, cleanups and added device support.
The most interesting bit as usual is support for new machines listed
below:
- The Allwinner H6 makes its debut with the Pine-H64 board, and we
get two new machines based on its older siblings: the H5 based
OrangePi Zero+ and the A64 based Teres-I Laptop from Olimex. On the
32-bit side, we add The Olimex som204 based on Allwinner A20, and
the Banana Pi M2 Zero development board (based on H2).
- NVIDIA adds support for Tegra194 aka "Xavier", plus their p2972
development board and p2888 CPU module.
- The Nuvoton npcm750 is a BMC that was newly added, for now we only
support running on the evaluation board.
- STmicroelectronics stm32 gains support for the stm32mp157c and two
evaluation boards.
- The Toradex Colibri board family grows a few members based on the
i.MX6ULL variant.
- The Advantec DMS-BA16 is a Qseven module using the NXP i.MX6 family
of chips.
- The Phytec phyBOARD Mira is a family of industrial boards based on
i.MX6. For now, four models get added.
- TI am335x based PDU-001 is an industrial embedded machine used for
traffic monitoring
- The Aspeed platform now supports running on the BMC on the Qualcomm
Centriq 2400 server
- Samsung Exynos4 based Galaxy S3 is a family of mobile phones
Qualcomm msm8974 based Galaxy S5 is a rather different phone made
by the same company.
- The Xilinx Zynq and ZynqMP platforms now gained a lot of dts file
for the various boards made by Xilinx themselves, as well as the
Digilent Zybo Z7.
- The ARM Versatile family now supports the "IB2" interface board.
- The Renesas H2 based "Stout" and the H3 based Salvator-X are more
evaluation boards named after a kind of beer, as most of them are.
The r8a77980 (V3H) based "Condor" apparently doesn't follow that
tradition. ;-)
- ROC-RK3328-CC is a simple developement board from the Libre
Computer Project, based on the Rockchips RK3328 SoC
- Haiku is another development board plus Qseven module based on
Rockchips RK3368 and made by Theobroma Systems"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (701 commits)
arm: dts: modify Nuvoton NPCM7xx device tree structure
arm: dts: modify Makefile NPCM750 configuration name
arm: dts: modify clock binding in NPCM750 device tree
arm: dts: modify timer register size in NPCM750 device tree
arm: dts: modify UART compatible name in NPCM750 device tree
arm: dts: add watchdog device to NPCM750 device tree
arm64: dts: uniphier: add ethernet node for PXs3
ARM: dts: uniphier: add pinctrl groups of ethernet for second instance
arm: dts: kirkwood*.dts: use SPDX-License-Identifier for board using GPL-2.0+
arm: dts: kirkwood*.dts: use SPDX-License-Identifier for boards using GPL-2.0+/MIT
arm: dts: kirkwood*.dts: use SPDX-License-Identifier for boards using GPL-2.0
arm: dts: armada-385-turris-omnia: use SPDX-License-Identifier
arm: dts: armada-385-db-ap: use SPDX-License-Identifier
arm: dts: armada-388-rd: use SPDX-License-Identifier
arm: dts: armada-xp-db-xc3-24g4xg: use SPDX-License-Identifier
arm: dts: armada-xp-db-dxbc2: use SPDX-License-Identifier
arm: dts: armada-370-db: use SPDX-License-Identifier
arm: dts: armada-*.dts: use SPDX-License-Identifier for most of the Armada based board
arm: dts: armada-xp-98dx: use SPDX-License-Identifier for prestara 98d SoCs
arm: dts: armada-*.dtsi: use SPDX-License-Identifier for most of the Armada SoCs
...
The VCHIQ firmware communication channel operates in parallel with our
other mailbox-based channel. This is the communication channel that
exposes the firmware's media decode/encode and ISP interfaces.
Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com> (v2)
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This allows adding devices for which the firmware exposes control interface
via the mailbox. An example of such device is the GPIO expander.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Eric Anholt <eric@anholt.net>
Until RPI 3 and Zero W the pl011 (uart0) was always on pin 14/15. So in
order to take care of them and other boards in the future,
we need to define UART pinmuxing on board level.
This work based on Eric Anholt's patch "ARM: bcm2385: Don't force pl011
onto pins 14/15." and Fabian Vogt's patch "ARM64: dts: bcm2837: assign
uart0 to BT and uart1 to pin headers".
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Eric Anholt <eric@anholt.net>
sdcard access with the sdhost controller is faster.
Read access (dd with 64k blocks on rpi2):
CONFIG_MMC_SDHCI_IPROC: 11-12 MB/s
CONFIG_MMC_BCM2835: 19-20 MB/s
Differences on write access are pretty much in the noise.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Eric Anholt <eric@anholt.net>
The modules stay disabled by default, and if you want to enable DSI
you'll need an overlay that connects a panel to it.
Signed-off-by: Eric Anholt <eric@anholt.net>
Enable the VEC IP on all RaspberryPi boards.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
As the alt3 group has no pins left drop it from &gpio.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
This file is included from DTS files under arch/arm64 too (via
broadcom/bcm2837-rpi-3-b.dts and broadcom/bcm2837.dtsi). There is a desire
not to have skeleton.dtsi for ARM64. See commit 3ebee5a2e1 ("arm64: dts:
kill skeleton.dtsi") for rationale for its removal.
As well as the addition of #*-cells also requires adding the device_type to
the rpi memory node explicitly.
Note that this change results in the removal of an empty /aliases node from
bcm2835-rpi-a.dtb and bcm2835-rpi-a-plus.dtb. I have no hardware to check
if this is a problem or not.
It also results in some reordering of the nodes in the DTBs (the /aliases
and /memory nodes come later). This isn't supposed to matter but, again,
I've no hardware to check if it is true in this particular case.
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Tested-by: Stefan Wahren <stefan.wahren@i2se.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Frank Rowand <frowand.list@gmail.com>
Cc: Eric Anholt <eric@anholt.net>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Lee Jones <lee@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-rpi-kernel@lists.infradead.org
Cc: arm@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This connects the USB driver to the USB power domain, so that USB can
actually be turned on at boot if the bootloader didn't do it for us.
Signed-off-by: Alexander Aring <alex.aring@gmail.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
For Raspberry Pi 2, we want to use the same general pin assignment
bits, but need to use bcm2836.dtsi for the CPU instead.
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch converts all bcm2835 dts and dtsi files to use the pinctrl
header file.
Reviewed-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
The model B and B+ differ in the GPIO lines for ACT and PWR leds, and the
I2S interface.
Signed-off-by: Matthias Klein <matthias.klein@linux.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Lee Jones <lee@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
