Commit Graph

34744 Commits

Author SHA1 Message Date
Heiko Stuebner
fcbbf96525 ARM: dts: uses handles to reference nodes for changes
Use the handles for subsequent changes to nodes, similar to like the rk3288
submission does it.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-07-26 23:19:56 +02:00
Heiko Stuebner
e40b43d6ea ARM: dts: rockchip: add handles for shared nodes that don't have one yet
Some nodes that are changed in the dtsi hierarchy do not have handles yet.
As it was suggested in the rk3288 submission to do subsequent nodes changes
through such handle-references, add the missing ones.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-07-26 23:19:50 +02:00
Heiko Stuebner
c3030d30d9 ARM: dts: rockchip: remove soc subnodes
Comments received from the rk3288 submission indicated that a generic subnode
to group soc components should not be used.

So to keep all rockchip devicetree files similar, remove it from rk3066 and rk3188.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-07-26 23:19:06 +02:00
Heiko Stuebner
d356d96f85 arm: dts: rockchip: remove obsolete clock gate definitions
The clock and reset unit is now provided by the rk3188-cru clock driver and thus
the old style definitions of the gate clocks can go away.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-By: Max Schwarz <max.schwarz@online.de>
Tested-By: Max Schwarz <max.schwarz@online.de>
2014-07-26 23:15:33 +02:00
Heiko Stuebner
560106c1ca ARM: dts: rockchip: move oscillator input clock into main dtsi
The clock definitions get a lot shorter due to the soc clocks being handled by
rk3188-cru and only the input clock remains. These can now simply live
in the main rk3xxx.dtsi without affecting readability.

At the same time, rename the node to oscillator, adding a clock-output-names
property to match how the rk3288 handles this.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-By: Max Schwarz <max.schwarz@online.de>
Tested-By: Max Schwarz <max.schwarz@online.de>
2014-07-26 23:15:31 +02:00
Heiko Stuebner
b13d2a7b43 ARM: dts: rockchip: add cru nodes and update device clocks to use it
This adds a node for the clock and reset unit on rk3188 and rk3066 SoCs and
also updates the device nodes retrieve their clocks from there, instead of
the previous gate clock nodes.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-By: Max Schwarz <max.schwarz@online.de>
Tested-By: Max Schwarz <max.schwarz@online.de>
2014-07-26 23:15:22 +02:00
Heiko Stübner
1fe69496cf ARM: rockchip: Select ARCH_HAS_RESET_CONTROLLER
All known Rockchip SoCs have a reset controller in their CRUs, so it's
helpful to have the reset controller framework selected by default,
only be deselected by the user in special cases.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-By: Max Schwarz <max.schwarz@online.de>
Tested-By: Max Schwarz <max.schwarz@online.de>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-07-13 12:17:11 -07:00
Linus Torvalds
ef2e0391e5 Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm
Pull ARM fixes from Russell King:
 "Another round of ARM fixes.  The largest change here is the L2 changes
  to work around problems for the Armada 37x/380 devices, where most of
  the size comes down to comments rather than code.

  The other significant fix here is for the ptrace code, to ensure that
  rewritten syscalls work as intended.  This was pointed out by Kees
  Cook, but Will Deacon reworked the patch to be more elegant.

  The remainder are fairly trivial changes"

* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
  ARM: 8087/1: ptrace: reload syscall number after secure_computing() check
  ARM: 8086/1: Set memblock limit for nommu
  ARM: 8085/1: sa1100: collie: add top boot mtd partition
  ARM: 8084/1: sa1100: collie: revert back to cfi_probe
  ARM: 8080/1: mcpm.h: remove unused variable declaration
  ARM: 8076/1: mm: add support for HW coherent systems in PL310 cache
2014-06-29 13:40:08 -07:00
Will Deacon
42309ab450 ARM: 8087/1: ptrace: reload syscall number after secure_computing() check
On the syscall tracing path, we call out to secure_computing() to allow
seccomp to check the syscall number being attempted. As part of this, a
SIGTRAP may be sent to the tracer and the syscall could be re-written by
a subsequent SET_SYSCALL ptrace request. Unfortunately, this new syscall
is ignored by the current code unless TIF_SYSCALL_TRACE is also set on
the current thread.

This patch slightly reworks the enter path of the syscall tracing code
so that we always reload the syscall number from
current_thread_info()->syscall after the potential ptrace traps.

Acked-by: Kees Cook <keescook@chromium.org>
Tested-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-06-29 10:29:35 +01:00
Laura Abbott
6980c3e251 ARM: 8086/1: Set memblock limit for nommu
Commit 1c2f87c (ARM: 8025/1: Get rid of meminfo) changed find_limits
to use memblock_get_current_limit for calculating the max_low pfn.
nommu targets never actually set a limit on memblock though which
means memblock_get_current_limit will just return the default
value. Set the memblock_limit to be the end of DDR to make sure
bounds are calculated correctly.

Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-06-29 10:29:34 +01:00
Andrea Adami
3abe742339 ARM: 8085/1: sa1100: collie: add top boot mtd partition
The CFI mapping is now perfect so we can expose the top block, read only.
There isn't much to read, though, just the sharpsl_params values.

Signed-off-by: Andrea Adami <andrea.adami@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-06-29 10:29:34 +01:00
Andrea Adami
92183103d8 ARM: 8084/1: sa1100: collie: revert back to cfi_probe
Reverts commit d26b17edaf
ARM: sa1100: collie.c: fall back to jedec_probe flash detection

Unfortunately the detection was challenged on the defective unit used for tests:
one of the NOR chips did not respond to the CFI query.
Moreover that bad device needed extra delays on erase-suspend/resume cycles.

Tested personally on 3 different units and with feedback of two other users.

Signed-off-by: Andrea Adami <andrea.adami@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-06-29 10:29:33 +01:00
Nicolas Pitre
d0ba7cc02c ARM: 8080/1: mcpm.h: remove unused variable declaration
The sync_phys variable has been replaced by link time computation in
mcpm_head.S before the code was submitted upstream.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-06-29 10:29:32 +01:00
Thomas Petazzoni
98ea2dba65 ARM: 8076/1: mm: add support for HW coherent systems in PL310 cache
When a PL310 cache is used on a system that provides hardware
coherency, the outer cache sync operation is useless, and can be
skipped. Moreover, on some systems, it is harmful as it causes
deadlocks between the Marvell coherency mechanism, the Marvell PCIe
controller and the Cortex-A9.

To avoid this, this commit introduces a new Device Tree property
'arm,io-coherent' for the L2 cache controller node, valid only for the
PL310 cache. It identifies the usage of the PL310 cache in an I/O
coherent configuration. Internally, it makes the driver disable the
outer cache sync operation.

Note that technically speaking, a fully coherent system wouldn't
require any of the other .outer_cache operations. However, in
practice, when booting secondary CPUs, these are not yet coherent, and
therefore a set of cache maintenance operations are necessary at this
point. This explains why we keep the other .outer_cache operations and
only ->sync is disabled.

While in theory any write to a PL310 register could cause the
deadlock, in practice, disabling ->sync is sufficient to workaround
the deadlock, since the other cache maintenance operations are only
used in very specific situations.

Contrary to previous versions of this patch, this new version does not
simply NULL-ify the ->sync member, because the l2c_init_data
structures are now 'const' and therefore cannot be modified, which is
a good thing. Therefore, this patch introduces a separate
l2c_init_data instance, called of_l2c310_coherent_data.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-06-29 10:26:37 +01:00
Linus Torvalds
456febd299 ARM: SoC fixes for 3.16
A new set of bug fixes for 3.16, containing patches for seven platforms:
 
 at91:
     - drivers/misc fix for Kconfig PWM symbol
     - correction of several values in DT after conversion to CCF
     - fix at91sam9261/at91sam9261ek mistake in slow crystal vs. slow RC osc
 
 imx:
     - Use GPIO for card CD/WP on imx51-babbage and eukrea-mbimxsd51,
       because controller base CD/WP is not working in esdhc driver due to
       runtime PM support
     - A couple of random ventana gw5xxx board fixes
     - Add IMX_IPUV3_CORE back to defconfig, which gets lost when moving
       IPUv3 driver out of staging tree
     - Fix enet/fec clock selection on imx6sl
     - Fix display node on imx53-m53evk board
     - A couple of Cubox-i updates from Russell, which were omitted from
       the merge window due to dependency
 
 integrator:
     - fix an OF-related regression against 3.15
 
 mvebu:
     - mvebu (v7)
        - Fix broken SoC ID detection
        - Select ARM_CPU_SUSPEND for v7
        - Remove armada38x compatible string (no users yet)
        - Enable Dove SoC in mvebu_v7_defconfig
     - kirkwood
        - Fix phy-connection-type on GuruPlug board
 
 qcom:
     - enable gsbi driver in defconfig
     - fix section mismatch warning in serial driver
 
 samsung:
     - use WFI macro in platform_do_lowpower because exynos cpuhotplug
       includes a hardcoded WFI instruction and it causes compile error
       in Thumb-2 mode.
     - fix GIC reg sizes for exynos4 SoCs
     - remove reset timer counter value during boot and resume for mct
       to fix a big jump in printk timestamps
     - fix pm code to check cortex-A9 for another exynos SoCs
     - don't rely on firmware's secondary_cpu_start for mcpm
 
 sti:
     - Ethernet clocks were wrongly defined for STiH415/416 platforms
     - STiH416 B2020 revision E DTS file name contained uppercase, change to
       lowercase.
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Arnd Bergmann:
 "A new set of bug fixes for 3.16, containing patches for seven
  platforms:

  at91:
    - drivers/misc fix for Kconfig PWM symbol
    - correction of several values in DT after conversion to CCF
    - fix at91sam9261/at91sam9261ek mistake in slow crystal vs. slow RC osc

  imx:
    - Use GPIO for card CD/WP on imx51-babbage and eukrea-mbimxsd51,
      because controller base CD/WP is not working in esdhc driver due to
      runtime PM support
    - A couple of random ventana gw5xxx board fixes
    - Add IMX_IPUV3_CORE back to defconfig, which gets lost when moving
      IPUv3 driver out of staging tree
    - Fix enet/fec clock selection on imx6sl
    - Fix display node on imx53-m53evk board
    - A couple of Cubox-i updates from Russell, which were omitted from
      the merge window due to dependency

  integrator:
    - fix an OF-related regression against 3.15

  mvebu:
    - mvebu (v7)
       - Fix broken SoC ID detection
       - Select ARM_CPU_SUSPEND for v7
       - Remove armada38x compatible string (no users yet)
       - Enable Dove SoC in mvebu_v7_defconfig
    - kirkwood
       - Fix phy-connection-type on GuruPlug board

  qcom:
    - enable gsbi driver in defconfig
    - fix section mismatch warning in serial driver

  samsung:
    - use WFI macro in platform_do_lowpower because exynos cpuhotplug
      includes a hardcoded WFI instruction and it causes compile error
      in Thumb-2 mode.
    - fix GIC reg sizes for exynos4 SoCs
    - remove reset timer counter value during boot and resume for mct
      to fix a big jump in printk timestamps
    - fix pm code to check cortex-A9 for another exynos SoCs
    - don't rely on firmware's secondary_cpu_start for mcpm

  sti:
    - Ethernet clocks were wrongly defined for STiH415/416 platforms
    - STiH416 B2020 revision E DTS file name contained uppercase, change to
      lowercase"

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (33 commits)
  ARM: at91/dt: sam9261: remove slow RC osc
  ARM: at91/dt: define sam9261ek slow crystal frequency
  ARM: at91/dt: sam9261: correctly define mainck
  ARM: at91/dt: sam9n12: correct PLLA ICPLL and OUT values
  ARM: at91/dt: sam9x5: correct PLLA ICPLL and OUT values
  misc: atmel_pwm: fix Kconfig symbols
  ARM: integrator: fix OF-related regression
  ARM: mvebu: Fix the improper use of the compatible string armada38x using a wildcard
  ARM: dts: kirkwood: fix phy-connection-type for Guruplug
  ARM: EXYNOS: Don't rely on firmware's secondary_cpu_start for mcpm
  ARM: dts: imx51-eukrea-mbimxsd51-baseboard: unbreak esdhc.
  ARM: dts: imx51-babbage: Fix esdhc setup
  ARM: dts: mx5: Move the display out of soc {} node
  ARM: dts: mx5: Fix IPU port node placement
  ARM: mvebu: select ARM_CPU_SUSPEND for Marvell EBU v7 platforms
  ARM: mvebu: Fix broken SoC ID detection
  ARM: imx_v6_v7_defconfig: Enable CONFIG_IMX_IPUV3_CORE
  ARM: multi_v7_defconfig: Add QCOM GSBI driver
  ARM: stih41x: Rename stih416-b2020-revE.dts to stih416-b2020e.dts
  tty: serial: msm: Fix section mismatch warning
  ...
2014-06-25 12:19:01 -07:00
Arnd Bergmann
6c9d161788 First AT91 fixes batch for 3.16:
- drivers/misc fix for Kconfig PWM symbol
 - correction of several values in DT after conversion to CCF
 - fix at91sam9261/at91sam9261ek mistake in slow crystal vs. slow RC osc
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Merge tag 'at91-fixes' of git://github.com/at91linux/linux-at91 into fixes

Merge "First AT91 fixes batch for 3.16" from Nicolas Ferre:

- drivers/misc fix for Kconfig PWM symbol
- correction of several values in DT after conversion to CCF
- fix at91sam9261/at91sam9261ek mistake in slow crystal vs. slow RC osc

* tag 'at91-fixes' of git://github.com/at91linux/linux-at91:
  ARM: at91/dt: sam9261: remove slow RC osc
  ARM: at91/dt: define sam9261ek slow crystal frequency
  ARM: at91/dt: sam9261: correctly define mainck
  ARM: at91/dt: sam9n12: correct PLLA ICPLL and OUT values
  ARM: at91/dt: sam9x5: correct PLLA ICPLL and OUT values
  misc: atmel_pwm: fix Kconfig symbols
2014-06-25 20:27:15 +02:00
Arnd Bergmann
6d12e79698 mvebu fixes for v3.16
- mvebu
     - Fix broken SoC ID detection
     - Select ARM_CPU_SUSPEND for v7
     - Remove armada38x compatible string (no users yet)
 
  - kirkwood
     - Fix phy-connection-type on GuruPlug board
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Merge tag 'mvebu-fixes-3.16' of git://git.infradead.org/linux-mvebu into fixes

Merge "mvebu fixes for v3.16" from Jason Cooper:

 - mvebu
    - Fix broken SoC ID detection
    - Select ARM_CPU_SUSPEND for v7
    - Remove armada38x compatible string (no users yet)

 - kirkwood
    - Fix phy-connection-type on GuruPlug board

* tag 'mvebu-fixes-3.16' of git://git.infradead.org/linux-mvebu:
  ARM: mvebu: Fix the improper use of the compatible string armada38x using a wildcard
  ARM: dts: kirkwood: fix phy-connection-type for Guruplug
  ARM: mvebu: select ARM_CPU_SUSPEND for Marvell EBU v7 platforms
  ARM: mvebu: Fix broken SoC ID detection
2014-06-25 20:26:30 +02:00
Alexandre Belloni
971dc9ce10 ARM: at91/dt: sam9261: remove slow RC osc
The at91sam9261 doesn't actually have a slow RC oscillator, remove it from the
dtsi.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-06-25 18:00:17 +02:00
Alexandre Belloni
78ca2ec920 ARM: at91/dt: define sam9261ek slow crystal frequency
Define at91sam9261ek's slow crystal frequencies.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-06-25 17:50:08 +02:00
Alexandre Belloni
5de4728450 ARM: at91/dt: sam9261: correctly define mainck
mainck (CKGR_MCFR register) is actually using main_osc (CKGR_MOR register).

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-06-25 17:50:08 +02:00
Alexandre Belloni
8cbff69ca9 ARM: at91/dt: sam9n12: correct PLLA ICPLL and OUT values
ICPLL can only take 0 or 1, it got mixed with OUT which can be in the [0-3]
range.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-06-25 17:50:07 +02:00
Alexandre Belloni
b6616f11a8 ARM: at91/dt: sam9x5: correct PLLA ICPLL and OUT values
ICPLL can only take 0 or 1, it got mixed with OUT which can be in the [0-3]
range.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-06-25 17:50:07 +02:00
Linus Torvalds
b4b664bef4 Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm
Pull ARM fixes from Russell King:
 "A number of low impact fixes, the most noticable one is the thumb2
  frame pointer fix.  We also fix a regression caused during this merge
  window with ARM925 CPUs running with caches disabled, and fix a number
  of warnings"

* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
  ARM: arm925: ensure assembly sets up writethrough mapping
  ARM: perf: fix compiler warning with gcc 4.6.4 (and tidy code)
  ARM: l2c: fix dependencies on PL310 errata symbols
  ARM: 8069/1: Make thread_save_fp macro aware of THUMB2 mode
  ARM: 8068/1: scoop: Remove unused variable
2014-06-24 13:59:00 -07:00
Linus Walleij
11f9323a48 ARM: integrator: fix OF-related regression
Commit 07e461cd7e
"of: Ensure unique names without sacrificing determinism"
caused a boot failure regression on the Integrator machines.

The problem is probably caused by fiddling too much with
the device tree population in the OF init function, such
as passing the SoC bus device as parent when populating
the device tree.

This patch fixes the problem by:

- Avoiding to explicitly look up the tree root
- Look up devices needed before device population from
  the match only, passing NULL as root
- Passing NULL as root and parent when calling
  of_platform_populate()

After this the Integrators boot again. Tested on
Integrator/AP and Integrator/CP.

Cc: Grant Likely <grant.likely@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-06-24 14:27:03 +02:00
Gregory CLEMENT
8dbdb8e704 ARM: mvebu: Fix the improper use of the compatible string armada38x using a wildcard
Wildcards in compatible strings should be avoid. "marvell,armada38x"
was recently introduced but was not yet used.

The armada 385 SoC is a superset of the armada 380 SoC (with more CPUs
and more PCIe slots). So this patch replaces the use of
"marvell,armada38x" by the "marvell,armada380" string.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1403533011-21339-1-git-send-email-gregory.clement@free-electrons.com
Acked-by: Andrew Lunn <andrew@lunn.ch>
Cc: <stable@vger.kernel.org> # v3.15+
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-06-24 11:33:24 +00:00
Sebastian Hesselbarth
b514fb28ea ARM: dts: kirkwood: fix phy-connection-type for Guruplug
Commit eeb845459a
 ("ARM: dts: kirkwood: set Guruplug phy-connection-type to rgmii-id")
added phy-connection-type properties to ethernet PHY nodes.

Actually, the property has to be set for the ethernet port node instead.
Fix it by moving the corresponding properties to the correct nodes.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Link: https://lkml.kernel.org/r/1403555115-13111-1-git-send-email-sebastian.hesselbarth@gmail.com
Fixes: eeb845459a: ('ARM: dts: kirkwood: set Guruplug phy-connection-type to rgmii-id')
Cc: <stable@vger.kernel.org> # v3.16+
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-06-23 21:48:16 +00:00
Arnd Bergmann
f340a59f38 The i.MX fixes for 3.16:
- Use GPIO for card CD/WP on imx51-babbage and eukrea-mbimxsd51,
    because controller base CD/WP is not working in esdhc driver due to
    runtime PM support
  - A couple of random ventana gw5xxx board fixes
  - Add IMX_IPUV3_CORE back to defconfig, which gets lost when moving
    IPUv3 driver out of staging tree
  - Fix enet/fec clock selection on imx6sl
  - Fix display node on imx53-m53evk board
  - A couple of Cubox-i updates from Russell, which were omitted from
    the merge window due to dependency
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Merge tag 'imx-fixes-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes

Pull "i.MX fixes for 3.16" from Shawn Guo:

 - Use GPIO for card CD/WP on imx51-babbage and eukrea-mbimxsd51,
   because controller base CD/WP is not working in esdhc driver due to
   runtime PM support
 - A couple of random ventana gw5xxx board fixes
 - Add IMX_IPUV3_CORE back to defconfig, which gets lost when moving
   IPUv3 driver out of staging tree
 - Fix enet/fec clock selection on imx6sl
 - Fix display node on imx53-m53evk board
 - A couple of Cubox-i updates from Russell, which were omitted from
   the merge window due to dependency

* tag 'imx-fixes-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: dts: imx51-eukrea-mbimxsd51-baseboard: unbreak esdhc.
  ARM: dts: imx51-babbage: Fix esdhc setup
  ARM: dts: mx5: Move the display out of soc {} node
  ARM: dts: mx5: Fix IPU port node placement
  ARM: imx_v6_v7_defconfig: Enable CONFIG_IMX_IPUV3_CORE
  ARM: dts: hummingboard/cubox-i: move usb otg configuration to platform level
  ARM: dts: cubox-i: add support for PWM-driven front panel LED
  ARM: dts: imx6: ventana: correct gw52xx sgtl5000 clock source
  ARM: dts: imx6qdl-gw5xxx: Fix Linear Technology vendor prefix
  ARM: dts: imx6: ventana: fix include typo
  ARM: dts: imx6sl: correct the fec ipg clock source
  ARM: imx6sl: add missing enet clock for imx6sl
2014-06-23 14:12:48 +02:00
Arnd Bergmann
9cbf3d2b7e Samsung fixes for 3.16
- use WFI macro in platform_do_lowpower because exynos cpuhotplug
   includes a hardcoded WFI instruction and it causes compile error
   in Thumb-2 mode.
 - fix GIC reg sizes for exynos4 SoCs
 - remove reset timer counter value during boot and resume for mct
   to fix a big jump in printk timestamps
 - fix pm code to check cortex-A9 for another exynos SoCs
 - don't rely on firmware's secondary_cpu_start for mcpm
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Merge tag 'samsung-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes

Merge Samsung fixes for 3.16 from Kukjin Kim:

- use WFI macro in platform_do_lowpower because exynos cpuhotplug
  includes a hardcoded WFI instruction and it causes compile error
  in Thumb-2 mode.
- fix GIC reg sizes for exynos4 SoCs
- remove reset timer counter value during boot and resume for mct
  to fix a big jump in printk timestamps
- fix pm code to check cortex-A9 for another exynos SoCs
- don't rely on firmware's secondary_cpu_start for mcpm

* tag 'samsung-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: EXYNOS: Don't rely on firmware's secondary_cpu_start for mcpm
  ARM: EXYNOS: fix pm code to check for cortex A9 rather than the SoC
  clocksource: exynos_mct: Don't reset the counter during boot and resume
  ARM: dts: fix reg sizes of GIC for exynos4
  ARM: EXYNOS: Use wfi macro in platform_do_lowpower

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-06-22 20:46:52 +02:00
Doug Anderson
7cbcb9d46f ARM: EXYNOS: Don't rely on firmware's secondary_cpu_start for mcpm
On exynos mcpm systems the firmware is hardcoded to jump to an address
in SRAM (0x02073000) when secondary CPUs come up.  By default the
firmware puts a bunch of code at that location.  That code expects the
kernel to fill in a few slots with addresses that it uses to jump back
to the kernel's entry point for secondary CPUs.

Originally (on prerelease hardware) this firmware code contained a
bunch of workarounds to deal with boot ROM bugs.  However on all
shipped hardware we simply use this code to redirect to a kernel
function for bringing up the CPUs.

Let's stop relying on the code provided by the bootloader and just
plumb in our own (simple) code jump to the kernel.  This has the nice
benefit of fixing problems due to the fact that older bootloaders
(like the one shipped on the Samsung Chromebook 2) might have put
slightly different code into this location.

Once suspend/resume is implemented for systems using exynos-mcpm we'll
need to make sure we reinstall our fixed up code after resume.  ...but
that's not anything new since IRAM (and thus the address of the
mcpm_entry_point) is lost across suspend/resume anyway.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Acked-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-06-21 19:30:53 +09:00
Denis Carikli
7d278f271c ARM: dts: imx51-eukrea-mbimxsd51-baseboard: unbreak esdhc.
The following commit:
89d7e5c mmc: sdhci-esdhc-imx: add runtime pm support
has the effect of also disabling the hardware card detect
in runtime pm.

We switch to GPIO based detection to avoid this issue.

This patch is based on:
ARM: dts: imx51-babbage: Fix esdhc setup

Signed-off-by: Denis Carikli <denis@eukrea.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-06-21 15:54:06 +08:00
Sascha Hauer
dacf49223f ARM: dts: imx51-babbage: Fix esdhc setup
Since commit 89d7e5c131 (mmc: sdhci-esdhc-imx: add runtime pm
support), controller based card detection / write protection is not
supported anymore by esdhc driver.  Let's use GPIO for CD/WP on esdhc1
instead.

While at it, fix cd gpio polarity for esdhc2. This is wrong and
currently only works because the imx esdhc driver ignores the polarity.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-06-21 15:53:54 +08:00
Marek Vasut
be149c75fc ARM: dts: mx5: Move the display out of soc {} node
Move the display {} node out of the soc {} node . This just aligns
the DT with other boards, there is no functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-06-21 12:39:50 +08:00
Marek Vasut
cbb6c3fe33 ARM: dts: mx5: Fix IPU port node placement
The "port" node was misplaced in the original patch, therefore making
the LCD dysfunctional on this board. Fix this by moving the "port" DT
node into the "display {}" node.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-06-21 10:53:49 +08:00
Thomas Petazzoni
52fcc56753 ARM: mvebu: select ARM_CPU_SUSPEND for Marvell EBU v7 platforms
On Marvell Armada platforms, the PMSU (Power Management Service Unit)
controls a number of power management related activities, needed for
things like suspend/resume, CPU hotplug, cpuidle or even simply SMP.

Since cpuidle support was added for Armada XP, the pmsu.c file in
arch/arm/mach-mvebu/ calls the cpu_suspend() and cpu_resume() ARM
functions, which are only available when
CONFIG_ARM_CPU_SUSPEND=y. Therefore, configurations that have
CONFIG_ARM_CPU_SUSPEND disabled due to PM_SLEEP being disabled no
longer build properly, due to undefined references to cpu_suspend()
and cpu_resume().

To fix this, this patch simply ensures CONFIG_ARM_CPU_SUSPEND is
always enabled for Marvell EBU v7 platforms. Doing things in a more
fine-grained way would require a lot of #ifdef-ery in pmsu.c to
isolate the parts that use cpu_suspend()/cpu_resume(), and those parts
would anyway have been needed as soon as either one of suspend/resume,
CPU hotplug or cpuidle was enabled.

Reported-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1402488397-31381-1-git-send-email-thomas.petazzoni@free-electrons.com
Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-06-20 20:38:14 +00:00
Ezequiel Garcia
ed2d859119 ARM: mvebu: Fix broken SoC ID detection
Currently the mvebu boards need to detect the SoC revision in order to apply
some quirks needed to workaround issues found on I2C and thermal controllers
present only in very early SoC.

This detection requires PCI address translation to work, so we need to
explicitly select OF_ADDRESS_PCI.

This can be considered a partial revert of the following commit, that
wrongly removed the option selection:

commit 55400f3a1f
Author: Rob Herring <robh@kernel.org>
Date:   Tue Apr 22 14:15:52 2014 -0500

    ARM: mvebu: clean-up unneeded kconfig selects

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Link: https://lkml.kernel.org/r/1402347165-19988-1-git-send-email-ezequiel.garcia@free-electrons.com
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-06-20 20:32:14 +00:00
Fabio Estevam
8f95da90e9 ARM: imx_v6_v7_defconfig: Enable CONFIG_IMX_IPUV3_CORE
Since commit 39b9004d1f (gpu: ipu-v3: Move i.MX IPUv3 core driver out of
staging) the ipuv3 core driver is no longer built bey default.

Select CONFIG_IMX_IPUV3_CORE so that the core ipuv3 code can be built again.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-06-20 21:26:45 +08:00
Russell King
b8d8772e53 ARM: arm925: ensure assembly sets up writethrough mapping
Commit ca8f0b0a54 ("ARM: ensure C page table setup code follows
assembly code") did what it said on the tin, but some of the older
CPU code omitted the default cache policy from their files.  This
results in the kernel running with the caches disabled.  Fix this
for ARM925.

Reported-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-06-20 11:23:02 +01:00
Srinivas Kandagatla
6d43925f5a ARM: multi_v7_defconfig: Add QCOM GSBI driver
This patch adds QCOM GSBI config option to multi_v7_defconfig. Serial
driver on QCOM APQ8064 depends on GSBI driver, so without this patch
there is no serial console on IF6410 board using multi_v7_defconfig.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-06-20 11:18:03 +02:00
Arnd Bergmann
3b3dab5f1c Couple of DT fixes for STi platform issues discovered on V3.16-rc1.
The fixes included are:
  - Ethernet clocks were wrongly defined for STiH415/416 platforms
  - STiH416 B2020 revision E DTS file name contained uppercase, change to
    lowercase.
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Merge tag 'sti-fixes-for-v3.16-rc1' of git://git.stlinux.com/devel/kernel/linux-sti into fixes

Merge "STi: DT fixes for v3.16" from Maxime Coquelin:

Couple of DT fixes for STi platform issues discovered on V3.16-rc1.

The fixes included are:
 - Ethernet clocks were wrongly defined for STiH415/416 platforms
 - STiH416 B2020 revision E DTS file name contained uppercase, change to
   lowercase.

* tag 'sti-fixes-for-v3.16-rc1' of git://git.stlinux.com/devel/kernel/linux-sti: (2963 commits)
  ARM: stih41x: Rename stih416-b2020-revE.dts to stih416-b2020e.dts
  ARM: STi: DT: Properly define sti-ethclk & stmmaceth for stih415/6

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-06-20 10:59:05 +02:00
Linus Torvalds
58c72f94ef ARM: SoC fixes for 3.16
A first set of bug fixes that didn't make it for the merge window, and
 two Kconfig cleanups that still make sense at this point. Unfortunately,
 one of the two cleanups caused an unintended change in the original
 version, so we had to revert one part of it and do some more testing
 to ensure the rest is really fine. There was also a last-minute
 rebase of the patches to remove another bad commit.
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Arnd Bergmann:
 "A first set of bug fixes that didn't make it for the merge window, and
  two Kconfig cleanups that still make sense at this point.

  Unfortunately, one of the two cleanups caused an unintended change in
  the original version, so we had to revert one part of it and do some
  more testing to ensure the rest is really fine.  There was also a
  last-minute rebase of the patches to remove another bad commit"

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: use menuconfig for sub-arch menus
  ARM: multi_v7_defconfig: re-enable SDHCI drivers
  ARM: EXYNOS: Fix compilation warning
  ARM: exynos: move sysram info to exynos.c
  ARM: dts: Specify the NAND ECC scheme explicitly on Armada 385 DB board
  ARM: dts: Specify the NAND ECC scheme explicitly on Armada 375 DB board
  ARM: exynos: cleanup kconfig option display
  misc: vexpress: fix error handling vexpress_syscfg_regmap_init()
  ARM: Remove ARCH_HAS_CPUFREQ config option
  ARM: integrator: fix section mismatch problem
  ARM: mvebu: DT: fix OpenBlocks AX3-4 RAM size
  ARM: samsung: make SAMSUNG_DMADEV optional
  remoteproc: da8xx: don't select CMA on no-MMU
  bus/arm-cci: add dependency on OF && CPU_V7
  ARM: keystone requires ARM_PATCH_PHYS_VIRT
  ARM: omap2: fix am43xx dependency on l2x0 cache
2014-06-19 17:53:20 -10:00
Russell King
6a78371ace ARM: perf: fix compiler warning with gcc 4.6.4 (and tidy code)
GCC 4.6.4 spits out the following warning when building perf_event_v7.c:

arch/arm/kernel/perf_event_v7.c: In function 'krait_pmu_get_event_idx':
arch/arm/kernel/perf_event_v7.c:1927:6: warning: 'bit' may be used uninitialized in this function

While upgrading the version of gcc may solve this, the code can also be
organised to be more efficient by not carrying more local variables than
is necessary across the armv7pmu_get_event_idx function call.  If we set
'bit' to -1 (which is invalid for clear_bit) we can use that as an
indication whether we need to clear a bit after this function.

Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-06-19 11:29:39 +01:00
Russell King
a641f3a6ab ARM: l2c: fix dependencies on PL310 errata symbols
A number of configurations spit out warnings similar to:

warning: (SOC_IMX6 && SOC_VF610 && ARCH_OMAP4) selects PL310_ERRATA_588369 which has unmet direct dependencies (CACHE_L2X0)
warning: (SOC_IMX6 && SOC_VF610 && ARCH_OMAP4) selects PL310_ERRATA_727915 which has unmet direct dependencies (CACHE_L2X0)

Clean up the dependencies here:
* PL310 symbols should only be selected when CACHE_L2X0 is enabled.
* Since the cache-l2x0 code detects PL310 presence at runtime, and we will
  eventually get rid of CACHE_PL310, surround these errata options with an
  if CACHE_L2X0 conditional rather than repeating the dependency against
  each.

Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-06-19 11:29:28 +01:00
Lee Jones
88a1c67ff6 ARM: stih41x: Rename stih416-b2020-revE.dts to stih416-b2020e.dts
Two reasons for this rename.  Firstly, it removes the camel case
convention which isn't used by any other platform and secondly it
matches the naming convention for the internal kernel, which can
become annoying when flipping between the two.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-06-19 10:45:36 +02:00
Ezequiel Garcia
3f620ddc0d ARM: mvebu: enable Dove SoC in mvebu_v7_defconfig
Since commit:

commit d93003e8e4
Author: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Date:   Thu Apr 24 22:58:30 2014 +0100

    ARM: 8042/1: iwmmxt: allow to build iWMMXt on Marvell PJ4B

fixed the error that prevented Dove SoC from being built with
the rest of the mvebu SoCs, we can now add it to the defconfig.

In addition, this commit enables SERIAL_OF_PLATFORM, which is required
to have UART on some of the boards.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-06-18 14:58:36 +02:00
Steven Rostedt
1712ef43af arm/ftrace: fix ftrace_return_addr() to ftrace_return_address()
The clean up of CALLER_ADDR*() functions required the archs to either
use the default __builtin_return_address(X) (where X > 0) or override
it with something the arch can use. To override it, the arch would
define ftrace_return_address(x).

The arm architecture requires this to be redefined but instead of
defining ftrace_return_address(x) it defined ftrace_return_addr(x).

Fixes: eed542d696 (ftrace: Make CALLER_ADDRx macros more generic)
Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
Tested-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2014-06-18 12:40:55 +01:00
Abhilash Kesavan
c0c3c3590d ARM: EXYNOS: fix pm code to check for cortex A9 rather than the SoC
We have an soc check to ensure that the scu and certain A9 specific
registers are not accessed on Exynos5250 (which is A15 based).
Rather than adding another soc specific check for 5420 let us test
for the Cortex A9 primary part number.

This resolves the below crash seen on exynos5420 during core switching
after the CPUIdle consolidation series was merged.

[  155.975589] [<c0013174>] (scu_enable) from [<c001b0dc>] (exynos_cpu_pm_notifier+0x80/0xc4)
[  155.983833] [<c001b0dc>] (exynos_cpu_pm_notifier) from [<c003c1b0>] (notifier_call_chain+0x44/0x84)
[  155.992851] [<c003c1b0>] (notifier_call_chain) from [<c007a49c>] (cpu_pm_notify+0x20/0x3c)
[  156.001089] [<c007a49c>] (cpu_pm_notify) from [<c007a564>] (cpu_pm_exit+0x20/0x38)
[  156.008635] [<c007a564>] (cpu_pm_exit) from [<c0019e98>] (bL_switcher_thread+0x298/0x40c)
[  156.016788] [<c0019e98>] (bL_switcher_thread) from [<c003842c>] (kthread+0xcc/0xe8)
[  156.024426] [<c003842c>] (kthread) from [<c000e438>] (ret_from_fork+0x14/0x3c)
[  156.031621] Code: ea017fec c0530a00 c052e3f8 c0012dcc (e5903000

Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-06-18 08:08:49 +09:00
Rob Herring
21278aeafb ARM: use menuconfig for sub-arch menus
The System Type menu is getting quite long with platforms and is
inconsistent in handling of sub-arch specific options. Tidy up the menu
by making platform options a menuconfig entry containing any platform
specific config items.

[arnd: change OMAP part according to suggestion from
 Tony Lindgren <tony@atomide.com>]

Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-06-17 17:09:48 +02:00
Stephen Warren
216e9d3e8b ARM: multi_v7_defconfig: re-enable SDHCI drivers
Following 5d01b7684b "mmc: simplify SDHCI Kconfig dependencies",
SDHCI drivers that use MMC_SDHCI_PLTFM no longer select it, but
instead depend on it. This means that multi_v7_defconfig no longer
selects it, and hence many SDHCI drivers are no longer enabled.
Explicitly enable MMC_SDHCI_PLTFM to solve this.

Fixes: 5d01b7684b ("mmc: simplify SDHCI Kconfig dependencies")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Matt Porter <mporter@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-06-17 17:09:47 +02:00
Sachin Kamat
3eb9364656 ARM: EXYNOS: Fix compilation warning
of_get_flat_dt_prop return type is now const.
Fixes the following compilation warning introduced by commit 9d0c4dfedd
("of/fdt: update of_get_flat_dt_prop in prep for libfdt")

arch/arm/mach-exynos/exynos.c:259:6: warning:
assignment discards ‘const’ qualifier from pointer target type [enabled by default]

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Reviewed-by: Tushar Behera <tushar.behera@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-06-17 17:09:46 +02:00
Olof Johansson
1754c42e3d ARM: exynos: move sysram info to exynos.c
This solves a problem with building with CONFIG_SMP=n due to missing
sysram_base_addr (or sysram_ns_base_addr) variables.

The new setup method is more awkward than I'd like for it to be, but
it can't be done in init_early() since ioremap is not yet available,
but it needs to happen before SMP.

Reported-by: Russell King <linux@arm.linux.org.uk>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-06-17 17:09:45 +02:00