Commit Graph

309 Commits

Author SHA1 Message Date
Ben Skeggs
fb3e9c61ca drm/nouveau/top/gk104: initial implementation
Ported from the code currently in engine/fifo/gk104.c.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20 14:43:04 +10:00
Ben Skeggs
5f76f294d1 drm/nouveau/top: initial implementation
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20 14:43:04 +10:00
Ben Skeggs
eaebfcc34e drm/nouveau/core: add top plumbing
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20 14:43:04 +10:00
Karol Herbst
5f1f07de41 drm/nouveau/iccsense: split sensor into own struct
v2: add list_del call, reword error message

Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
Reviewed-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20 14:43:04 +10:00
Karol Herbst
92224e751f drm/nouveau/iccsense: convert to linked list
v2: add list_del calls

Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
Reviewed-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20 14:43:04 +10:00
Karol Herbst
d03e0f2748 drm/nouveau/iccsense: remove read function
Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
Reviewed-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20 14:43:04 +10:00
Alexandre Courbot
c6007dc4e5 drm/nouveau/devinit/gf100: make devinit on resume safer
In case of successful suspend, devinit will have to be run and this is
the behavior currently hardcoded. However, as FD bug 94725 suggests,
there might be cases where runtime suspend leaves the GPU powered, and
in such cases devinit should not be run on resume.

On GF100+ we have a reliable way to know whether we need to run devinit.
Use it instead of blindly trusting the flag set by nvkm_devinit_fini().

The code around the NvForcePost also needs to be slightly reworked in
order to keep working.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Suggested-by: Dave Airlie <airlied@redhat.com>
Suggested-by: Karol Herbst <nouveau@karolherbst.de>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20 14:43:04 +10:00
Alexandre Courbot
34440ed697 drm/nouveau/tegra: acquire and enable reference clock if needed
GM20B requires an extra clock compared to GK20A. Add that information
into the platform data and acquire and enable this clock if necessary.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-04-06 16:06:51 +10:00
Alexandre Courbot
52829d4fab drm/nouveau/clk/gm20b: add basic driver
Add a basic clock driver that reuses the GK20A logic.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:56 +10:00
Alexandre Courbot
71757abf2e drm/nouveau/volt: add GM20B driver
Add basic GM20B volt driver that reuses the GK20A logic.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:50 +10:00
Ben Skeggs
253a03f03f drm/nouveau/ce/gm107: expose MaxwellDmaCopyA
The HW accepts KeplerDmaCopyA and MaxwellDmaCopyA classes.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:49 +10:00
Ben Skeggs
7c4f87c9e5 drm/nouveau/fifo/gm107: KeplerChannelGpfifoB, and 2048 channels
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:48 +10:00
Ben Skeggs
63f8c9b7f6 drm/nouveau/fifo/gk110: expose KeplerChannelGpfifoB
This class supports a WFI method (0x0078) that's not present on the
KeplerChannelGpfifoA class.

The binary driver exposes both classes on these GPUs for some reason,
though there doesn't appear to be any difference in the setup that's
done for each (ie. even if you allocate GpfifoA, the WFI method will
still work).

We shall just expose GpfifoB, as I don't see a good reason to report
the presence of both.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:48 +10:00
Ben Skeggs
4a3f63f808 drm/nouveau/fifo/gk104: add vic plumbing
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:47 +10:00
Ben Skeggs
a8b005fd52 drm/nouveau/fifo/gk104: add sec plumbing
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:46 +10:00
Ben Skeggs
608fd040b7 drm/nouveau/fifo/gk104: add nvdec plumbing
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:46 +10:00
Ben Skeggs
9e4fff3205 drm/nouveau/fifo/gk104: add nvenc plumbing
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:46 +10:00
Ben Skeggs
72150b2edd drm/nouveau/core: add vic plumbing
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:45 +10:00
Ben Skeggs
3545b42532 drm/nouveau/core: add nvdec plumbing
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:44 +10:00
Ben Skeggs
294af04b16 drm/nouveau/core: add nvenc plumbing
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:44 +10:00
Ben Skeggs
c0c914eca7 drm/nouveau/core: add msenc plumbing
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:43 +10:00
Ben Skeggs
7cee043334 drm/nouveau/core: sort engine indices alphabetically
Unlike subdevs, these aren't initialised in a defined order.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:43 +10:00
Ben Skeggs
1f5ff7f52b drm/nouveau/fifo/gk104: make use of topology info during gpfifo construction
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:42 +10:00
Ben Skeggs
7d31cb7ca4 drm/nouveau/gr/gm206: remove implementation, it's now identical to gm200
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:29 +10:00
Karol Herbst
353b983440 drm/nouveau/hwmon: add power consumption
v2: expose only if the sensor reading is valid

Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
Reviewed-by: Martin Peres <martin.peres@free.fr>
2016-03-14 10:13:26 +10:00
Karol Herbst
b71c089263 drm/nouveau/iccsense: implement for ina209, ina219 and ina3221
based on Martins initial work

v3: fix ina2x9 calculations
v4: don't kmalloc(0), fix the lsb/pga stuff
v5: add a field to tell if the power reading may be invalid
    add nkvm_iccsense_read_all function
    check for the device on the i2c bus

Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
Reviewed-by: Martin Peres <martin.peres@free.fr>
2016-03-14 10:13:25 +10:00
Martin Peres
39b7e6e547 drm/nouveau/nvbios/iccsense: add parsing of the SENSE table
Karol Herbst:
v4: don't kmalloc(0)
v5: stricter validation

Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
Reviewed-by: Martin Peres <martin.peres@free.fr>
2016-03-14 10:13:25 +10:00
Martin Peres
dc06e366fe drm/nouveau/subdev/iccsense: add new subdev for power sensors
Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
Reviewed-by: Martin Peres <martin.peres@free.fr>
2016-03-14 10:13:24 +10:00
Alexandre Courbot
923f1bd27b drm/nouveau/secboot/gm20b: add secure boot support
Add secure boot support for the GM20B chip found in Tegra X1. Secure
boot on Tegra works slightly differently from desktop, notably in the
way the WPR region is set up.

In addition, the firmware bootloaders use a slightly different header
format.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:24 +10:00
Alexandre Courbot
9cc4552149 drm/nouveau/secboot/gm200: add secure-boot support
Add secure-boot for the dGPU set of GM20X chips, using the PMU as the
high-secure falcon.

This work is based on Deepak Goyal's initial port of Secure Boot to
Nouveau.

v2. use proper memory target function

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:23 +10:00
Alexandre Courbot
7d12388a1f drm/nouveau/core: add support for secure boot
On GM200 and later GPUs, firmware for some essential falcons (notably
GR ones) must be authenticated by a NVIDIA-produced signature and
loaded by a high-secure falcon in order to be able to access privileged
registers, in a process known as Secure Boot.

Secure Boot requires building a binary blob containing the firmwares
and signatures of the falcons to be loaded. This blob is then given to
a high-secure falcon running a signed loader firmware that copies the
blob into a write-protected region, checks that the signatures are
valid, and finally loads the verified firmware into the managed falcons
and switches them to privileged mode.

This patch adds infrastructure code to support this process on chips
that require it.

v2:
- The IRQ mask of the PMU falcon was left - replace it with the proper
  irq_mask variable.
- The falcon reset procedure expecting a falcon in an initialized state,
  which was accidentally provided by the PMU subdev. Make sure that
  secboot can manage the falcon on its own.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:22 +10:00
Alexandre Courbot
5d2083d2f9 drm/nouveau/core: add gpuobj memcpy helper functions
Add memcpy functions to copy a buffer to a gpuobj and vice-versa. This
will be used by the secure boot code.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:19 +10:00
Ben Skeggs
9ec280529a drm/nouveau/gr/gm200: s/gm204/gm200/
Most of the per-chipset differences will go away when we fully switch
to using the register lists provided by the firmware files, which will
leave all the remaining code "belonging" to GM200.

This is a preemptive rename from GM204 to GM200.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:18 +10:00
Ben Skeggs
db1eb52846 drm/nouveau: s/gm204/gm200/ in a number of places
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:12 +10:00
Alexandre Courbot
046fdb2a59 drm/nouveau/core: add firmware handling functions
Add two functions nvkm_firmware_get() and nvkm_firmware_put() to load a
firmware file and free its resources, respectively. Since firmware files
are becoming a necessity for new GPUs, and their location has been
standardized to nvidia/chip/, this will prevent duplicate and
error-prone name-generation code.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:11:06 +10:00
Karol Herbst
d3b378c09c drm/nouveau/perf: add fields for pci speed and width and use it for the pstates
Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
2016-01-11 11:30:22 +10:00
Karol Herbst
c6e2f9bc03 drm/nouveau/bios/perf: parse the pci speed from the bios for tesla and newer cards
Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
2016-01-11 11:30:22 +10:00
Karol Herbst
bcc19d9bf5 drm/nouveau/pci: implement generic code for pcie speed change
v2: rename and group functions
v4: change copyright information
    move printing of pcie speeds into oneinit,
    rename all pcie functions to nvkm_pcie_*
    don't try to raise the pcie version when no higher one is supported
v5: revert Copyright changes and rename nvkm_pcie_raise_version to nvkm_pcie_set_version
v6: remove some useless pci_is_pcie checks and rework messages

Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
2016-01-11 11:30:20 +10:00
Karol Herbst
28c8060575 drm/nouveau/pci: add gk104 variant
v2: change email used in header
v4: change Copyright information
v5: revert Copyright changes

Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
2016-01-11 11:30:19 +10:00
Karol Herbst
bec4961e2a drm/nouveau/pci: add gf106 variant
v2: change email used in header
v4: change Copyright information
v5: revert Copyright changes

Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
2016-01-11 11:30:19 +10:00
Karol Herbst
2e7db87dee drm/nouveau/nouveau/perfmon: add interface files for current core voltage
Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-01-11 11:28:26 +10:00
Ben Skeggs
547dd2714a drm/nouveau/clk: remove references to "daemon"
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-01-11 11:28:23 +10:00
Ben Skeggs
7d2813c437 drm/nouveau/ltc/gm204: split implementation from gm107
Differences from GM10x:
- GM20x LTC count detection differs from GM10x
- GM20x init doesn't require large page size setting

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-01-11 11:28:21 +10:00
Ben Skeggs
e3d26d0860 drm/nouveau/ibus/gm204: split implementation from gk104
GM20x doesn't require the priv ring timeout bumps that GK/GM10x have.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-01-11 11:28:20 +10:00
Ben Skeggs
f01c4e682c drm/nouveau/nvif: modify nvif_unvers/nvif_unpack macros to be more obvious
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-01-11 11:17:40 +10:00
Ben Skeggs
13db6d6ea7 drm/nouveau/nvif: split out client interface definitions
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-01-11 11:17:40 +10:00
Ben Skeggs
923bc416aa drm/nouveau/nvif: split out device interface definitions
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-01-11 11:17:40 +10:00
Ben Skeggs
845f27253c drm/nouveau/nvif: split out ctxdma interface definitions
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-01-11 11:17:40 +10:00
Ben Skeggs
75445a4d64 drm/nouveau/nvif: split out perfmon interface definitions
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-01-11 11:17:40 +10:00
Ben Skeggs
671e969696 drm/nouveau/nvif: split out device control interface definitions
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-01-11 11:17:40 +10:00