Commit Graph

112 Commits

Author SHA1 Message Date
Joerg Roedel
f93ea73387 Merge branches 'iommu/page-sizes' and 'iommu/group-id' into next
Conflicts:
	drivers/iommu/amd_iommu.c
	drivers/iommu/intel-iommu.c
	include/linux/iommu.h
2012-01-09 13:06:28 +01:00
Joerg Roedel
00fb5430f5 Merge branches 'iommu/fixes', 'arm/omap' and 'x86/amd' into next
Conflicts:
	drivers/pci/hotplug/acpiphp_glue.c
2012-01-09 13:04:05 +01:00
Linus Torvalds
89307babf9 Merge branch 'iommu/fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu
* 'iommu/fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu:
  iommu: Initialize domain->handler in iommu_domain_alloc()
2011-12-29 17:36:15 -08:00
Joerg Roedel
1456e9d2c4 iommu/amd: Set IOTLB invalidation timeout
To protect the command buffer from hanging when a device
does not respond to an IOTLB invalidation, set a timeout of
1s for outstanding IOTLB invalidations.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-22 14:56:56 +01:00
Joerg Roedel
2655d7a297 iommu/amd: Init stats for iommu=pt
The IOMMUv2 driver added a few statistic counter which are
interesting in the iommu=pt mode too. So initialize the
statistic counter for that mode too.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-22 14:56:56 +01:00
Joerg Roedel
31342b58b7 iommu/amd: Remove unnecessary cache flushes in amd_iommu_resume
The caches are already flushed in enable_iommus(), so this
flush is not necessary.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-22 14:56:56 +01:00
Linus Torvalds
2cfab8d74e Merge branch 'drm-intel-fixes' of git://people.freedesktop.org/~keithp/linux
* 'drm-intel-fixes' of git://people.freedesktop.org/~keithp/linux:
  drm/i915/dp: Dither down to 6bpc if it makes the mode fit
  drm/i915: enable semaphores on per-device defaults
  drm/i915: don't set unpin_work if vblank_get fails
  drm/i915: By default, enable RC6 on IVB and SNB when reasonable
  iommu: Export intel_iommu_enabled to signal when iommu is in use
  drm/i915/sdvo: Include LVDS panels for the IS_DIGITAL check
  drm/i915: prevent division by zero when asking for chipset power
  drm/i915: add PCH info to i915_capabilities
  drm/i915: set the right SDVO transcoder for CPT
  drm/i915: no-lvds quirk for ASUS AT5NM10T-I
  drm/i915: Treat pre-gen4 backlight duty cycle value consistently
  drm/i915: Hook up Ivybridge eDP
  drm/i915: add multi-threaded forcewake support
2011-12-16 11:27:56 -08:00
Eugeni Dodonov
8bc1f85c02 iommu: Export intel_iommu_enabled to signal when iommu is in use
In i915 driver, we do not enable either rc6 or semaphores on SNB when dmar
is enabled. The new 'intel_iommu_enabled' variable signals when the
iommu code is in operation.

Cc: Ted Phelps <phelps@gnusto.com>
Cc: Peter <pab1612@gmail.com>
Cc: Lukas Hejtmanek <xhejtman@fi.muni.cz>
Cc: Andrew Lutomirski <luto@mit.edu>
CC: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
2011-12-16 08:49:57 -08:00
KyongHo Cho
8bd6960c6a iommu: Initialize domain->handler in iommu_domain_alloc()
Since it is not guaranteed that an iommu driver initializes in its
domain_init() function, it must be initialized with NULL to prevent
calling a function in an arbitrary location when iommu fault occurred.

Signed-off-by: KyongHo Cho <pullip.cho@samsung.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-16 15:05:13 +01:00
Joerg Roedel
bc21662f72 iommu/amd: Add invalidate-context call-back
This call-back is invoked when the task that is bound to a
pasid is about to exit. The driver can use it to shutdown
all context related to that context in a safe way.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-15 11:15:39 +01:00
Joerg Roedel
52efdb89d6 iommu/amd: Add amd_iommu_device_info() function
This function can be used to find out which features
necessary for IOMMUv2 usage are available on a given device.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-15 11:15:29 +01:00
Joerg Roedel
46277b75da iommu/amd: Adapt IOMMU driver to PCI register name changes
The symbolic register names for PCI and PASID changed in
PCI code. This patch adapts the AMD IOMMU driver to these
changes.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-15 11:05:35 +01:00
Joerg Roedel
a06ec394c9 Merge branch 'iommu/page-sizes' into x86/amd
Conflicts:
	drivers/iommu/amd_iommu.c
2011-12-14 12:52:09 +01:00
Joerg Roedel
175d614673 iommu/amd: Add invalid_ppr callback
This callback can be used to change the PRI response code
sent to a device when a PPR fault fails.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-14 12:09:39 +01:00
Joerg Roedel
8736b2c331 iommu/amd: Implement notifiers for IOMMUv2
Since pages are not pinned anymore we need notifications
when the VMM changes the page-tables. Use mmu_notifiers for
that.
Also use the task_exit notifier from the profiling subsystem
to shutdown all contexts related to this task.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-14 12:09:17 +01:00
Joerg Roedel
028eeacc41 iommu/amd: Implement IO page-fault handler
Register the notifier for PPR faults and handle them as
necessary.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-12 15:34:50 +01:00
Joerg Roedel
2d5503b624 iommu/amd: Add routines to bind/unbind a pasid
This patch adds routines to bind a specific process
address-space to a given PASID.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-12 15:34:42 +01:00
Joerg Roedel
ed96f228ba iommu/amd: Implement device aquisition code for IOMMUv2
This patch adds the amd_iommu_init_device() and
amd_iommu_free_device() functions which make a device and
the IOMMU ready for IOMMUv2 usage.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-12 15:32:51 +01:00
Joerg Roedel
e3c495c74b iommu/amd: Add driver stub for AMD IOMMUv2 support
Add a Kconfig option for the optional driver. Since it is
optional it can be compiled as a module and will only be
loaded when required by another driver.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-12 15:19:07 +01:00
Joerg Roedel
399be2f519 iommu/amd: Add stat counter for IOMMUv2 events
Add some interesting statistic counters for events when
IOMMUv2 is active.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-12 15:19:06 +01:00
Joerg Roedel
6a113ddc03 iommu/amd: Add device errata handling
Add infrastructure for errata-handling and handle two known
erratas in the IOMMUv2 code.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-12 15:19:06 +01:00
Joerg Roedel
f3572db823 iommu/amd: Add function to get IOMMUv2 domain for pdev
The AMD IOMMUv2 driver needs to get the IOMMUv2 domain
associated with a particular device. This patch adds a
function to get this information.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-12 15:19:05 +01:00
Joerg Roedel
c99afa25b6 iommu/amd: Implement function to send PPR completions
To send completions for PPR requests this patch adds a
function which can be used by the IOMMUv2 driver.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-12 15:19:05 +01:00
Joerg Roedel
b16137b11b iommu/amd: Implement functions to manage GCR3 table
This patch adds functions necessary to set and clear the
GCR3 values associated with a particular PASID in an IOMMUv2
domain.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-12 15:19:04 +01:00
Joerg Roedel
22e266c79b iommu/amd: Implement IOMMUv2 TLB flushing routines
The functions added with this patch allow to manage the
IOMMU and the device TLBs for all devices in an IOMMUv2
domain.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-12 15:19:03 +01:00
Joerg Roedel
52815b7568 iommu/amd: Add support for IOMMUv2 domain mode
This patch adds support for protection domains that
implement two-level paging for devices.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-12 15:18:57 +01:00
Joerg Roedel
132bd68f18 iommu/amd: Add amd_iommu_domain_direct_map function
This function can be used to switch a domain into
paging-mode 0. In this mode all devices can access physical
system memory directly without any remapping.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-12 14:55:13 +01:00
Joerg Roedel
72e1dcc419 iommu/amd: Implement notifier for PPR faults
Add a notifer at which a module can attach to get informed
about incoming PPR faults.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-12 14:55:04 +01:00
Joerg Roedel
5abcdba4fa iommu/amd: Put IOMMUv2 capable devices in pt_domain
If the device starts to use IOMMUv2 features the dma handles
need to stay valid. The only sane way to do this is to use a
identity mapping for the device and not translate it by the
iommu. This is implemented with this patch. Since this lifts
the device-isolation there is also a new kernel parameter
which allows to disable that feature.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-12 14:54:58 +01:00
Joerg Roedel
400a28a05f iommu/amd: Add iommuv2 flag to struct amd_iommu
In mixed IOMMU setups this flag inidicates whether an IOMMU
supports the v2 features or not. This patch also adds a
global flag together with a function to query that flag from
other code. The flag shows if at least one IOMMUv2 is in the
system.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-12 14:54:52 +01:00
Joerg Roedel
cbc33a9085 iommu/amd: Enable GT mode when supported by IOMMU
This feature needs to be enabled before IOMMUv2 DTEs can be
set up.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-12 14:54:44 +01:00
Joerg Roedel
1a29ac014a iommu/amd: Setup PPR log when supported by IOMMU
Allocate and enable a log buffer for peripheral page faults
when the IOMMU supports this feature.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-12 14:54:37 +01:00
Joerg Roedel
62f71abbc6 iommu/amd: Get the maximum number of PASIDs supported
Read the number of PASIDs supported by each IOMMU in the
system and take the smallest number as the maximum value
supported by the IOMMU driver.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-12 14:54:30 +01:00
Joerg Roedel
ee6c286845 iommu/amd: Convert dev_table_entry to u64
Convert the contents of 'struct dev_table_entry' to u64 to
allow updating the DTE wit 64bit writes as required by the
spec.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-12 14:54:23 +01:00
Ohad Ben-Cohen
1a36ea815a iommu/omap: be verbose when omap_iommu_iova_to_phys fails
An omap_iommu_iova_to_phys failure usually means that iova wasn't mapped.

When that happens, it's helpful to know the value of iova, so add it
to the error message.

Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-06 14:56:08 +01:00
Sergey Senozhatsky
61ed26e388 intr_remapping: Fix section mismatch in ir_dev_scope_init()
Fix:

 Section mismatch in reference from the function
 ir_dev_scope_init() to the function
 .init.text:dmar_dev_scope_init() The function
 ir_dev_scope_init() references the function __init dmar_dev_scope_init().

Signed-off-by: Sergey Senozhatsky <sergey.senozhatsky@gmail.com>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: Youquan Song <youquan.song@intel.com>
Cc: Ohad Ben-Cohen <ohad@wizery.com>
Link: http://lkml.kernel.org/r/20111026161507.GB10103@swordfish
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2011-12-05 18:22:53 +01:00
Sergey Senozhatsky
c8f369ab60 intel-iommu: Fix section mismatch in dmar_parse_rmrr_atsr_dev()
dmar_parse_rmrr_atsr_dev() calls rmrr_parse_dev() and
atsr_parse_dev() which are both marked as __init.

Section mismatch in reference from the function
dmar_parse_rmrr_atsr_dev() to the function
.init.text:dmar_parse_dev_scope() The function
dmar_parse_rmrr_atsr_dev() references the function __init
dmar_parse_dev_scope().

Section mismatch in reference from the function
dmar_parse_rmrr_atsr_dev() to the function
.init.text:dmar_parse_dev_scope() The function
dmar_parse_rmrr_atsr_dev() references the function __init
dmar_parse_dev_scope().

Signed-off-by: Sergey Senozhatsky <sergey.senozhatsky@gmail.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: iommu@lists.linux-foundation.org
Cc: Joerg Roedel <joerg.roedel@amd.com>
Cc: Ohad Ben-Cohen <ohad@wizery.com>
Link: http://lkml.kernel.org/r/20111026154539.GA10103@swordfish
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2011-12-05 18:22:51 +01:00
Ohad Ben-Cohen
fabdbca8c9 iommu/omap: eliminate the public omap_find_iommu_device() method
Eliminate the public omap_find_iommu_device() method, and don't
expect clients to provide the omap_iommu handle anymore.

Instead, OMAP's iommu driver now utilizes dev_archdata's private iommu
extension to be able to access the required iommu information.

This way OMAP IOMMU users are now able to use the generic IOMMU API without
having to call any omap-specific binding method.

Update omap3isp appropriately.

Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Cc: Hiroshi Doyu <hdoyu@nvidia.com>
2011-12-05 15:47:39 +02:00
Alex Williamson
bcb71abe7d iommu: Add option to group multi-function devices
The option iommu=group_mf indicates the that the iommu driver should
expose all functions of a multi-function PCI device as the same
iommu_device_group.  This is useful for disallowing individual functions
being exposed as independent devices to userspace as there are often
hidden dependencies.  Virtual functions are not affected by this option.

Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-11-15 12:22:31 +01:00
Alex Williamson
8fbdce6595 iommu/amd: Implement iommu_device_group
Just use the amd_iommu_alias_table directly.

Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-11-15 12:22:30 +01:00
Alex Williamson
70ae6f0d55 iommu/intel: Implement iommu_device_group
We generally have BDF granularity for devices, so we just need
to make sure devices aren't hidden behind PCIe-to-PCI bridges.
We can then make up a group number that's simply the concatenated
seg|bus|dev|fn so we don't have to track them (not that users
should depend on that).

Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Acked-By: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-11-15 12:22:30 +01:00
Alex Williamson
1460432cb5 iommu: Add iommu_device_group callback and iommu_group sysfs entry
An IOMMU group is a set of devices for which the IOMMU cannot
distinguish transactions.  For PCI devices, a group often occurs
when a PCI bridge is involved.  Transactions from any device
behind the bridge appear to be sourced from the bridge itself.
We leave it to the IOMMU driver to define the grouping restraints
for their platform.

Using this new interface, the group for a device can be retrieved
using the iommu_device_group() callback.  Users will compare the
value returned against the value returned for other devices to
determine whether they are part of the same group.  Devices with
no group are not translated by the IOMMU.  There should be no
expectations about the group numbers as they may be arbitrarily
assigned by the IOMMU driver and may not be persistent across boots.

We also provide a sysfs interface to the group numbers here so
that userspace can understand IOMMU dependencies between devices
for managing safe, userspace drivers.

[Some code changes by Joerg Roedel <joerg.roedel@amd.com>]

Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-11-15 12:22:23 +01:00
Ohad Ben-Cohen
6c274d1cd5 iommu/core: remove the temporary pgsize settings
Now that all IOMMU drivers are exporting their supported pgsizes,
we can remove the default pgsize settings in register_iommu().

Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-11-10 11:40:38 +01:00
Ohad Ben-Cohen
6d1c56a9db iommu/intel: announce supported page sizes
Let the IOMMU core know we support arbitrary page sizes (as long as
they're an order of 4KiB).

This way the IOMMU core will retain the existing behavior we're used to;
it will let us map regions that:
- their size is an order of 4KiB
- they are naturally aligned

Note: Intel IOMMU hardware doesn't support arbitrary page sizes,
but the driver does (it splits arbitrary-sized mappings into
the pages supported by the hardware).

To make everything simpler for now, though, this patch effectively tells
the IOMMU core to keep giving this driver the same memory regions it did
before, so nothing is changed as far as it's concerned.

At this point, the page sizes announced remain static within the IOMMU
core. To correctly utilize the pgsize-splitting of the IOMMU core by
this driver, it seems that some core changes should still be done,
because Intel's IOMMU page size capabilities seem to have the potential
to be different between different DMA remapping devices.

Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-11-10 11:40:38 +01:00
Ohad Ben-Cohen
aa3de9c050 iommu/amd: announce supported page sizes
Let the IOMMU core know we support arbitrary page sizes (as long as
they're an order of 4KiB).

This way the IOMMU core will retain the existing behavior we're used to;
it will let us map regions that:
- their size is an order of 4KiB
- they are naturally aligned

Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
Cc: Joerg Roedel <Joerg.Roedel@amd.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-11-10 11:40:38 +01:00
Ohad Ben-Cohen
8342727554 iommu/msm: announce supported page sizes
Let the IOMMU core know we support 4KiB, 64KiB, 1MiB and 16MiB page sizes.

This way the IOMMU core can split any arbitrary-sized physically
contiguous regions (that it needs to map) as needed.

Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
Acked-by: David Brown <davidb@codeaurora.org>
Cc: Stepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-11-10 11:40:37 +01:00
Ohad Ben-Cohen
66bc8cf3b1 iommu/omap: announce supported page sizes
Let the IOMMU core know we support 4KiB, 64KiB, 1MiB and 16MiB page sizes.

This way the IOMMU core can split any arbitrary-sized physically
contiguous regions (that it needs to map) as needed.

Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
Cc: Hiroshi DOYU <hdoyu@nvidia.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-11-10 11:40:37 +01:00
Ohad Ben-Cohen
7d3002cc8c iommu/core: split mapping to page sizes as supported by the hardware
When mapping a memory region, split it to page sizes as supported
by the iommu hardware. Always prefer bigger pages, when possible,
in order to reduce the TLB pressure.

The logic to do that is now added to the IOMMU core, so neither the iommu
drivers themselves nor users of the IOMMU API have to duplicate it.

This allows a more lenient granularity of mappings; traditionally the
IOMMU API took 'order' (of a page) as a mapping size, and directly let
the low level iommu drivers handle the mapping, but now that the IOMMU
core can split arbitrary memory regions into pages, we can remove this
limitation, so users don't have to split those regions by themselves.

Currently the supported page sizes are advertised once and they then
remain static. That works well for OMAP and MSM but it would probably
not fly well with intel's hardware, where the page size capabilities
seem to have the potential to be different between several DMA
remapping devices.

register_iommu() currently sets a default pgsize behavior, so we can convert
the IOMMU drivers in subsequent patches. After all the drivers
are converted, the temporary default settings will be removed.

Mainline users of the IOMMU API (kvm and omap-iovmm) are adopted
to deal with bytes instead of page order.

Many thanks to Joerg Roedel <Joerg.Roedel@amd.com> for significant review!

Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
Cc: David Brown <davidb@codeaurora.org>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Joerg Roedel <Joerg.Roedel@amd.com>
Cc: Stepan Moskovchenko <stepanm@codeaurora.org>
Cc: KyongHo Cho <pullip.cho@samsung.com>
Cc: Hiroshi DOYU <hdoyu@nvidia.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: kvm@vger.kernel.org
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-11-10 11:40:37 +01:00
Ohad Ben-Cohen
5009065d38 iommu/core: stop converting bytes to page order back and forth
Express sizes in bytes rather than in page order, to eliminate the
size->order->size conversions we have whenever the IOMMU API is calling
the low level drivers' map/unmap methods.

Adopt all existing drivers.

Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
Cc: David Brown <davidb@codeaurora.org>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Joerg Roedel <Joerg.Roedel@amd.com>
Cc: Stepan Moskovchenko <stepanm@codeaurora.org>
Cc: KyongHo Cho <pullip.cho@samsung.com>
Cc: Hiroshi DOYU <hdoyu@nvidia.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-11-10 11:40:37 +01:00
Ming Lei
08f2e6312c iommu: omap: Fix compile failure
Fix compile failure in drivers/iommu/omap-iommu-debug.c
because of missing module.h include.

Signed-off-by: Ming Lei <tom.leiming@gmail.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-11-08 17:11:57 +01:00