Commit Graph

13 Commits

Author SHA1 Message Date
YiPing Xu
f8054fb8a7 arm64: dts: hi3660: add pmu dt node for hi3660
Add pmu dt node for hi3660

Signed-off-by: YiPing Xu <xuyiping@hisilicon.com>
Signed-off-by: Zhong Kaihua <zhongkaihua@huawei.com>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Tested-by: Jumana Mundichipparakkal <jumana.mp@arm.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-08-16 09:32:07 +01:00
Leo Yan
a6d083441c arm64: dts: hi3660: add L2 cache topology
This patch adds the L2 cache topology on 96boards Hikey960.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-08-16 09:32:06 +01:00
Leo Yan
30fec8268c arm64: dts: hi3660: enable idle states
There are two clusters on the Hi3660, the first one is Cortex-A53 based
and the other one is Cortex-A73 based. These two clusters have different
idle states.

Thanks to Daniel Lezcano's recent changes, the generic ARM cpuidle
driver can now support several clusters with different idle states, thus
supporting the big.Little architecture.

In addition to the WFI idle state which is the default shallowest state
for all ARM cpus, the Hi3660 supports the following states:

 - CA53 CPUs:
        - CPU_SLEEP:       CPU power off state
        - CLUSTER_SLEEP_0: Cluster power off state

 - CA73 CPUs:
        - CPU_NAP:         CPU retention state
        - CPU_SLEEP:       CPU power off state
        - CLUSTER_SLEEP_1: Cluster power off state

This patch adds the idle states description for the Hi3660 to the device
tree.

Cc: Kevin Wang <jean.wangtao@linaro.org>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-08-16 09:32:06 +01:00
Li Wei
804d7d7a96 arm64: dts: hi3660: add sd/sdio device nodes
Add sd/sdio device nodes for hi3660 soc

Signed-off-by: Li Wei <liwei213@huawei.com>
Signed-off-by: Chen Jun <chenjun14@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-06-16 15:31:20 +01:00
Xiaowei Song
96909778f8 arm64: dts: hisi: add kirin pcie node
Add PCIe node for hi3660

Cc: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: Xiaowei Song <songxiaowei@hisilicon.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>

Changes in v5:
 * fix interrupt-map, to conform to gic's #address-cells = <0>
 * remove redundant status = "ok"
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-06-16 15:30:39 +01:00
Leo Yan
7519633067 arm64: dts: hi3660: add sp804 timer node
The Hi3660 SoC comes with the sp804 timer in addition to the
architecture timers. These ones are shutdown when reaching a deep idle
states and a backup timer is needed. The sp804 belongs to another power
domain and can fulfill the purpose of replacing temporarily an
architecture timer when the CPU is idle.

Describe it in the device tree, so it can be enabled at boot time.

Suggested-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-06-15 11:50:23 +01:00
Wang Xiaoyin
388104979b arm64: dts: hi3660: add spi device nodes
Add spi2 and spi3 device nodes for hi3660, and enable them for hikey960.

On HiKey960:
 - SPI2 is wired out through low speed expansion connector.
 - SPI3 is wired out through high speed expansion connector.

Signed-off-by: Wang Xiaoyin <hw.wangxiaoyin@hisilicon.com>
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-06-15 11:50:22 +01:00
Chen Feng
0a0698f689 arm64: dts: hi3660: Add pl031 rtc node
Add dts node to enable pl031 rtc.

Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-06-15 11:50:22 +01:00
Chen Feng
254b07b2a2 arm64: dts: hi3660: Add uarts nodes
Add nodes uart0 to uart4 and uart6 for hi3660 SoC.
Enable uart3 and uart6, disable uart5, in hikey960 board dts.

On HiKey960:
 - UART6 is used as default console, and is wired out through low speed
         expansion connector.
 - UART3 has RTS/CTS hardware handshake, and is wired out through low
         speed expansion connector.
 - UART5 is not used in commercial launched boards. So disable it.
 - UART4 is connected to Bluetooth, WL1837.

Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
Signed-off-by: Wang Xiaoyin <hw.wangxiaoyin@hisilicon.com>
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
Reviewed-by: Zhangfei Gao <zhangfei.gao@hisilicon.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-06-15 11:50:22 +01:00
Wang Xiaoyin
d94eab860d arm64: dts: hi3660: add gpio dtsi file for Hisilicon Hi3660 SOC
This patch adds pl061 device nodes for Hi3660 SoC.

Signed-off-by: Wang Xiaoyin <hw.wangxiaoyin@hisilicon.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-06-15 11:50:22 +01:00
Zhangfei Gao
5f8a3b77a7 arm64: dts: Add I2C nodes for Hi3660
Add I2C nodes for Hi3660-hikey960.

On HiKey960,
I2C0, I2C7 are connected to Low Speed Expansion Connector.
I2C1 is connected to ADV7535.
I2C3 is connected to USB5734.

Cc: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-06-15 11:50:22 +01:00
Zhangfei Gao
a4e36ae0fb arm64: dts: hi3660: add resources for clock and reset
Add some resource nodes for clock and reset

Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-06-15 11:50:22 +01:00
Chen Feng
35ca816813 arm64: dts: Add dts files for Hisilicon Hi3660 SoC
Add initial dtsi file to support Hisilicon Hi3660 SoC with
support of Octal core CPUs in two clusters(4 * A53 & 4 * A73).

Also add dts file to support HiKey960 development board which
based on Hi3660 SoC.
The output console is earlycon "earlycon=pl011,0xfdf05000".
And the con_init uart5 with a fixed clock, which already
configured at bootloader.

When clock is available, the uart5 will be modified.

Tested on HiKey960 Board.

Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-01-25 16:08:29 +00:00