Commit Graph

3 Commits

Author SHA1 Message Date
Fabrice GASNIER
60b3c7ed71 ARM: STi: Add STiH410 SoC support
This patch adds support to STiH410 SoC.

Please note "st,stih410" is already present in device tree.
The problem is that it is missing the entry in the match table,
and so the L2 cache and other cpus than 0 don't get initialized.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Tested-by: Maxime Coquelin <maxime.coquelin@st.com>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-03-11 15:34:45 +01:00
Maxime COQUELIN
dd548cf910 ARM: STi: Add STiH418 SoC support
This patch adds support to STiH418 SoC.

Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2015-01-16 13:10:21 +01:00
Maxime Coquelin
c6594025c0 ARM: STi: Add STiH407 SoC support
This patch adds support to STiH407 SoC.

Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-05-17 10:22:30 +02:00