This adds a bunch of features for Tegra186, such as PMC, ethernet, I2C,
SDHCI and GPIO. It also enables various features on the P2771 devkit.
A small fix is made to the compatible string list for the flow
controller on Tegra132 and the IOMMU is enabled for host1x on Tegra210.
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Merge tag 'tegra-for-4.12-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt64
arm64: tegra: Device tree changes for v4.12-rc1
This adds a bunch of features for Tegra186, such as PMC, ethernet, I2C,
SDHCI and GPIO. It also enables various features on the P2771 devkit.
A small fix is made to the compatible string list for the flow
controller on Tegra132 and the IOMMU is enabled for host1x on Tegra210.
* tag 'tegra-for-4.12-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Update the Tegra132 flowctrl compatible string
arm64: tegra: Add GPU node for Tegra186
arm64: tegra: Enable IOMMU for host1x on Tegra210
arm64: tegra: Enable VIC on Tegra210
arm64: tegra: Add GPIO expanders on P2771
arm64: tegra: Add power monitors on P2771
arm64: tegra: Add GPIO keys on P2771
arm64: tegra: Enable current monitors on P3310
arm64: tegra: Enable SD/MMC slot on P2771
arm64: tegra: Enable SDHCI controllers on P3110
arm64: tegra: Add initial power tree for P3310
arm64: tegra: Enable ethernet on P3310
arm64: tegra: Enable I2C controllers on P3310
arm64: tegra: Invert the PMC interrupt on P3310
arm64: tegra: Add ethernet support for Tegra186
arm64: tegra: Add PMC controller on Tegra186
Signed-off-by: Olof Johansson <olof@lixom.net>
H5 patches for 4.12, which are mostly related to reworking the H3 DTSI to
be usable on the arm64 H5 DTSI, that shares almost everything with the H3
but the CPU cores.
We then have patches to support the H5 boards on top.
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Merge tag 'sunxi-dt-h5-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt64
Allwinner H5 DT changes for 4.12
H5 patches for 4.12, which are mostly related to reworking the H3 DTSI to
be usable on the arm64 H5 DTSI, that shares almost everything with the H3
but the CPU cores.
We then have patches to support the H5 boards on top.
* tag 'sunxi-dt-h5-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: sunxi: h3/h5: switch apb0-related clocks to r_ccu
arm64: allwinner: h5: enable USB OTG on Orange Pi PC 2 board
arm64: allwinner: h5: add support for the Orange Pi PC 2 board
arm64: allwinner: h5: add Allwinner H5 .dtsi
ARM: sunxi: h3/h5: add usb_otg and OHCI/EHCI for usbc0 on H3/H5
arm: sun8i: h3: split Allwinner H3 .dtsi
arm: sun8i: h3: correct the GIC compatible in H3 to gic-400
arm: sun8i: h3: drop pinctrl-a10.h inclusion for H3 DTSI
arm: sun8i: h3: drop skeleton.dtsi inclusion in H3 DTSI
Signed-off-by: Olof Johansson <olof@lixom.net>
Some patches to enable the PRCM block in the A64
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Merge tag 'sunxi-dt64-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt64
Allwinner arm64 DT changes for 4.12
Some patches to enable the PRCM block in the A64
* tag 'sunxi-dt64-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: allwinner: a64: add R_PIO pinctrl node
arm64: allwinner: a64: add r_ccu node
Signed-off-by: Olof Johansson <olof@lixom.net>
The HDMI modes needs more CMA memory to be reserved at boot-time.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Now that 3adbf34273 "iio: adc: add a driver for the SAR ADC found in
Amlogic Meson SoCs" has added support for the ADC, let's enable it
on Odroid C2.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Allwinner A64 have a dedicated pin controller to manage the PL pin bank.
As the driver and the required clock support are added, add the device
node for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
A64 SoC have a CCU (r_ccu) in PRCM block.
Add the device node for it.
The mux 3 of R_CCU is an internal oscillator, which is 16MHz according
to the user manual, and has only 30% accuracy based on our experience
on older SoCs. The real mesaured value of it on two Pine64 boards is
around 11MHz, which is around 70% of 16MHz.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Update the Tegra132 flowctrl compatible string to include
"nvidia,tegra132-flowctrl" so it is aligned with the flowctrl binding
documentation.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add the DT node for the GP10B GPU on Tegra186.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The core addition is the support for the rk3399-based Gru family of
ChromeOS devices, like the Kevin board which is the recently released
Samsung Chromebook Plus. Additionally the usb3 controllers are added
to rk3399 as they're used on Gru devices and even without full type-c
support they can at least drive usb2 devices already.
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Merge tag 'v4.12-rockchip-dts64-symlinks-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64
Pull "Rockchip dts64 updates (using arm/arm64 symlinks) for 4.12 part1" from Heiko Stübner
Rockchip dts changes based on the newly created arm/arm64 symlinks.
The core addition is the support for the rk3399-based Gru family of
ChromeOS devices, like the Kevin board which is the recently released
Samsung Chromebook Plus. Additionally the usb3 controllers are added
to rk3399 as they're used on Gru devices and even without full type-c
support they can at least drive usb2 devices already.
* tag 'v4.12-rockchip-dts64-symlinks-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: add regulator info for Kevin digitizer
arm64: dts: rockchip: describe Gru/Kevin OPPs + CPU regulators
arm64: dts: rockchip: add Gru/Kevin DTS
dt-bindings: Document rk3399 Gru/Kevin
arm64: dts: rockchip: support dwc3 USB for rk3399
default, mmc-resets) and also removes the wrongly added idle states, that
do not match the hardware's capabilities, as well as some general rk3399
pcie fixes as well as also the mmc resets.
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Merge tag 'v4.12-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64
Pull "Rockchip dts64 updates for 4.12 part1" from Heiko Stübner:
Contains various changes for the rk3368 (dma, i2s, disable mailbox per
default, mmc-resets) and also removes the wrongly added idle states, that
do not match the hardware's capabilities, as well as some general rk3399
pcie fixes as well as also the mmc resets.
* tag 'v4.12-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: fix PCIe domain number for rk3399
arm64: dts: rockchip: add rk3399 dw-mmc resets
arm64: dts: rockchip: add rk3368 dw-mmc resets
arm64: dts: rockchip: disable mailbox of RK3368 SoCs per default
arm64: dts: rockchip: add i2s nodes support for RK3368 SoCs
arm64: dts: rockchip: add dmac nodes for rk3368 SoCs
arm64: dts: rockchip: remove wrongly added idle states on rk3368
arm64: dts: rockchip: sort rk3399-pcie by unit address
4.12, please pull the following:
- Rob enables the cryptographic block on Northstar 2 (SPU) by adding the proper
Device Tree nodes
- Jon replaces all occurences of: status = "ok" with status = "okay" to better
conform to the Device Tree specification
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Merge tag 'arm-soc/for-4.12/devicetree-arm64' of http://github.com/Broadcom/stblinux into next/dt64
Pull "Broadcom devicetree-arm64 changes for 4.12" from Florian Fainelli:
This pull request contains Broadcom ARM64-based SoCs Device Tree updates for
4.12, please pull the following:
- Rob enables the cryptographic block on Northstar 2 (SPU) by adding the proper
Device Tree nodes
- Jon replaces all occurences of: status = "ok" with status = "okay" to better
conform to the Device Tree specification
* tag 'arm-soc/for-4.12/devicetree-arm64' of http://github.com/Broadcom/stblinux:
arm64: dts: NS2: convert "ok" to "okay"
arm64: dts: NS2: Add Broadcom SPU driver DT entry
- Add RTC support on Armada 7k/8k
- Improve i2c support on Armada 37xx
- Add gpio expander and RTC on Armada 3720 board
- Improve USB3 support on Armada 37xx
- Add network support on Armada 7k/8k
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Merge tag 'mvebu-dt64-4.12-1' of git://git.infradead.org/linux-mvebu into next/dt64
Pull "mvebu dt64 for 4.12 (part 1)" from Gregory CLEMENT:
- Add RTC support on Armada 7k/8k
- Improve i2c support on Armada 37xx
- Add gpio expander and RTC on Armada 3720 board
- Improve USB3 support on Armada 37xx
- Add network support on Armada 7k/8k
* tag 'mvebu-dt64-4.12-1' of git://git.infradead.org/linux-mvebu:
arm64: marvell: dts: add PPv2.2 description to Armada 7K/8K
ARM64: dts: marvell: armada-3720 add RTC support
ARM64: dts: marvell: armada-3720-db: Add phy for USB3
ARM64: dts: marvell: armada-37xx: Add clock resource for USB3
ARM64: dts: marvell: armada-37xx: Fix interrupt mapping for USB3
ARM64: dts: marvell: armada-3720-db: add gpio expander
ARM64: dts: marvell: armada37xx: add address and size property for i2c cells
arm64: dts: marvell: add RTC description for Armada 7K/8K
Move and update device tree files as part of transition from Broadcom
Vulcan to Cavium ThunderX2.
The changes are to:
* rename dts/broadcom/vulcan.dtsi to cavium/thunder2-99xx.dtsi,
update cpu cores to be "cavium,thunder2", and update SoC to be
"cavium,thunderx2-cn9900"
* move SoC dts/broadcom/vulcan-eval.dtsi to cavium/thunder2-99xx.dtsi
and update board name string
* Update dts/broadcom/Makefile not to build vulcan dtbs
* Update dts/cavium/Makefile to build thunder2 dtbs
No changes to the dts contents except the updated "compatible" and
"model" properties.
Signed-off-by: Jayachandran C <jnair@caviumnetworks.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Declare a ramoops memory segment to aid debugging for those without UART
access. Verified to carry console log when holding volume down for 15
seconds.
No memory region for ramoops-like support was found downstream, so the
arbitrarily picked region is the last MB of System RAM.
Cc: John Stultz <john.stultz@linaro.org>
Cc: Mart Raudsepp <leio@gentoo.org>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
It's necessary to reference the xo clock and cx supply, so specify these
in the node. Also move the Hexagon smd-edge into the hexagon node, to
enable SSR.
As cxo is not yet available we reference the fixed version of cxo for
now, which will work until proper power management is implemented.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The PMU on msm8916 is for the cortex-a53 type CPU. Update the
compatible to the more specific one so we can get the a53
specific events out of the PMU.
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The SMEM state property name changes between the integration branch and
mainline, update to use the correct one.
Fixes: 2f45d9fcd5 ("arm64: dts: msm8996: Add SMP2P and APCS nodes")
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Sarangdhar Joshi <spjoshi@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add EE and AO domains pins for the spdif output to the gxl device tree.
Acked-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add EE and AO domains pins for the i2s output clocks and data the gxl
device tree
Acked-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add EE and AO domains pins for the spdif output to the gxbb device tree.
Acked-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add EE and AO domains pins for the i2s output clocks and data to the gxbb
device tree.
Acked-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The ODroid-C2 on-board USB Hub needs to to have it's reset signal set to
high level in order to be enumerated by the USB Host Controller.
But this management must be part of the currently in-development Generic
Power Sequence patch that will allow a USB Controller driver to start and stop
a power sequence associated to the USB Bus.
In the meantime, a simple USB Hog will work to enable the USB Hub.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The same Mali-450 MP3 GPU is present in the GXBB and GXL SoCs.
The node is simply added in the meson-gxbb.dtsi file.
For GXL, since a lot is shared with the GXM that has a Mali-T820 IP, this
patch adds a new meson-gxl-mali.dtsi and is included in the SoC specific
dtsi files.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
[khilman: s/MALI/Mali in changelog]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Orange Pi PC 2 board features a OTG port like the one on older H3 Orange
Pi's, with PG12 pin being the id det pin and PL2 being the vbus driver
pin.
Add support for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Orange Pi PC 2 is a typical single board computer using the
Allwinner H5 SoC. Apart from the usual suspects it features three
separately driven USB ports and a Gigabit Ethernet port.
Also it has a SPI NOR flash soldered, from which the board can boot
from. This enables the SBC to behave like a "real computer" with
built-in firmware.
Add the board specific .dts file, which includes the H5 .dtsi and
enables the peripherals that we support so far.
Reviewed-by: Rask Ingemann Lambertsen <rask@formelder.dk>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
[Icenowy: dropped all GPIO pinctrl nodes, change red LED gpio,
change MMC cd to active-low, rename some node names to prevent
underscores]
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Allwinner H5 SoC is pin-compatible to the H3 SoC, but uses
Cortex-A53 cores instead.
Based on the now shared base .dtsi describing the common peripherals
describe the H5 specific nodes on top of that.
That symlinks in the sunxi-h3-h5.dtsi from the arch/arm tree.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
[Icenowy: add H5 pinctrl compatible, and changes for my h3-h5 dtsi
refactor, commit message changed to meet new arm64 naming scheme,
drop H3 pinctrl compatible because of interrupt bank change, drop
H3 ccu compatible because of clock change, drop ccu node as it come
into h3-h5 dtsi]
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add pinctrl pins nodes following the additions of missing pins in the pinctrl
driver.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Prepend the compatible strings with a GX generic name in nodes compatible with
the GXBB HW and keep the same scheme as other nodes.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Since we know the GXBB and GXL/GXM share more hardware, we can safely move
the remaining peripheral nodes present in the GXBB dtsi to the common GX dtsi.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Khadas VIM series consists of two boards which are almost
identical:
They are both using the same GXL S905X SoC, 100Mbit/s ethernet
(through the SoC-internal PHY), 2GB DDR3 memory, a micro-SD card slot,
onboard eMMC, Broadcom based SDIO WIFI, 2x USB A and 1x USB Type-C (the
latter with OTG support). The red LED is driven by PWM_AO_B (which
allows dimming), while the blue LED is managed by the firmware.
The differences are:
- the VIM Pro has a 16GB eMMC module, while the VIM only has 8GB
- the VIM Pro uses an AP6255 a/b/g/n/ac WIFI module, while the VIM comes
with an AP6212 b/g/n SDIO WIFI module
(the Vim uses an 8GB eMMC module, while
The boards are based on Amlogic's GXL S905X P212 reference design, which
is why most of the functionality (all MMC controllers and power
sequences, IR remote input, the main UART, ADC and ethernet) is simply
inherited from meson-gxl-s905x-p212.dtsi.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This adds the new DT nodes for the missing PWM pins in the EE and AO
domain.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This commit adds the description of the PPv2.2 hardware block for the
Marvell Armada 7K and Armada 8K processors, and their corresponding Armada
7040 and 8040 Development boards.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The Armada 3720 DB board has an RTC on the I2C bus. It's a PT7C4337A from
Pericom but which claims to be fully compatible with the ds1337.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Now that the gpio expander is present in the dts, use it to add an USB3
PHY using one of these gpio as a regulator.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The wrong GPIO line was provided here.
Fixes: ef8d2ffedf ("ARM64: dts: meson-gxbb: add MMC support")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This patch describes the GPIO lines usage on the Odroid-C2 board.
This is useful in the debugfs gpio file and using the cdev gpio API.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This patch adds support for the P230 and Q200 ADC laddered button and
GPIO button.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
