Commit Graph

52 Commits

Author SHA1 Message Date
Russell King
2e0e943436 Merge branch 'devel-stable' into for-linus
Conflicts:
	arch/arm/kernel/setup.c
	arch/arm/mach-shmobile/board-kota2.c
2012-01-05 13:24:33 +00:00
Russell King
e0b58ee8c4 Merge branch 'vmalloc' of git://git.linaro.org/people/nico/linux into devel-stable 2012-01-04 09:01:51 +00:00
Nicolas Pitre
9561f4e052 Revert "ARM: move VMALLOC_END down temporarily for shmobile"
This reverts commit 0af362f844 as shmobile
is not using a non-standard memory layout anymore.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
2012-01-02 23:14:35 -05:00
Russell King
6ae25a5b9d Merge branch 'for-rmk' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux into devel-stable
Conflicts:
	arch/arm/mm/ioremap.c
2011-12-08 18:02:04 +00:00
Catalin Marinas
dcfdae04bd ARM: LPAE: Introduce the 3-level page table format definitions
This patch introduces the pgtable-3level*.h files with definitions
specific to the LPAE page table format (3 levels of page tables).

Each table is 4KB and has 512 64-bit entries. An entry can point to a
40-bit physical address. The young, write and exec software bits share
the corresponding hardware bits (negated). Other software bits use spare
bits in the PTE.

The patch also changes some variable types from unsigned long or int to
pteval_t or pgprot_t.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2011-12-08 10:30:39 +00:00
Catalin Marinas
e0c0313bd7 ARM: LPAE: Move page table maintenance macros to pgtable-2level.h
The page table maintenance macros need to be duplicated between the
classic and the LPAE MMU so this patch moves those that are not common
to the pgtable-2level.h file.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2011-12-08 10:30:37 +00:00
Russell King
a32618d28d ARM: pgtable: switch to use pgtable-nopud.h
Nick Piggin noted upon introducing 4level-fixup.h:

| Add a temporary "fallback" header so architectures can run with
| the 4level pagetables patch without modification. All architectures
| should be converted to use the folding headers (include/asm-generic/
| pgtable-nop?d.h) as soon as possible, and the fallback header removed.

This makes ARM compliant with this statement.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2011-12-08 10:30:36 +00:00
Russell King
3ee0fc5ca1 Merge branch 'kexec/idmap' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into devel-stable 2011-12-06 20:27:54 +00:00
Will Deacon
8903826d0c ARM: idmap: populate identity map pgd at init time using .init.text
When disabling and re-enabling the MMU, it is necessary to take out an
identity mapping for the code that manipulates the SCTLR in order to
avoid it disappearing from under our feet. This is useful when soft
rebooting and returning from CPU suspend.

This patch allocates a set of page tables during boot and populates them
with an identity mapping for the .idmap.text section. This means that
users of the identity map do not need to manage their own pgd and can
instead annotate their functions with __idmap or, in the case of assembly
code, place them in the correct section.

Acked-by: Dave Martin <dave.martin@linaro.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2011-12-06 14:04:14 +00:00
Rob Herring
7dbaa46678 ARM: 7169/1: topdown mmap support
Similar to other architectures, this adds topdown mmap support in user
process address space allocation policy. This allows mmap sizes greater
than 2GB. This support is largely copied from MIPS and the generic
implementations.

The address space randomization is moved into arch_pick_mmap_layout.

Tested on V-Express with ubuntu and a mmap test from here:
https://bugs.launchpad.net/bugs/861296

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-12-06 11:15:25 +00:00
Nicolas Pitre
0af362f844 ARM: move VMALLOC_END down temporarily for shmobile
THIS IS A TEMPORARY HACK.  The purpose of this is _only_ to avoid a
regression on an existing machine while a better fix is implemented.

On shmobile the consistent DMA memory area was set to 158MB in commit
28f0721a79 with no explanation.  The documented size for this area should
vary between 2MB and 14MB, and none of the other ARM targets exceed that.

The included #warning is therefore meant to be noisy on purpose to get
shmobile maintainers attention and this commit reverted once this
consistent DMA size conflict is resolved.

Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Cc: Magnus Damm <damm@opensource.se>
Cc: Paul Mundt <lethal@linux-sh.org>
2011-11-26 19:21:30 -05:00
Nicolas Pitre
0536bdf33f ARM: move iotable mappings within the vmalloc region
In order to remove the build time variation between different SOCs with
regards to VMALLOC_END, the iotable mappings are now allocated inside
the vmalloc region.  This allows for VMALLOC_END to be identical across
all machines.

The value for VMALLOC_END is now set to 0xff000000 which is right where
the consistent DMA area starts.

To accommodate all static mappings on machines with possible highmem usage,
the default vmalloc area size is changed to 240 MB so that VMALLOC_START
is no higher than 0xf0000000 by default.

Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Tested-by: Jamie Iles <jamie@jamieiles.com>
2011-11-26 19:21:26 -05:00
Linus Torvalds
1fdb24e969 Merge branch 'devel-stable' of http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm
* 'devel-stable' of http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm: (178 commits)
  ARM: 7139/1: fix compilation with CONFIG_ARM_ATAG_DTB_COMPAT and large TEXT_OFFSET
  ARM: gic, local timers: use the request_percpu_irq() interface
  ARM: gic: consolidate PPI handling
  ARM: switch from NO_MACH_MEMORY_H to NEED_MACH_MEMORY_H
  ARM: mach-s5p64x0: remove mach/memory.h
  ARM: mach-s3c64xx: remove mach/memory.h
  ARM: plat-mxc: remove mach/memory.h
  ARM: mach-prima2: remove mach/memory.h
  ARM: mach-zynq: remove mach/memory.h
  ARM: mach-bcmring: remove mach/memory.h
  ARM: mach-davinci: remove mach/memory.h
  ARM: mach-pxa: remove mach/memory.h
  ARM: mach-ixp4xx: remove mach/memory.h
  ARM: mach-h720x: remove mach/memory.h
  ARM: mach-vt8500: remove mach/memory.h
  ARM: mach-s5pc100: remove mach/memory.h
  ARM: mach-tegra: remove mach/memory.h
  ARM: plat-tcc: remove mach/memory.h
  ARM: mach-mmp: remove mach/memory.h
  ARM: mach-cns3xxx: remove mach/memory.h
  ...

Fix up mostly pretty trivial conflicts in:
 - arch/arm/Kconfig
 - arch/arm/include/asm/localtimer.h
 - arch/arm/kernel/Makefile
 - arch/arm/mach-shmobile/board-ap4evb.c
 - arch/arm/mach-u300/core.c
 - arch/arm/mm/dma-mapping.c
 - arch/arm/mm/proc-v7.S
 - arch/arm/plat-omap/Kconfig
largely due to some CONFIG option renaming (ie CONFIG_PM_SLEEP ->
CONFIG_ARM_CPU_SUSPEND for the arm-specific suspend code etc) and
addition of NEED_MACH_MEMORY_H next to HAVE_IDE.
2011-10-28 12:02:27 -07:00
Catalin Marinas
d7c5d0dcff ARM: 7077/1: LPAE: Use a mask for physical addresses in page table entries
With LPAE, the physical address mask is 40-bit while the page table
entry is 64-bit. This patch introduces PHYS_MASK for the 2-level page
table format, defined as ~0UL.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-10-06 15:40:06 +01:00
Catalin Marinas
17f5721196 ARM: 7075/1: LPAE: Factor out 2-level page table definitions into separate files
This patch moves page table definitions from asm/page.h, asm/pgtable.h
and asm/ptgable-hwdef.h into corresponding *-2level* files.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-10-06 15:40:05 +01:00
Santosh Shilimkar
8fb54284ba ARM: mm: Add strongly ordered descriptor support.
On certain architectures, there might be a need to mark certain
addresses with strongly ordered memory attributes to avoid ordering
issues at the interconnect level.

On OMAP4, the asynchronous bridge buffers can only be drained
with strongly ordered accesses and hence the need to mark the
memory strongly ordered.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Woodruff Richard <r-woodruff2@ti.com>
Tested-by: Vishwanath BS <vishwanath.bs@ti.com>
2011-09-23 12:05:30 +05:30
Russell King
516295e5ab ARM: pgtable: add pud-level code
Add pud_offset() et.al. between the pgd and pmd code in preparation of
using pgtable-nopud.h rather than 4level-fixup.h.

This incorporates a fix from Jamie Iles <jamie@jamieiles.com> for
uaccess_with_memcpy.c.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-02-21 19:24:14 +00:00
Will Deacon
cae6292b65 ARM: 6672/1: LPAE: use phys_addr_t instead of unsigned long in mapping functions
The unsigned long datatype is not sufficient for mapping physical addresses
>= 4GB.

This patch ensures that the phys_addr_t datatype is used to represent physical
addresses when converting from a PFN.

Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-02-15 14:20:23 +00:00
Russell King
36bb94ba36 ARM: pgtable: provide RDONLY page table bit rather than WRITE bit
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-22 11:05:35 +00:00
Russell King
9522d7e4cb ARM: pgtable: invert L_PTE_EXEC to L_PTE_XN
The hardware page tables use an XN bit 'execute never'.  Historically,
we've had a Linux 'execute allow' bit, in the positive sense.  Get rid
of this artifact as future hardware will continue to have the XN sense.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-22 11:05:35 +00:00
Russell King
e926f4495e ARM: pgtable: remove FIRST_USER_PGD_NR
FIRST_USER_PGD_NR is now unnecessary, as this has been replaced by
FIRST_USER_ADDRESS except in the architecture code.  Fix up the last
usage of FIRST_USER_PGD_NR, and remove the definition.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-22 11:05:34 +00:00
Russell King
614dd0585f ARM: pgtable: collect up identity mapping functions
We have two places where we create identity mappings - one when we bring
secondary CPUs online, and one where we setup some mappings for soft-
reboot.  Combine these two into a single implementation.  Also collect
the identity mapping deletion function.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-22 11:05:33 +00:00
Russell King
d30e45eeab ARM: pgtable: switch order of Linux vs hardware page tables
This switches the ordering of the Linux vs hardware page tables in
each page, thereby eliminating some of the arithmetic in the page
table walks.  As we now place the Linux page table at the beginning
of the page, we can deal with the offset in the pgt by simply masking
it away, along with the other control bits.

This also makes the arithmetic all be positive, rather than a mixture.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-22 11:05:32 +00:00
Russell King
f6e3354d02 ARM: pgtable: introduce pteval_t to represent a pte value
This makes everywhere dealing with pte values use the same type.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-11-26 20:45:47 +00:00
Russell King
97092e0c56 ARM: pgtable: use phys_addr_t for physical addresses
Ensure that physical addresses are typed as phys_addr_t

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-11-26 20:45:46 +00:00
Russell King
69529c0eb7 ARM: pgtable: directly pass pgd/pmd/pte to their error functions
Rather than passing the pte value to __pte_error, pass the raw pte_t
cookie instead.  Do the same for pmd and pgd functions.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-11-26 20:45:45 +00:00
Russell King
b510b049b5 ARM: pgtable: group pte functions together
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-11-26 20:45:44 +00:00
Russell King
4eec4b1396 ARM: pgtable: group pgd functions and data together
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-11-26 20:17:33 +00:00
Russell King
eb9b2b69d3 ARM: pgtable: move pgprot functions to one place
Rather than scattering them throughout the file, group them together.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-11-26 17:43:18 +00:00
Russell King
c0ba10b512 ARM: improve compiler's ability to optimize page tables
Allow the compiler to better optimize the page table walking code
by avoiding over-complex pmd_addr_end() calculations.  These
calculations prevent the compiler spotting that we'll never iterate
over the PMD table, causing it to create double nested loops where
a single loop will do.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-11-21 14:42:47 +00:00
Peter Zijlstra
ece0e2b640 mm: remove pte_*map_nested()
Since we no longer need to provide KM_type, the whole pte_*map_nested()
API is now redundant, remove it.

Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Acked-by: Chris Metcalf <cmetcalf@tilera.com>
Cc: David Howells <dhowells@redhat.com>
Cc: Hugh Dickins <hughd@google.com>
Cc: Rik van Riel <riel@redhat.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Russell King <rmk@arm.linux.org.uk>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: David Miller <davem@davemloft.net>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2010-10-26 16:52:08 -07:00
Russell King
23beab76b4 Merge branches 'at91', 'dcache', 'ftrace', 'hwbpt', 'misc', 'mmci', 's3c', 'st-ux' and 'unwind' into devel 2010-10-18 22:34:25 +01:00
Catalin Marinas
d907387c42 ARM: 6383/1: Implement phys_mem_access_prot() to avoid attributes aliasing
ARMv7 onwards requires that there are no aliases to the same physical
location using different memory types (i.e. Normal vs Strongly Ordered).
Access to SO mappings when the unaligned accesses are handled in
hardware is also Unpredictable (pgprot_noncached() mappings in user
space).

The /dev/mem driver requires uncached mappings with O_SYNC. The patch
implements the phys_mem_access_prot() function which generates Strongly
Ordered memory attributes if !pfn_valid() (independent of O_SYNC) and
Normal Noncacheable (writecombine) if O_SYNC.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-09-19 12:19:18 +01:00
Catalin Marinas
6012191aa9 ARM: 6380/1: Introduce __sync_icache_dcache() for VIPT caches
On SMP systems, there is a small chance of a PTE becoming visible to a
different CPU before the current cache maintenance operations in
update_mmu_cache(). To avoid this, cache maintenance must be handled in
set_pte_at() (similar to IA-64 and PowerPC).

This patch provides a unified VIPT cache handling mechanism and
implements the __sync_icache_dcache() function for ARMv6 onwards
architectures. It is called from set_pte_at() and replaces the
update_mmu_cache(). The latter is still used on VIVT hardware where a
vm_area_struct is required.

Tested-by: Rabin Vincent <rabin.vincent@stericsson.com>
Cc: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-09-19 12:17:44 +01:00
Russell King
47ab0dee66 ARM: Optionally allow ARMv6 to use 'normal, bufferable' memory for DMA
Provide a configuration option to allow the ARMv6 to use normal
bufferable memory for coherent DMA.  This option is forced to 'y'
for ARMv7, and offered as a configuration option on ARMv6.

Enabling this option requires drivers to have the necessary barriers
to ensure that data in DMA coherent memory is visible prior to the
DMA operation commencing.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-05-17 11:52:11 +01:00
Russell King
26a26d3296 ARM: dma-mapping: switch ARMv7 DMA mappings to retain 'memory' attribute
On ARMv7, it is invalid to map the same physical address multiple times
with different memory types.  Since system RAM is already mapped as
'memory', subsequent remapping of it must retain this attribute.

However, DMA memory maps it as "strongly ordered".  Fix this by introducing
'pgprot_dmacoherent()' which provides the necessary page table bits for
DMA mappings.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Greg Ungerer <gerg@uclinux.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
2009-11-24 17:41:36 +00:00
Russell King
65cec8e3db ARM: implement highpte
Add the ARM implementation of highpte, which allows PTE tables to be
placed in highmem.  Unfortunately, we do not offer highpte support
when support for L2 cache is enabled.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-08-17 20:02:06 +01:00
Russell King
6a00cded91 [ARM] pgtable: rearrange file PTE bit allocation
For future compatibility, we need to ensure that swap and file Linux
PTEs conform with the hardware PTEs "fault" encoding.  Swap PTEs
already fit in with this, but file PTEs do not.  Shift them by one
bit to ensure that they conform, using bit 2 to distinguish between
swap and file PTEs.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-07-11 16:59:39 +01:00
Russell King
f7a55fa6ec [ARM] remove L_PTE_BUFFERABLE and L_PTE_CACHEABLE
These old symbols are meaningless now that we have memory type
support implemented.  The entire memory type field needs to be
modified rather than just a few bits twiddled.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-07-11 16:55:52 +01:00
Russell King
65b1bfc13e [ARM] pgtable: file pte layout documentation
Document the layout of our file PTE entries.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-07-05 15:31:35 +01:00
Russell King
fb93a1c75e [ARM] pgtable: swp pte layout documentation, definitions, and check
Document the layout of our swp PTE entries, adding definitions for
the bit masks/shifts/sizes, and implement MAX_SWAPFILES_CHECK()
such that we fail to build if we are unable to properly encode the
swp type field.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-07-05 15:31:26 +01:00
Russell King
924a158a12 [ARM] Convert pmd_page() to be highmem safe
In the long run, we may want to place page tables in highmem.  However,
pmd_page() has traditionally been coded to convert the physical address
to a virtual one, which won't work with highmem pages.  Instead,
translate the physical address to a PFN, and then convert the PFN to a
struct page instead.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-04-26 13:14:52 +01:00
Russell King
6a4690c22f Merge branch 'ptebits' into devel
Conflicts:

	arch/arm/Kconfig
2008-10-09 21:31:56 +01:00
Russell King
8ec53663d2 [ARM] Improve non-executable support
Add support for detecting non-executable stack binaries, and adjust
permissions to prevent execution from data and stack areas.  Also,
ensure that READ_IMPLIES_EXEC is enabled for older CPUs where that
is true, and for any executable-stack binary.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01 16:41:10 +01:00
Russell King
db5b716947 [ARM] Remove MT_DEVICE_IXP2000 and associated definitions
As of the previous commit, MT_DEVICE_IXP2000 encodes to the same
PTE bit encoding as MT_DEVICE, so it's now redundant.  Convert
MT_DEVICE_IXP2000 to use MT_DEVICE instead, and remove its aliases.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01 16:41:06 +01:00
Russell King
639b0ae7f5 [ARM] Convert ARMv6 and ARMv7 to use new memory types
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01 16:41:00 +01:00
Russell King
9e8b5199a7 [ARM] Convert Xscale and Xscale3 to use new memory types
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01 16:40:58 +01:00
Russell King
bb30f36f9b [ARM] Introduce new PTE memory type bits
Provide L_PTE_MT_xxx definitions to describe the memory types that we
use in Linux/ARM.  These definitions are carefully picked such that:

1. their LSBs match what is required for pre-ARMv6 CPUs.
2. they all have a unique encoding, including after modification
   by build_mem_type_table() (the result being that some have more
   than one combination.)

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01 16:40:56 +01:00
Russell King
9cff96e5bf [ARM] Re-jig Linux PTE bits to allow room for 4 memory type bits
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01 16:40:54 +01:00
Nicolas Pitre
dfcc64497c [ARM] 5271/1: get rid of pages_to_mb()
There is no use of this in the whole tree.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-09-30 16:40:59 +01:00