Some cards don't update the PISR properly when all SISR bits
for Tx interrupts are being cleared and as a result we get
interrupt storm. Since we handle all tx queues all together
(so we don't really use the SISR bits to do per-queue interrupt
handling), we can manualy update PISR by doing a write-to-clear
on its Tx interrupt bits.
Signed-off-by: Nick Kossifidis <mickflemm@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Use a more current logging style.
Make sure all output is prefixed appropriately.
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
No functional changes
Add kernel doc for all ath5k_hw_* functions and strcucts. Also do some cleanup,
rename ath5k_hw_init_beacon to ath5k_hw_init_beacon_timers, remove an unused
variable from ath5k_hw_pcu_init and a few obsolete macros, mostly related to XR.
Signed-off-by: Nick Kossifidis <mickflemm@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
No functional changes, just a few comments/documentation/cleanup
Signed-off-by: Nick Kossifidis <mickflemm@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Since card has 12 tx queues and we want to keep track of the interrupts
per queue we can't fit all these interrupt bits on a single register.
So we have 5 registers, the primary interrupt status register (PISR) and
the 4 secondary interupt status registers (SISRs).
In order to be able to read them all at once (atomic operation) Atheros
introduced the Read-And-Clear registers to make things easier. So when
reading RAC_PISR register, hw does a read on PISR and all SISRs, returns
the value of PISR, copies all SISR values to their shadow copies (RAC_SISRx)
and clears PISR and SISRs. This saves us from reading PISR/SISRs in a sequence.
So far we 've used this approach and MadWiFi/Windows driver etc also used it
for years.
It turns out this operation is not atomic after all (at least not on all cards)
That means it's possible to loose some interrupts because they came after the
copy step and hw cleared them on the clean step !
That's probably the reason we got missed beacons, got stuck queues etc and
couldn't figure out what was going on.
With this patch we switch from RaC operation to an alternative method (that
makes more sense IMHO anyway, I just chose to be on the safe side so far).
Instead of reading RAC registers, we read the normal PISR/SISR registers and
clear any bits we got by writing them back on the register. This will clear only
the bits we got on our read step and leave any new bits unaffected (at least
that's what docs say). So if any new interrupts come up we won't miss it.
I've tested this with an AR5213 and an AR2425 and it seems O.K.
Many thanks to Adrian Chadd for debuging this and reviewing the patch !
v2: Make sure we don't clear PISR bits that map to SISR generated interrupts
(added a comment on the code for this)
Signed-off-by: Nick Kossifidis <mickflemm@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Remove unnecessary includes from base.h. Add includes to other files as
necessary. Don't include base.h unless needed.
Move declarations for functions in base.c from ath5k.h to base.h.
Use a better named define to protect base.h against double inclusion.
Signed-off-by: Pavel Roskin <proski@gnu.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Both ath5k_hw and ath5k_softc represent one instance of the hardware.
This duplication is historical and is not needed anymore.
Keep the name "ath5k_hw" for the merged structure and "ah" for the
variable pointing to it. "ath5k_hw" is shorter than "ath5k_softc", more
descriptive and more widely used.
Put the combined structure to ath5k.h where the old ath5k_softc used to
be. Move some code from base.h to ath5k.h as needed.
Remove memory allocation for struct ath5k_hw and the corresponding error
handling. Merge iobase and ah_iobase fields.
Signed-off-by: Pavel Roskin <proski@gnu.org>
Acked-by: Nick Kossifidis <mickflemm@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Review spotted a problem with the error handling in ath5k_hw_dma_stop:
a successful return from ath5k_hw_stop_tx_dma will be treated as
an error, so we always bail out of the loop after processing a single
active queue. As a result, we may not actually stop some queues during
reset.
Signed-off-by: Bob Copeland <me@bobcopeland.com>
Acked-by: Bruno Randolf <br1@einfach.org>
Acked-by: Nick Kossifidis <mickflemm@gmail.com>
Reviewed-by: Stanislaw Gruszka <sgruszka@redhat.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
* Since we only use ath5k_hw_stop_tx_dma to stop the beacon
queue, introduce a new function ath5k_hw_stop_beacon_queue so
that we can use that instead and have better control. In the future
we can add more beacon queue specific stuff there (maybe tweak
beacon timers or something), for now just call ath5k_hw_stop_tx_dma.
* Also since we don't call ath5k_hw_stop_rx/tx_dma from outside
dma.c, make them static.
Signed-off-by: Nick Kossifidis <mickflemm@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
* Make sure we are not trying to set RXDP while RX is active,
for now ignore the return value.
Signed-off-by: Nick Kossifidis <mickflemm@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
* DCU early termination should be used to quickly flush QCU
according to docs so don't enable it for all queues, enable
it only when stopping each queue and disable it when we are
done.
Signed-off-by: Nick Kossifidis <mickflemm@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
* Increase timeouts on ath5k_hw_stop_tx_dma and also wait for
tx queue to stop before checking for pending frames
* Add a new debug level to debug dma start/stop
Signed-off-by: Nick Kossifidis <mickflemm@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
* Add a new function to stop rx/tx dma and use in when reset starts
Signed-off-by: Nick Kossifidis <mickflemm@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
* No functional changes
* Clean up reset:
Introduce init functions for each unit and call them instead
of having everything inside ath5k_hw_reset (it's just c/p for
now so nothing changes except calling order -I tested it with
various cards and it's ok-)
* Further cleanups:
ofdm_timings belongs to phy.c
rate_duration belongs to pcu.c
clock functions are general and belong to reset.c (more to follow)
* Reorder functions for better organization:
We start with helpers and other functions follow in categories,
init functions are last
Signed-off-by: Nick Kossifidis <mickflemm@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
As reported by Ryan Niemi, some bitmasks in the register definition for the PCU
Diagnostic register (DIAG_SW) were missing a zero at the end. While at it fix
some typos and add more comments.
Signed-off-by: Bruno Randolf <br1@einfach.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This fixes a few misspellings, word repetitions, and some grammar
nits in ath5k comments. No code changes.
Signed-off-by: Bob Copeland <me@bobcopeland.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Now that we have ftrace, it is not needed any more.
Signed-off-by: Bruno Randolf <br1@einfach.org>
Acked-by: Nick Kossifidis <mickflemm@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This patch simplifies the code used to detect when the
self-linked DMA buffer is still in use by hardware, by
checking the hardware's rxdp register instead of looking
at the software buffer list.
Signed-off-by: Bob Copeland <me@bobcopeland.com>
Acked-by: Nick Kossifidis <mickflemm@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
