Commit 3424e3a4f8 ("drm: bridge: analogix/dp: split exynos dp driver to
bridge directory") split the Exynos DP core driver into a core driver and
a bridge driver for the Analogix chip since that is also used by Rockchip.
But the change introduced a regression causing a NULL pointer dereference
when trying to access an uninitialized connector in the driver .get_modes:
Fix this by instead of having a connector struct for both the Exynos and
Analogix drivers, just use the connector initialized in the bridge driver.
Fixes: 3424e3a4f8 ("drm: bridge: analogix/dp: split exynos dp driver to bridge directory")
Reported-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Tested-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
clock_enable callback is used only by FIMD->DP pipeline. Similar but more
universal functionality provides pipeline clock.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <daeinki@gmail.com>
Fix some obvious alignment problems, like alignment and line
over 80 characters problems, make this easy to be maintained
later.
Acked-by: Jingoo Han <jingoohan1@gmail.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Tested-by: Caesar Wang <wxt@rock-chips.com>
Tested-by: Douglas Anderson <dianders@chromium.org>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
The core functionality now resides in the generic bridge part so the
exynos-specific implementation details can get a more suitable nameing.
Tested-by: Caesar Wang <wxt@rock-chips.com>
Tested-by: Douglas Anderson <dianders@chromium.org>
Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
