Commit Graph

4753 Commits

Author SHA1 Message Date
Ganesan Ramalingam
ed21cfe207 MIPS: Netlogic: Support for XLR/XLS Fast Message Network
On XLR/XLS, the cpu cores communicate with fast on-chip devices
(e.g. network accelerator, security engine etc.) using the Fast
Messaging Network(FMN). The FMN queues and credits needs to be
configured and intialized before it can be used.

The co-processor 2 on XLR/XLS CPU cores has registers for FMN access,
and the XLR/XLS has custom instructions for sending and loading
messages.  The FMN can deliver also per-cpu interrupts when messages
are available at the CPU.

This patch adds FMN initialization, adds interrupt setup and handling,
and also provides support for sending and receiving FMN messages.

Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com>
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4468
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:20 +01:00
Jayachandran C
38541742da MIPS: Netlogic: PIC IRQ handling update for multi-chip
Create struct nlm_pic_irq for interrupts handled by the PIC.
This simplifies IRQ handling for multi-SoC as well as
the single SoC cases. Also split the setup of percpu and PIC
interrupts so that we can configure the PIC interrupts for
every node.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4467
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:20 +01:00
Jayachandran C
bb1e4bc5cd MIPS: Netlogic: Make number of nodes configurable
There can be 1, 2 or 4 SoCs(nodes) in a multi-chip XLP board. Add an
option for multi-chip boards in case of XLP, and make the number of
nodes configurable.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4470
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:20 +01:00
Jayachandran C
77ae798f5b MIPS: Netlogic: Support for multi-chip configuration
Upto 4 Netlogic XLP SoCs can be connected over ICI links to form a
coherent multi-node system.  Each SoC has its own set of on-chip
devices including PIC.  To support this, add a per SoC stucture and
use it for the PIC and SYS block addresses instead of using global
variables.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4469
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:19 +01:00
Jayachandran C
2a37b1ae44 MIPS: Netlogic: Move from u32 cpumask to cpumask_t
Initial code to support more than 32 cpus. The platform CPU mask
is updated from 32-bit mask to cpumask_t. Convert places that use
cpu_/cpus_ functions to use cpumask_* functions.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4464
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:19 +01:00
Jayachandran C
7143246e9a MIPS: Netlogic: Update PIC access functions
Remove unused and trivial PIC accesss functions, update nlm_pic_send_ipi()
and nlm_set_irt_to_cpu() to use similar logic, and use correct type for
reg in nlm_pic_disable_irt().

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4463
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:19 +01:00
Jayachandran C
feddaf7d89 MIPS: Netlogic: Pass cpuid to early_init_secondary
The cpuid was not passed into early_init_secondary even though the
comment indicated that it will be. Fix this.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4458
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:19 +01:00
Jayachandran C
862e509b7e MIPS: Netlogic: Fix interrupt table entry init
Used the hardware thread id passed in while writing to IRT in
nlm_pic_init_irt()

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4465
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:19 +01:00
Jayachandran C
b97215fd93 MIPS: Netlogic: Fix DMA zone selection for 64-bit
Fix Kconfig for both XLR and XLP to select ZONE_DMA32 (instead of ZONE_DMA)
in case of 64-bit compilation. This can be used for devices that can only
do DMA to 32-bit address. ZONE_DMA is not useful on XLR or XLP.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4466
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:19 +01:00
Jayachandran C
e83fc6be61 MIPS: Netlogic: Move fdt init to plat_mem_setup
At this point early printk is available, so debugging device tree
issues is easier.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4460
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:19 +01:00
Jayachandran C
5b47a4db1e MIPS: Netlogic: Enable SUE bit in cores
Enable Speculative Unmap Enable bit, which will enable speculative L2
cache requests for unmapped memory. This should give better performance
for kernel code/data which is in KSEG0

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4461
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:18 +01:00
Jayachandran C
d650484649 MIPS: Netlogic: select MIPSR2 for XLP
This allows us to use the r2 optimized code from kernel headers
while compilation.

Disable PGD_C0_CONTEXT option for XLP, which does not work.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4456
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:18 +01:00
Zi Shen Lim
4be3d2f396 MIPS: perf: Add XLP support for hardware perf.
Add support for XLP performance counters register in perf. Update
mips/Kconfig so that perf events can be selected for XLP.

Signed-off-by: Zi Shen Lim <zlim@netlogicmicro.com>
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4457
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:18 +01:00
Madhusudan Bhat
c783390a0e MIPS: oprofile: Support for XLR/XLS processors
Add support for XLR and XLS processors in MIPS Oprofile code. These
processors are multi-threaded and have two counters per core. Each
counter can track either all the events in the core (global mode),
or events in just one thread.

We use the counters in the global mode, and use only the first thread
in each core to handle the configuration etc.

Signed-off-by: Madhusudan Bhat <mbhat@netlogicmicro.com>
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4471
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:18 +01:00
Jonas Gorski
e7e333cb22 MIPS: BCM63XX: move nvram functions into their own file
Refactor nvram related functions into its own unit for easier expansion
and exposure of the values to other drivers.

Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/4516
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:18 +01:00
Jonas Gorski
ba00e2e5c2 MIPS: BCM63XX: use the new reset helper
Use the new reset helper where appropriate.

Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/4453
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:18 +01:00
Jonas Gorski
799faa626c MIPS: BCM63XX: add core reset helper
Add a reset helper for resetting the different cores.

Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/4455
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:18 +01:00
Jonas Gorski
e7e9937ff5 MIPS: BCM63XX: add softreset register description for BCM6358
The softreset register description for BCM6358 was missing, so add it.

Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/4454
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:17 +01:00
Jonas Gorski
f2d1035e95 MIPS: BCM63XX: add and use a clock for PCIe
Add a PCIe clock and use that instead of directly touching the clock
control register. While at it, fail if there is no such clock.

Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Acked-by: Florian Fainelli <florian@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4452
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:17 +01:00
Hauke Mehrtens
b8ebbaff03 MIPS: BCM47xx: sprom: read values without prefix as fallback
There are bcma based devices like the Linksys E2000 out there, which do
have one ieee80211 core, but no PCIe core and they are using no
prefixes for the sprom. In addition some values like boardtype are
stored without a prefix for the main SoC chip also when they have an
additional PCIe wifi chip with an own boardtype var on some devices.

The Ethernet addresses are now also read out correctly without a prefix
so calling bcm47xx_fill_sprom_ethernet is not needed any more.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: http://patchwork.linux-mips.org/patch/4364
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:17 +01:00
Hauke Mehrtens
2c3763111b MIPS: BCM47XX: read sprom without prefix if no ieee80211 core
If there is no ieee80211 core on the devices like on the BCM4706 read
out the sprom and the other data without using a prefix.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: http://patchwork.linux-mips.org/patch/4361
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:17 +01:00
Hauke Mehrtens
5d24ceab4e MIPS: BCM47xx: read out full board data
Read out the full board data independently of the sprom version. Now we
also get the full boardflags and so on if sromrev is not set and our
code would assume a rev 1 device. When a nvram option is not set
because it is not there this is no problem.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: http://patchwork.linux-mips.org/patch/4363
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:17 +01:00
Hauke Mehrtens
c47cc20ca5 MIPS: BCM47XX: improve memory size detection
The memory size is detected by finding a place where it repeats in
memory. Currently we are just checking when the function prom_init is
seen again, but it is better to check for a bigger part of the memory
to decrease the chance of wrong results.

This should fix a problem we saw in OpenWrt, where the detected
available memory decreed on some devices when doing a soft reboot.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: http://patchwork.linux-mips.org/patch/4362
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:17 +01:00
Hauke Mehrtens
d3dce3d676 MIPS: BCM47XX: ignore last memory page
Ignoring the last page when ddr size is 128M. Cached accesses to last
page is causing the processor to prefetch using address above 128M
stepping out of the ddr address space.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: http://patchwork.linux-mips.org/patch/4365
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:17 +01:00
Shane McDonald
b5b64f2ba4 MIPS: Move processing of coherency kernel parameters earlier
Commit 97ce2c88f9 (jump-label: initialize
jump-label subsystem much earlier) caused MIPS to break, so this was
resolved with commit 6650df3c38 (MIPS:
Move cache setup to setup_arch().).  Unfortunately, after this commit,
the coherency kernel parameters, cca and coherentio, are no longer
processed before their values are used.

This patch fixes this problem by marking them as early_param, which
results in them being processed before they are needed.

Signed-off-by: Shane McDonald <mcdonald.shane@gmail.com>
Acked-by: David Daney <david.daney@cavium.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/3961
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:16 +01:00
Charles Hardin
0f731711af mips/octeon: 16-Bit NOR flash was not being detected during boot
The cavium code assumed that all NOR on the boot bus was
an 8-bit NOR part and hardcoded the bankwidth. The simple
solution was to add the code that queries the configuration
register for the width of the bus that has been hardware strapped
to the Cavium. This allows both 8-bit and 16-bit parts to be
discovered during boot.

Acked-by: David Daney <david.daney@cavium.com>
Signed-off-by: Charles Hardin <ckhardin@exablox.com>
Patchwork: http://patchwork.linux-mips.org/patch/4323
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:16 +01:00
Kevin Cernekee
f151f3b92b MIPS: tlbex: Fix section mismatches
The new functions introduced in commit 02a5417751 (MIPS: tlbex: Deal with
re-definition of label) should be marked __cpuinit, to eliminate a
warning that can pop up when CONFIG_EXPORT_UASM is disabled:

      LD      arch/mips/mm/built-in.o
    WARNING: arch/mips/mm/built-in.o(.text+0x2a4c): Section mismatch in reference from the function uasm_bgezl_hazard() to the function .cpuinit.text:uasm_il_bgezl()
    The function uasm_bgezl_hazard() references
    the function __cpuinit uasm_il_bgezl().
    This is often because uasm_bgezl_hazard lacks a __cpuinit
    annotation or the annotation of uasm_il_bgezl is wrong.

    WARNING: arch/mips/mm/built-in.o(.text+0x2a68): Section mismatch in reference from the function uasm_bgezl_label() to the function .cpuinit.text:uasm_build_label()
    The function uasm_bgezl_label() references
    the function __cpuinit uasm_build_label().
    This is often because uasm_bgezl_label lacks a __cpuinit
    annotation or the annotation of uasm_build_label is wrong.

(This warning might not occur if the function was inlined.)

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/4517
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:16 +01:00
Linus Torvalds
d63e210ef1 Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS fixes from Ralf Baechle:
 "Random small fixes across the MIPS code."

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus:
  MIPS: CMP: Fix physical core number calculation logic
  MIPS: JZ4740: Forward declare struct uart_port in header.
  MIPS: JZ4740: Fix '#include guard' in serial.h
  MIPS: hugetlbfs: Fix hazard between tlb write and pagemask restoration.
  MIPS: Restore pagemask after dumping the TLB.
  MIPS: Hugetlbfs: Handle huge pages correctly in pmd_bad()
  MIPS: R5000: Fix TLB hazard handling.
  MIPS: tlbex: Deal with re-definition of label
  MIPS: Make __{,n,u}delay declarations match definitions and generic delay.h
2012-10-18 11:49:39 -07:00
jerin jacob
0cc40dac86 MIPS: CMP: Fix physical core number calculation logic
The CPUNum Field in EBase register is 10bit wide, so after 1 bit right
shift, the mask value should be 0x1ff.

Signed-off-by: jerin jacob <jerinjacobk@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/4420/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-10-18 11:45:41 +02:00
Ralf Baechle
a12265400c MIPS: JZ4740: Forward declare struct uart_port in header.
As suggested by Geert Uytterhoeven <geert@linux-m68k.org>.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Cc: Antony Pavlov <antonynpavlov@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Lars-Peter Clausen <lars@metafoo.de>
2012-10-17 17:00:50 +02:00
Antony Pavlov
a40b012f76 MIPS: JZ4740: Fix '#include guard' in serial.h
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Lars-Peter Clausen <lars@metafoo.de>
Patchwork: https://patchwork.linux-mips.org/patch/4424/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-10-17 16:58:51 +02:00
David Howells
4c7b279c1a UAPI: Place comments in empty arch Kbuilds to make them non-empty
Place comments in:

	arch/mips/include/asm/Kbuild
	arch/tile/include/arch/Kbuild

to make them non-empty so that the patch program doesn't remove them when it
reduces them to nothing.

Possibly they should be just deleted, but it's possible that they'll acquire
generic-y or genhdr-y lines in future, so I'm keeping them around for the
moment.

Note that MIPS will compile happily if the file is deleted instead.  I haven't
tested TILE, but I suspect it will be the same there.

Signed-off-by: David Howells <dhowells@redhat.com>
cc: Ralf Baechle <ralf@linux-mips.org>
cc: Chris Metcalf <cmetcalf@tilera.com>
2012-10-17 12:31:16 +01:00
Ralf Baechle
fb944c9ba3 MIPS: hugetlbfs: Fix hazard between tlb write and pagemask restoration.
On some CPU the write to pagemask might complete before the TLB write
instruction reads from the pagemask register.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-10-17 01:01:21 +02:00
Ralf Baechle
01422ff491 MIPS: Restore pagemask after dumping the TLB.
Or bad things might happen if the last TLB entry isn't a basic size page.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-10-17 01:01:20 +02:00
Ralf Baechle
344afa6550 MIPS: Hugetlbfs: Handle huge pages correctly in pmd_bad()
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-10-17 01:01:12 +02:00
Ralf Baechle
359187d647 MIPS: R5000: Fix TLB hazard handling.
R5000 and the Nevada CPUs (RM5230, RM5231, RM5260, RM5261, RM5270 and
RM5271) are basically the same CPU core and all are documented to require
two instructions separating a write to c0_pagemask, c0_entryhi, c0_entrylo0,
c0_entrylo1 or c0_index.

So far we were only providing on cycle before / after a TLBR/TLBWI
for R5000 but 3 cycles before and 1 cycles after for the Nevadas.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-10-16 22:22:23 +02:00
Ralf Baechle
02a5417751 MIPS: tlbex: Deal with re-definition of label
The microassembler used in tlbex.c does not notice if a label is redefined
resulting in relocations against such labels silently missrelocated.
The issues exists since commit add6eb04776db4189ea89f596cbcde31b899be9d
[Synthesize TLB exception handlers at runtime.] in 2.6.10 and went unnoticed
for so long because the relocations for the affected branches got computed
to do something *almost* sensible.

The issue affects R4000, R4400, QED/IDT RM5230, RM5231, RM5260, RM5261,
RM5270 and RM5271 processors.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-10-16 22:21:27 +02:00
David Daney
5210edcd52 MIPS: Make __{,n,u}delay declarations match definitions and generic delay.h
At some recent point arch/mips/include/asm/delay.h has started being
included into csrc-octeon.c where the __?delay() functions are defined.
This causes a compile failure due to conflicting declarations and
definitions of the functions.

It turns out that the generic definitions in arch/mips/lib/delay.c also
conflict.

Proposed fix: Declare the functions to take unsigned long parameters
just like asm-generic (and x86) does.  Update __delay to agree
(__ndelay and __udelay need no change).

Bonus: Get rid of 'inline' from __delay() definition, as it is globally
visible, and the compiler should be making this decision itself (it does
in fact inline the function without being told to).

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/4354/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-10-16 22:20:03 +02:00
Linus Torvalds
a5ef3f7dcb Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS update from Ralf Baechle:
 "Cleanups and fixes for breakage that occured earlier during this merge
  phase.  Also a few patches that didn't make the first pull request.
  Of those is the Alchemy work that merges code for many of the SOCs and
  evaluation boards thus among other code shrinkage, reduces the number
  of MIPS defconfigs by 5."

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (22 commits)
  MIPS: SNI: Switch RM400 serial to SCCNXP driver
  MIPS: Remove unused empty_bad_pmd_table[] declaration.
  MIPS: MT: Remove kspd.
  MIPS: Malta: Fix section mismatch.
  MIPS: asm-offset.c: Delete unused irq_cpustat_t struct offsets.
  MIPS: Alchemy: Merge PB1100/1500 support into DB1000 code.
  MIPS: Alchemy: merge PB1550 support into DB1550 code
  MIPS: Alchemy: Single kernel for DB1200/1300/1550
  MIPS: Optimize TLB refill for RI/XI configurations.
  MIPS: proc: Cleanup printing of ASEs.
  MIPS: Hardwire detection of DSP ASE Rev 2 for systems, as required.
  MIPS: Add detection of DSP ASE Revision 2.
  MIPS: Optimize pgd_init and pmd_init
  MIPS: perf: Add perf functionality for BMIPS5000
  MIPS: perf: Split the Kconfig option CONFIG_MIPS_MT_SMP
  MIPS: perf: Remove unnecessary #ifdef
  MIPS: perf: Add cpu feature bit for PCI (performance counter interrupt)
  MIPS: perf: Change the "mips_perf_event" table unsupported indicator.
  MIPS: Align swapper_pg_dir to 64K for better TLB Refill code.
  vmlinux.lds.h: Allow architectures to add sections to the front of .bss
  ...
2012-10-14 14:39:05 -07:00
Linus Torvalds
d25282d1c9 Merge branch 'modules-next' of git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux
Pull module signing support from Rusty Russell:
 "module signing is the highlight, but it's an all-over David Howells frenzy..."

Hmm "Magrathea: Glacier signing key". Somebody has been reading too much HHGTTG.

* 'modules-next' of git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux: (37 commits)
  X.509: Fix indefinite length element skip error handling
  X.509: Convert some printk calls to pr_devel
  asymmetric keys: fix printk format warning
  MODSIGN: Fix 32-bit overflow in X.509 certificate validity date checking
  MODSIGN: Make mrproper should remove generated files.
  MODSIGN: Use utf8 strings in signer's name in autogenerated X.509 certs
  MODSIGN: Use the same digest for the autogen key sig as for the module sig
  MODSIGN: Sign modules during the build process
  MODSIGN: Provide a script for generating a key ID from an X.509 cert
  MODSIGN: Implement module signature checking
  MODSIGN: Provide module signing public keys to the kernel
  MODSIGN: Automatically generate module signing keys if missing
  MODSIGN: Provide Kconfig options
  MODSIGN: Provide gitignore and make clean rules for extra files
  MODSIGN: Add FIPS policy
  module: signature checking hook
  X.509: Add a crypto key parser for binary (DER) X.509 certificates
  MPILIB: Provide a function to read raw data into an MPI
  X.509: Add an ASN.1 decoder
  X.509: Add simple ASN.1 grammar compiler
  ...
2012-10-14 13:39:34 -07:00
Linus Torvalds
6c536a17fa KGDB/KDB fixes and cleanups
Cleanups
    Clean up compile warnings in kgdboc.c and x86/kernel/kgdb.c
    Add module event hooks for simplified debugging with gdb
  Fixes
    Fix kdb to stop paging with 'q' on bta and dmesg
    Fix for data that scrolls off the vga console due to line wrapping
      when using the kdb pager
  New
    The debug core registers for kernel module events which allows a
      kernel aware gdb to automatically load symbols and break on entry
      to a kernel module
    Allow kgdboc=kdb to setup kdb on the vga console
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Merge tag 'for_linus-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/jwessel/kgdb

Pull KGDB/KDB fixes and cleanups from Jason Wessel:
 "Cleanups
   - Clean up compile warnings in kgdboc.c and x86/kernel/kgdb.c
   - Add module event hooks for simplified debugging with gdb
 Fixes
   - Fix kdb to stop paging with 'q' on bta and dmesg
   - Fix for data that scrolls off the vga console due to line wrapping
     when using the kdb pager
 New
   - The debug core registers for kernel module events which allows a
     kernel aware gdb to automatically load symbols and break on entry
     to a kernel module
   - Allow kgdboc=kdb to setup kdb on the vga console"

* tag 'for_linus-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/jwessel/kgdb:
  tty/console: fix warnings in drivers/tty/serial/kgdboc.c
  kdb,vt_console: Fix missed data due to pager overruns
  kdb: Fix dmesg/bta scroll to quit with 'q'
  kgdboc: Accept either kbd or kdb to activate the vga + keyboard kdb shell
  kgdb,x86: fix warning about unused variable
  mips,kgdb: fix recursive page fault with CONFIG_KPROBES
  kgdb: Add module event hooks
2012-10-13 11:16:58 +09:00
Jeff Layton
91a27b2a75 vfs: define struct filename and have getname() return it
getname() is intended to copy pathname strings from userspace into a
kernel buffer. The result is just a string in kernel space. It would
however be quite helpful to be able to attach some ancillary info to
the string.

For instance, we could attach some audit-related info to reduce the
amount of audit-related processing needed. When auditing is enabled,
we could also call getname() on the string more than once and not
need to recopy it from userspace.

This patchset converts the getname()/putname() interfaces to return
a struct instead of a string. For now, the struct just tracks the
string in kernel space and the original userland pointer for it.

Later, we'll add other information to the struct as it becomes
convenient.

Signed-off-by: Jeff Layton <jlayton@redhat.com>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2012-10-12 20:14:55 -04:00
Jason Wessel
f0a996eeed mips,kgdb: fix recursive page fault with CONFIG_KPROBES
This fault was detected using the kgdb test suite on boot and it
crashes recursively due to the fact that CONFIG_KPROBES on mips adds
an extra die notifier in the page fault handler.  The crash signature
looks like this:

kgdbts:RUN bad memory access test
KGDB: re-enter exception: ALL breakpoints killed
Call Trace:
[<807b7548>] dump_stack+0x20/0x54
[<807b7548>] dump_stack+0x20/0x54

The fix for now is to have kgdb return immediately if the fault type
is DIE_PAGE_FAULT and allow the kprobe code to decide what is supposed
to happen.

Cc: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: <stable@vger.kernel.org>
Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
2012-10-12 06:37:34 -05:00
Linus Torvalds
8213a2f3ee Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/signal
Pull pile 2 of execve and kernel_thread unification work from Al Viro:
 "Stuff in there: kernel_thread/kernel_execve/sys_execve conversions for
  several more architectures plus assorted signal fixes and cleanups.

  There'll be more (in particular, real fixes for the alpha
  do_notify_resume() irq mess)..."

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/signal: (43 commits)
  alpha: don't open-code trace_report_syscall_{enter,exit}
  Uninclude linux/freezer.h
  m32r: trim masks
  avr32: trim masks
  tile: don't bother with SIGTRAP in setup_frame
  microblaze: don't bother with SIGTRAP in setup_rt_frame()
  mn10300: don't bother with SIGTRAP in setup_frame()
  frv: no need to raise SIGTRAP in setup_frame()
  x86: get rid of duplicate code in case of CONFIG_VM86
  unicore32: remove pointless test
  h8300: trim _TIF_WORK_MASK
  parisc: decide whether to go to slow path (tracesys) based on thread flags
  parisc: don't bother looping in do_signal()
  parisc: fix double restarts
  bury the rest of TIF_IRET
  sanitize tsk_is_polling()
  bury _TIF_RESTORE_SIGMASK
  unicore32: unobfuscate _TIF_WORK_MASK
  mips: NOTIFY_RESUME is not needed in TIF masks
  mips: merge the identical "return from syscall" per-ABI code
  ...

Conflicts:
	arch/arm/include/asm/thread_info.h
2012-10-12 10:49:08 +09:00
Ralf Baechle
35bafbee4b UAPI Disintegration 2012-10-09
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Merge tag 'disintegrate-mips-20121009' of git://git.infradead.org/users/dhowells/linux-headers into mips-for-linux-next

UAPI Disintegration 2012-10-09

Patchwork: https://patchwork.linux-mips.org/patch/4414/
2012-10-11 11:15:03 +02:00
Thomas Bogendoerfer
49a94e9482 MIPS: SNI: Switch RM400 serial to SCCNXP driver
The new SCCNXP driver supports the SC2681 chips used in RM400 machines.
We now use the new driver instead of the old SC26xx driver.

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/4417/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-10-11 11:14:13 +02:00
Ralf Baechle
fd9e8392c3 MIPS: Remove unused empty_bad_pmd_table[] declaration.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-10-11 11:14:12 +02:00
Ralf Baechle
2551aebc67 MIPS: MT: Remove kspd.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-10-11 11:14:12 +02:00
Ralf Baechle
2eaaac508a MIPS: Malta: Fix section mismatch.
LD      arch/mips/pci/built-in.o
WARNING: arch/mips/pci/built-in.o(.devinit.text+0x2a0): Section mismatch in reference from the function malta_piix_func0_fixup() to the variable .init.data:pci_irq
The function __devinit malta_piix_func0_fixup() references
a variable __initdata pci_irq.
If pci_irq is only used by malta_piix_func0_fixup then
annotate pci_irq with a matching annotation.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-10-11 11:14:12 +02:00
Ralf Baechle
3efd5a0db5 MIPS: asm-offset.c: Delete unused irq_cpustat_t struct offsets.
Originally added in 05b541489c48e7fbeec19a92acf8683230750d0a [Merge with
Linux 2.5.5.] over 10 years ago but never been used.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-10-11 11:11:20 +02:00