Commit Graph

10 Commits

Author SHA1 Message Date
Manivannan Sadhasivam
dee0be5c21 arm64: dts: bitmain: Source common clock for UART controllers
Remove fixed clock and source common clock for UART controllers.

Link: https://lore.kernel.org/r/20200114040311.6599-3-manivannan.sadhasivam@linaro.org
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16 15:48:11 -08:00
Manivannan Sadhasivam
e1cd7b8046 arm64: dts: bitmain: Add clock controller support for BM1880 SoC
Add clock controller support for Bitmain BM1880 SoC.

Link: https://lore.kernel.org/r/20200114040311.6599-2-manivannan.sadhasivam@linaro.org
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16 15:48:02 -08:00
Manivannan Sadhasivam
ca33f735b1
arm64: dts: bitmain: Modify pin controller memory map
Earlier, the PWM registers were included as part of the pinctrl memory
map, but this turned to be useless as the muxing is being handled by the
SoC pin controller itself. Hence, this commit removes the pwm register
mapping from the pinctrl node to make it more clean.

Fixes: af2ff87de413 ("arm64: dts: bitmain: Add pinctrl support for BM1880 SoC")
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-03 17:51:21 +05:30
Manivannan Sadhasivam
7d545e779a
arm64: dts: bitmain: Add reset controller support for BM1880 SoC
Add reset controller support for Bitmain BM1880 SoC. This commit also
adds reset support to UART peripherals.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
2019-08-03 17:50:13 +05:30
Manivannan Sadhasivam
470fa42933
arm64: dts: bitmain: Add UART pinctrl support for Sophon Edge
Add pinctrl support for UARTs exposed on the Sophon Edge board.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2019-04-29 10:47:41 +05:30
Manivannan Sadhasivam
c1294fb5cb
arm64: dts: bitmain: Add pinctrl support for BM1880 SoC
Add pinctrl support for Bitmain BM1880 SoC. This SoC only supports
pinmuxing and the pinctrl registers are part of the sctrl block.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2019-04-29 10:47:36 +05:30
Manivannan Sadhasivam
9fe408413f
arm64: dts: bitmain: Add GPIO Line names for Sophon Edge board
Add GPIO line names for Sophon Edge board based on BM1880 SoC from
Bitmain. Line names are based on the board schematics as well as the
96Boards Consumer Edition specification v1.0.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2019-04-29 10:38:40 +05:30
Manivannan Sadhasivam
367e592788
arm64: dts: bitmain: Add GPIO support for BM1880 SoC
Add GPIO support for Bitmain BM1880 SoC based on Designware APB GPIO
controller IP. IP exposes 3 GPIO controllers with a total of 72 pins.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2019-04-29 10:38:29 +05:30
Manivannan Sadhasivam
3bba4e2fdc
arm64: dts: bitmain: Add Sophon Egde board support
Add devicetree support for Sophon Edge board from Bitmain based on
BM1880 SoC. This board is one of the 96Boards Consumer and AI platform.
More information about this board can be found in 96Boards product page:

https://www.96boards.org/documentation/consumer/sophon-edge/

Only UART peripheral support is enabled for now.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2019-02-09 16:10:13 +05:30
Manivannan Sadhasivam
c8ec374338
arm64: dts: bitmain: Add BM1880 SoC support
Add devicetree support for Bitmain BM1880 SoC, consisting of a Dual
core ARM Cortex A53 subsystem, a Single core RISC-V subsystem and a Tensor
Processor subsystem. Only ARM Cortex A53 Application processor subsystem
support is enabled for now.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2019-02-09 16:10:07 +05:30