According to using PHY framework, updates the exynos5440-pcie binding. For
maintaining backward compatibility, leaves the current dt-binding. (It
should be deprecated.)
Recommends to use the PHY Framework and "config" property to follow the
designware-pcie binding. If you use the old way, can see "missing *config*
reg space" message. Because the getting configuration space address from
range is old way.
NOTE: When use the "config" property, first name of 'reg-names' must be set
to "elbi". Otherwise driver can't maintain the backward capability.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
The glue around the core designware IP is significantly different between
the Exynos and i.MX implementation, which is reflected in the DT bindings.
This changes the i.MX6 binding to reuse as much as possible from the common
designware binding and removes old cruft.
I removed the optional GPIOs with the following reasoning:
- disable-gpio: endpoint specific GPIO, not currently wired up in any code.
Should be handled by the PCI device driver, not the host controller
driver.
- wake-up-gpio: same as above.
- power-on-gpio: No user in any upstream DT. This should be handled by a
regulator which shouldn't be controlled by the host driver, but rather by
the PCI device driver.
[bhelgaas: whitespace fixes]
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
