Commit Graph

4 Commits

Author SHA1 Message Date
Thomas Petazzoni
e2a393c699 arm64: dts: marvell: use aliases for SPI busses on Armada 7K/8K
We are currently using the cell-index DT property to assign SPI bus
numbers. This property is specific to the spi-orion driver, and
requires each SPI controller to have a unique ID defined in the Device
Tree.

As we are about to merge armada-cp110-master.dtsi and
armada-cp110-slave.dtsi into a single file, those cell-index
properties that differ between the master CP110 and the slave CP110
are a difference that would have to be handled.

In order to avoid this, we switch to using the "aliases" DT node to
assign a unique number to each SPI controller. This is more generic,
and directly handled by the SPI core.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2018-01-05 17:02:40 +01:00
Miquel Raynal
7b31e3ad8b arm64: dts: marvell: add NAND support on the 8040-DB board
Add NAND support on the Armada-8040-DB by adding the same tree as for
the Armada-7040-DB by using the same compatible string
"marvell,armada-8k-nand".

Do not enable the NAND node as enabling it (and changing manually the
proper DPR-76 switch) would disable MDIO from CP1 (and thus disable CPS
Ethernet PHY).

Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-12-18 11:58:00 +01:00
Gregory CLEMENT
63dac0f492 arm64: dts: marvell: add gpio support for Armada 7K/8K
Enable gpio support for CP and AP on the Marvell Armada 7K/8K SoCs.

The Armada 8K has two CP110 blocks, each having two GPIO controllers.
However, in each CP110 block, one of the GPIO controller cannot be
used: in the master CP110, only the second GPIO controller can be used,
while on the slave CP110, only the first GPIO controller can be used.

On the other side, the Armada 7K has only one CP110, but both its GPIO
controllers can be used.

For this reason, the GPIO controllers are marked as "disabled" in the
armada-cp110-master.dtsi and armada-cp110-slave.dtsi files, and only
enabled in the per-SoC dtsi files.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-20 16:34:18 +02:00
Gregory CLEMENT
ae701b6002 arm64: dts: marvell: add pinctrl support for Armada 7K/8K
Enable pinctrl support for CP and AP on the Armada 7K/8K SoCs.

The CP master being different between Armada 7k and Armada 8k. This
commit introduces the intermediates files armada-70x0.dtsi and
armada-80x0.dtsi.

These new files will provide different compatible strings depending of
the SoC family. They will also be the location for the pinmux
configuration at the SoC level.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-20 16:33:24 +02:00