Commit Graph

8 Commits

Author SHA1 Message Date
Thomas Gleixner
9c92ab6191 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282
Based on 1 normalized pattern(s):

  this software is licensed under the terms of the gnu general public
  license version 2 as published by the free software foundation and
  may be copied distributed and modified under those terms this
  program is distributed in the hope that it will be useful but
  without any warranty without even the implied warranty of
  merchantability or fitness for a particular purpose see the gnu
  general public license for more details

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 285 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190529141900.642774971@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-05 17:36:37 +02:00
Bartlomiej Zolnierkiewicz
9bebf3485c thermal: ti-soc-thermal: remove dead code
Majority of this code (i.e. functions from ti-bandgap.c) has been
introduced in May 2013 by commit eb982001db ("thermal: introduce TI
SoC thermal driver"). Just remove it altogether (in case it is needed
it can be easily resurrected from git repo).

While at it fix incorrect "not used" comments.

Tested-by: Keerthy <j-keerthy@ti.com>
Acked-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
2018-07-27 14:43:01 -07:00
Keerthy
004f772871 thermal: ti-soc-thermal: Remove redundant constants
Now that slope and offset data are being passed from
device tree no need to populate in driver data.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
2017-03-29 22:14:51 -07:00
Keerthy
13d00b6439 thermal: arm: dra752: Remove all TSHUT related definitions
No configuration needs to be done for TSHUT from software.
Hence remove all the unnecessary definitions.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
2017-02-18 17:44:18 -08:00
Keerthy
96234d44ce thermal: arm: dra752: Remove TSHUT configuration
Technical Reference Manual [1] mandates that software should
not be configuring the thermal shutdown thresholds. Hence
removing TSHUT_CONFIG.

[1] http://www.ti.com/lit/ug/sprui30b/sprui30b.pdf

Signed-off-by: Keerthy <j-keerthy@ti.com>
Reported-by: Ravikumar Kattekola <rk@ti.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
2017-02-18 17:44:07 -08:00
Keerthy
7901063617 thermal: ti-soc-thermal: dra7: Implement Workaround for Errata i814
Bandgap Temperature read Dtemp can be corrupted

DESCRIPTION
        Read accesses to registers listed below can be corrupted due to
	incorrect resynchronization between clock domains.

        Read access to registers below can be corrupted :
                • CTRL_CORE_DTEMP_MPU/GPU/CORE/DSPEVE/IVA_n (n = 0 to 4)
        • CTRL_CORE_TEMP_SENSOR_MPU/GPU/CORE/DSPEVE/IVA_n

WORKAROUND
    Multiple reads to CTRL_CORE_TEMP_SENSOR_MPU/GPU/CORE/DSPEVE/IVA[9:0]:
    BGAP_DTEMPMPU/GPU/CORE/DSPEVE/IVA is needed to discard false value and
    read right value:
       1. Perform two successive reads to BGAP_DTEMP bit field.
               (a) If read1 returns Val1 and read2 returns Val1, then
       	right value is Val1.
               (b) If read1 returns Val1, read 2 returns Val2, a third
       	read is needed.
       2. Perform third read
               (a) If read3 returns Val2 then right value is Val2.
               (b) If read3 returns Val3, then right value is Val3.

    The above in gist means if val1 and val2 are the same then we can go
    ahead with that value else we need a third read which will be right
    since synchronization will be complete by then.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
2015-05-08 17:55:46 -07:00
Ranganath Krishnan
547f72ab7d thermal: ti-soc-thermal: Initialize counter_delay field for TI DRA752 sensors
Initialize MPU, GPU, CORE, DSPEVE and IVA thermal sensors of DRA752 bandgap
with the counter delay mask.

Signed-off-by: Ranganath Krishnan <ranganath@ti.com>
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
2013-08-29 09:36:13 -04:00
Eduardo Valentin
8926fa4f9b thermal: ti-soc-thermal: add thermal data for DRA752 chips
This patch adds the thermal data for TI DRA752 chips.
In this change it includes (autogen):
. Register offset definitions
. Bitfields and masks for all registers
. Conversion table

Also, the thermal limits, thresholds and extrapolation
rules are included. The extrapolation rule is simply
add +2C as margin.

All 5 sensors, MPU, GPU, CORE, DSPEVE and IVA, are defined
and exposed. Only MPU has cooling device.

Cc: Zhang Rui <rui.zhang@intel.com>
Cc: linux-pm@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
2013-06-13 10:15:52 +08:00