Commit Graph

78 Commits

Author SHA1 Message Date
Thomas Gleixner
2874c5fd28 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 3029 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-30 11:26:32 -07:00
Adrian Hunter
0a49a619e7 mmc: sdhci-pci: Fix BYT OCP setting
Some time ago, a fix was done for the sdhci-acpi driver, refer
commit 6e1c7d6103 ("mmc: sdhci-acpi: Reduce Baytrail eMMC/SD/SDIO
hangs"). The same issue was not expected to affect the sdhci-pci driver,
but there have been reports to the contrary, so make the same hardware
setting change.

This patch applies to v5.0+ but before that backports will be required.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: stable@vger.kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-05-06 12:33:03 +02:00
Adrian Hunter
765c59675a mmc: sdhci-pci: Add support for Intel CML
Add PCI Ids for Intel CML.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-04-15 11:55:54 +02:00
Ernest Zhang(WH)
328be8bed2 mmc: sdhci: Moving sdhci_o2 into sdhci-pci-o2micro.c
Moving sdhci_o2 into sdhci-pci-o2micro.c

Signed-off-by: Ernest Zhang <ernest.zhang@bayhubtech.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-02-25 08:40:58 +01:00
Adrian Hunter
aeae6ad35e mmc: sdhci-pci: Disable LED control for Intel BYT-based controllers
Intel BYT-based controllers do not have a LED signal line. Nevertheless
sdhci_led_control() takes more than twice as long as sdhci_send_command(),
even though it does nothing.  Use the new SDHCI_QUIRK_NO_LED quirk to
disable LED control for Intel BYT-based controllers.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-12-17 08:26:24 +01:00
Adrian Hunter
809090e8e2 mmc: sdhci-pci: Add max-frequency device property for Intel controllers
Add support for the mmc max-frequency device property for Intel BYT-based
host controllers.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-12-17 08:26:24 +01:00
Adrian Hunter
5305ec6a27 mmc: sdhci-pci: Workaround GLK firmware failing to restore the tuning value
GLK firmware can indicate that the tuning value will be restored after
runtime suspend, but not actually do that. Add a workaround that detects
such cases, and lets the driver do re-tuning instead.

Reported-by: Anisse Astier <anisse@astier.eu>
Tested-by: Anisse Astier <anisse@astier.eu>
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: stable@vger.kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-11-19 14:11:07 +01:00
Rajat Jain
cdcefe6bd9 mmc: sdhci-pci: Try "cd" for card-detect lookup before using NULL
Problem:

The card detect IRQ does not work with modern BIOS (that want
to use _DSD to provide the card detect GPIO to the driver).

Details:

The mmc core provides the mmc_gpiod_request_cd() API to let host drivers
request the gpio descriptor for the "card detect" pin.
This pin is specified in the ACPI for the SDHC device:

 * Either as a resource using _CRS. This is a method used by legacy BIOS.
   (The driver needs to tell which resource index).

 * Or as a named property ("cd-gpios"/"cd-gpio") in _DSD (which internally
   points to an entry in _CRS). This way, the driver can lookup using a
   string. This is what modern BIOS prefer to use.

This API finally results in a call to the following code:

struct gpio_desc *acpi_find_gpio(..., const char *con_id,...)
{
...
   /* Lookup gpio (using "<con_id>-gpio") in the _DSD */
...
   if (!acpi_can_fallback_to_crs(adev, con_id))
          return ERR_PTR(-ENOENT);
...
   /* Falling back to _CRS is allowed, Lookup gpio in the _CRS */
...
}

Note that this means that if the ACPI has _DSD properties, the kernel
will never use _CRS for the lookup (Because acpi_can_fallback_to_crs()
will always be false for any device hat has _DSD entries).

The SDHCI driver is thus currently broken on a modern BIOS, even if
BIOS provides both _CRS (for index based lookup) and _DSD entries (for
string based lookup). Ironically, none of these will be used for the
lookup currently because:

* Since the con_id is NULL, acpi_find_gpio() does not find a matching
  entry in DSDT. (The _DSDT entry has the property name = "cd-gpios")

* Because ACPI contains DSDT entries, thus acpi_can_fallback_to_crs()
  returns false (because device properties have been populated from
  _DSD), thus the _CRS is never used for the lookup.

Fix:

Try "cd" for lookup in the _DSD before falling back to using NULL so
as to try looking up in the _CRS.

I've tested this patch successfully with both Legacy BIOS (that
provide only _CRS method) as well as modern BIOS (that provide both
_CRS and _DSD). Also the use of "cd" appears to be fairly consistent
across other users of this API (other MMC host controller drivers).

Link: https://lkml.org/lkml/2018/9/25/1113
Signed-off-by: Rajat Jain <rajatja@google.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Fixes: f10e4bf663 ("gpio: acpi: Even more tighten up ACPI GPIO lookups")
Cc: stable@vger.kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-11-19 12:01:18 +01:00
Prabu Thangamuthu
152f8204ff mmc: sdhci-pci-dwc-mshc: synopsys dwc mshc support
Synopsys has DWC MSHC controller on HPAS-DX platform connected using PCIe
interface with SD card slot and eMMC device slots. This patch is to
enable SD cards connected on this platform. As Clock generation logic
is implemented using MMCM module of HAPS-DX platform, we have separate
functions to control the MMCM to generate required clocks with respect
to speed mode.

Signed-off-by: Prabu Thangamuthu <prabu.t@synopsys.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-16 11:21:45 +02:00
Adrian Hunter
5637ffadf6 mmc: sdhci-pci: Add support for Intel ICP
Add PCI Ids for Intel ICP.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-16 11:21:45 +02:00
Adrian Hunter
be17355a74 mmc: sdhci-pci: Fix 3.3V voltage switch for some BYT-based Intel controllers
Fix 3.3V voltage switch for some BYT-based Intel controllers by making use
of the ACPI DSM.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-05-02 15:08:47 +02:00
Kyle Roeschley
bb26b8412d mmc: sdhci-pci: Avoid 3.3V signaling on some NI 904x
On some NI 904x devices, using 3.3V signaling for extended periods of
time will physically damage the pads connected to the SDHC, eventually
causing complete failure of the controller. To work around this,
require that we avoid 3.3V signaling.

Signed-off-by: Kyle Roeschley <kyle.roeschley@ni.com>
Signed-off-by: Jennifer Dahm <jennifer.dahm@ni.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-05-02 15:08:44 +02:00
Daniel Kurtz
300ad89929 mmc: sdhci-pci: Only do AMD tuning for HS200
Commit c31165d740 ("mmc: sdhci-pci: Add support for HS200 tuning mode
on AMD, eMMC-4.5.1") added a HS200 tuning method for use with AMD SDHCI
controllers.  As described in the commit subject, this tuning is specific
for HS200.  However, as implemented, this method is used for all host
timings, because platform_execute_tuning, if it exists, is called
unconditionally by sdhci_execute_tuning().  This breaks tuning when using
the AMD controller with, for example, a DDR50 SD card.

Instead, we can implement an amd execute_tuning wrapper callback, and
then conditionally do the HS200 specific tuning for HS200, and otherwise
call back to the standard sdhci_execute_tuning().

Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
Acked-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Fixes: c31165d740 ("mmc: sdhci-pci: Add support for HS200 tuning mode on AMD, eMMC-4.5.1")
Cc: stable@vger.kernel.org # v4.11+
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-04-11 15:01:39 +02:00
Adrian Hunter
d56ee1ff30 mmc: sdhci-pci: Respect PM flags when enabling card detect GPIO IRQ wakeup
Commit 03dbaa04a2 ("mmc: slot-gpio: Add support to enable irq wake on
cd_irq") enabled wakeup at initialization. However, users also want to
control it from sysfs power/wakeup attribute. That means the driver needs
to check the PM flags before enabling it in the suspend callback. Add
support for that in sdhci-pci, which is the only driver presently using the
MMC_CAP_CD_WAKE flag, and remove the enabling in mmc_gpiod_request_cd_irq()

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-03-05 13:04:33 +01:00
Adrian Hunter
7b7d57fd1b mmc: sdhci-pci: Get rid of glk_cqe_enable()
Now that tuning no longer leaves the Buffer Read Enable bit set (refer
intel_execute_tuning()), glk_cqe_enable() is no longer needed. Get rid of
it.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-03-05 13:04:31 +01:00
Adrian Hunter
f8870ae6e2 mmc: sdhci-pci: Fix S0i3 for Intel BYT-based controllers
Tuning can leave the IP in an active state (Buffer Read Enable bit set)
which prevents the entry to low power states (i.e. S0i3). Data reset will
clear it.

Generally tuning is followed by a data transfer which will anyway sort out
the state, so it is rare that S0i3 is actually prevented.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: stable@vger.kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-02-27 10:03:48 +01:00
Adrian Hunter
e92cc35d62 mmc: sdhci-pci: Use device wakeup capability to determine MMC_PM_WAKE_SDIO_IRQ capability
PCI and ACPI determine if a device is wakeup capable, so use that to
determine the MMC_PM_WAKE_SDIO_IRQ capability correctly.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-01-17 12:30:43 +01:00
Adrian Hunter
5c3c6126b6 mmc: sdhci-pci: Stop calling sdhci_enable_irq_wakeups()
sdhci_enable_irq_wakeups() is already called by sdhci_suspend_host() so
sdhci-pci should not need to call it. However sdhci_suspend_host() only
calls it if wakeups are enabled, and sdhci-pci does not enable them until
after calling sdhci_suspend_host(). So move the calls to
sdhci_pci_init_wakeup() before calling sdhci_suspend_host(), and
stop calling sdhci_enable_irq_wakeups(). That results in some
simplification because sdhci_pci_suspend_host() and
__sdhci_pci_suspend_host() no longer need to be separate functions.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-01-17 12:30:43 +01:00
Andy Shevchenko
2a609abe71 sdhci: Advertise 2.0v supply on SDIO host controller
On Intel Edison the Broadcom Wi-Fi card, which is connected to SDIO,
requires 2.0v, while the host, according to Intel Merrifield TRM,
supports 1.8v supply only.

The card announces itself as

  mmc2: new ultra high speed DDR50 SDIO card at address 0001

Introduce a custom OCR mask for SDIO host controller on Intel Merrifield
and add a special case to sdhci_set_power_noreg() to override 2.0v supply
by enforcing 1.8v power choice.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-01-11 15:51:09 +01:00
Atul Garg
d72d72cd33 mmc:host:sdhci-pci:Addition of Arasan PCI Controller with integrated phy.
The Arasan Controller is based on a FPGA platform and has integrated phy
with specific registers used during initialization and
management of different modes. The phy and the controller are integrated
and registers are very specific to Arasan.

Arasan being an IP provider, licenses these IPs to various companies for
integration of IP in custom SOCs. The custom SOCs define own register
map depending on how bits are tied inside the SOC for phy registers,
depending on SOC memory plan and hence will require own platform drivers.

If more details on phy registers are required, an interface document is
hosted at https://arasan.com/NF/eMMC5.1 PHY Programming in Linux.pdf.

Signed-off-by: Atul Garg <agarg@arasan.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-01-04 12:46:11 +01:00
Adrian Hunter
8ee82bda23 mmc: sdhci-pci: Add CQHCI support for Intel GLK
Add CQHCI initialization and implement CQHCI operations for Intel GLK.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
2017-12-11 12:44:35 +01:00
Adrian Hunter
361eeda0ca mmc: sdhci-pci: Tidy o2micro definitions
We keep PCI Ids in sdhci-pci.h and the O2-specific definitions belong in
sdhci-pci-o2micro.c. Move those definitions accordingly. Remove unused O2
definitions in sdhci-pci-core.c. The 3 o2micro external function
declarations might as well be in sdhci-pci.h as well, so move them there
and get rid of sdhci-pci-o2micro.h entirely.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-10-30 11:50:41 +01:00
Adrian Hunter
cdaba732ff mmc: sdhci-pci: Add support for Intel CDF
Add PCI Id for Intel CDF.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-10-30 11:40:09 +01:00
Adrian Hunter
eb701ce16a mmc: sdhci-pci: Fix default d3_retune for Intel host controllers
The default for d3_retune is true, but that was not being set in all cases,
which results in eMMC errors because re-tuning has not been done.
Fix by initializing d3_retune to true.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Fixes: c959a6b00f ("mmc: sdhci-pci: Don't re-tune with runtime pm for some Intel devices")
Cc: stable@vger.kernel.org # v4.12+
Reported-and-tested-by: ojab <ojab@ojab.ru>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-10-10 08:40:04 +02:00
Adrian Hunter
6ae033689d mmc: sdhci-pci: Fix voltage switch for some Intel host controllers
Some Intel host controllers (e.g. CNP) use an ACPI device-specific method
to ensure correct voltage switching. Fix voltage switch for those, by
adding a call to the DSM.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: stable@vger.kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-09-22 11:06:45 +02:00
Michał Mirosław
adc1639863 mmc: sdhci-pci: use generic sdhci_set_bus_width()
Now that sdhci_set_bus_width() supports 8-bit bus widths based on the
MMC_CAP_8_BIT_DATA capability flag, replace the sdhci-pci version with
the generic sdhci version.

Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-08-30 15:03:35 +02:00
Andy Shevchenko
0e39220ed6 sdhci: pci: Fix up power if device has ACPI companion
Fix up a power state in case PCI device has an ACPI companion.

Do it only for Intel Merrifield for now.

This is almost copy'n'paste of part of sdhci_acpi_probe() and might be
split out to a helper function in the future.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-08-30 14:01:39 +02:00
Linus Torvalds
17ece345a0 MMC core:
- Add support to enable irq wake for slot gpio
  - Remove MMC_CAP2_HC_ERASE_SZ and make it the default behaviour
  - Improve R1 response error checks for stop commands
  - Cleanup and clarify some MMC specific code
  - Keep card runtime resumed while adding SDIO function devices
  - Use device_property_read instead of of_property_read in mmc_of_parse()
  - Move boot partition locking into a driver op to enable proper I/O scheduling
  - Move multi/single-ioctl() to use block layer to enable proper I/O scheduling
  - Delete bounce buffer Kconfig option
  - Improve the eMMC HW reset support provided via the eMMC pwrseq
  - Add host API to manage SDIO IRQs from a workqueue
 
 MMC host:
  - dw_mmc: Drop support for multiple slots
  - dw_mmc: Use device_property_read instead of of_property_read
  - dw_mmc-rockchip: Optional improved tuning to greatly decrease tuning time
  - dw_mmc: Prevent rpm suspend for SDIO IRQs instead of always for SDIO cards
  - dw_mmc: Convert to use MMC_CAP2_SDIO_IRQ_NOTHREAD for SDIO IRQs
  - omap_hsmmc: Convert to mmc regulator APIs to consolidate code
  - omap_hsmmc: Deprecate "vmmc_aux" in DT and use "vqmmc" instead
  - tmio: make sure SDIO gets reinitialized after resume
  - sdhi: add CMD23 support to R-Car Gen2 & Gen3
  - tmio: add CMD23 support
  - sdhi/tmio: Refactor code and rename files to simplify Kconfig options
  - sdhci-pci: Enable card detect wake for Intel BYT-related SD controllers
  - sdhci-pci: Add support for Intel CNP
  - sdhci-esdhc-imx: Remove ENGcm07207 workaround - allow multi block transfers
  - sdhci-esdhc-imx: Allow all supported prescaler values
  - sdhci-esdhc-imx: Fix DAT line software reset
  - sdhci-esdhc: Add SDHCI_QUIRK_32BIT_DMA_ADDR
  - atmel-mci: Drop AVR32 support
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Merge tag 'mmc-v4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc

Pull MMC updates from Ulf Hansson:
 "MMC core:
   - Add support to enable irq wake for slot gpio
   - Remove MMC_CAP2_HC_ERASE_SZ and make it the default behaviour
   - Improve R1 response error checks for stop commands
   - Cleanup and clarify some MMC specific code
   - Keep card runtime resumed while adding SDIO function devices
   - Use device_property_read instead of of_property_read in mmc_of_parse()
   - Move boot partition locking into a driver op to enable proper I/O scheduling
   - Move multi/single-ioctl() to use block layer to enable proper I/O scheduling
   - Delete bounce buffer Kconfig option
   - Improve the eMMC HW reset support provided via the eMMC pwrseq
   - Add host API to manage SDIO IRQs from a workqueue

  MMC host:
   - dw_mmc: Drop support for multiple slots
   - dw_mmc: Use device_property_read instead of of_property_read
   - dw_mmc-rockchip: Optional improved tuning to greatly decrease tuning time
   - dw_mmc: Prevent rpm suspend for SDIO IRQs instead of always for SDIO cards
   - dw_mmc: Convert to use MMC_CAP2_SDIO_IRQ_NOTHREAD for SDIO IRQs
   - omap_hsmmc: Convert to mmc regulator APIs to consolidate code
   - omap_hsmmc: Deprecate "vmmc_aux" in DT and use "vqmmc" instead
   - tmio: make sure SDIO gets reinitialized after resume
   - sdhi: add CMD23 support to R-Car Gen2 & Gen3
   - tmio: add CMD23 support
   - sdhi/tmio: Refactor code and rename files to simplify Kconfig options
   - sdhci-pci: Enable card detect wake for Intel BYT-related SD controllers
   - sdhci-pci: Add support for Intel CNP
   - sdhci-esdhc-imx: Remove ENGcm07207 workaround - allow multi block transfers
   - sdhci-esdhc-imx: Allow all supported prescaler values
   - sdhci-esdhc-imx: Fix DAT line software reset
   - sdhci-esdhc: Add SDHCI_QUIRK_32BIT_DMA_ADDR
   - atmel-mci: Drop AVR32 support"

* tag 'mmc-v4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (86 commits)
  mmc: dw_mmc: remove the unnecessary slot variable
  mmc: dw_mmc: use the 'slot' instead of 'cur_slot'
  mmc: dw_mmc: remove the 'id' arguments about functions relevant to slot
  mmc: dw_mmc: change the array of slots
  mmc: dw_mmc: remove the loop about finding slots
  mmc: dw_mmc: deprecated the "num-slots" property
  mmc: dw_mmc-rockchip: parse rockchip, desired-num-phases from DT
  dt-bindings: rockchip-dw-mshc: add optional rockchip, desired-num-phases
  mmc: renesas-sdhi: improve checkpatch cleanness
  mmc: tmio: improve checkpatch cleanness
  mmc: sdhci-pci: Enable card detect wake for Intel BYT-related SD controllers
  mmc: slot-gpio: Add support to enable irq wake on cd_irq
  mmc: core: Remove MMC_CAP2_HC_ERASE_SZ
  mmc: core: for data errors, take response of stop cmd into account
  mmc: core: check also R1 response for stop commands
  mmc: core: Clarify code for sending CSD
  mmc: core: Drop mmc_all_send_cid() and use mmc_send_cxd_native() instead
  mmc: core: Re-factor code for sending CID
  mmc: core: Remove redundant code in mmc_send_cid()
  mmc: core: Make mmc_can_reset() static
  ...
2017-07-04 11:11:56 -07:00
Adrian Hunter
6cf4156c09 mmc: sdhci-pci: Enable card detect wake for Intel BYT-related SD controllers
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-06-20 10:30:49 +02:00
Ulf Hansson
d2a47176a8 mmc: core: Remove MMC_CAP2_HC_ERASE_SZ
The MMC_CAP2_HC_ERASE_SZ is used only by a few mmc host drivers. Its intent
is to enable eMMC's high-capacity erase size, as to improve the behaviour
of the erase operations.

We should strive to avoid software configuration options that aren't
necessary, but instead deploy common behaviours. For these reasons, let's
remove the capability bit for MMC_CAP2_HC_ERASE_SZ and make it the default
behaviour.

Note that this change doesn't affect eMMCs supporting trim/discard, because
these commands operates on sectors and takes precedence over erase
commands.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
Tested-by: Shawn Lin <shawn.lin@rock-chips.com>
2017-06-20 10:30:48 +02:00
Adrian Hunter
bc55dcd822 mmc: sdhci-pci: Add support for Intel CNP
Add PCI ids and enhanced strobe support for Intel CNP. This is combined
with GLK due to the pending CMDQ support which they both share.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-06-20 10:30:38 +02:00
Matthias Kraemer
c949c90749 mmc: sdhci-pci: Use macros in pci_ids definition
This patch applies customized PCI_DEVICE_ macros to specify the pci_ids
instead of open-coding them within the sdhci-pci driver.

By introducing device specific macros the pci_ids table becomes much
shorter and easier to comprehend than it would be possible using the
generic version of the PCI_DEVICE_ macros.

Signed-off-by: Matthias Kraemer <matthiasmartinsson@gmail.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-06-20 10:30:35 +02:00
Colin Ian King
c37f69ff2e mmc: sdhci-pci: make guid intel_dsm_guid static
The guid intel_dsm_guid does not need to be in global scope, so make it
static.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Christoph Hellwig <hch@lst.de>
2017-06-20 09:05:23 +02:00
Andy Shevchenko
94116f8126 ACPI: Switch to use generic guid_t in acpi_evaluate_dsm()
acpi_evaluate_dsm() and friends take a pointer to a raw buffer of 16
bytes. Instead we convert them to use guid_t type. At the same time we
convert current users.

acpi_str_to_uuid() becomes useless after the conversion and it's safe to
get rid of it.

Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Cc: Borislav Petkov <bp@suse.de>
Acked-by: Dan Williams <dan.j.williams@intel.com>
Cc: Amir Goldstein <amir73il@gmail.com>
Reviewed-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Cc: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
Acked-by: Joerg Roedel <jroedel@suse.de>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: Yisen Zhuang <yisen.zhuang@huawei.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Acked-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Acked-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
2017-06-07 12:20:49 +02:00
Adrian Hunter
a72016a447 mmc: sdhci-pci: Allow for 3 bytes from Intel DSM
The DSM used by some Intel controllers can return a 3 byte package. Allow
for that by using memcpy to copy the bytes.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-04-24 21:42:24 +02:00
Azhar Shaikh
c2c49a2e2b mmc: sdhci-pci: Set MMC_CAP_AGGRESSIVE_PM for BYT-related Intel controllers
Set MMC_CAP_AGGRESSIVE_PM for BYT-related Intel SD card
controllers.

Signed-off-by: Azhar Shaikh <azhar.shaikh@intel.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-04-24 21:41:58 +02:00
Adrian Hunter
48d685a2ec mmc: sdhci-pci: Move a function to avoid later forward declaration
Move a function to avoid having to forward declare it in a subsequent
patch.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Tested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2017-04-24 21:41:40 +02:00
Adrian Hunter
966d696a62 mmc: sdhci-pci: Add runtime suspend/resume callbacks
Add runtime suspend/resume callbacks to match suspend/resume callbacks.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Tested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2017-04-24 21:41:39 +02:00
Adrian Hunter
30cf2803b2 mmc: sdhci-pci: Let suspend/resume callbacks replace default callbacks
The suspend / resume callbacks lack the flexibility to allow a device to
specify a different function entirely. Change them around so that device
functions are called directly and they in turn can call the default
implementations if needed.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Tested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2017-04-24 21:41:38 +02:00
Adrian Hunter
b7813f0fe9 mmc: sdhci-pci: Conditionally compile pm sleep functions
It is confusing to have some parts of suspend / resume under conditional
compilation and some parts not. Use conditional compilation everywhere.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Tested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2017-04-24 21:41:38 +02:00
Adrian Hunter
1cb0a58ec7 mmc: sdhci-pci: Do not use suspend/resume callbacks with runtime pm
Do not use suspend/resume callbacks with runtime pm. It doesn't make sense
and isn't being used, so remove.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Tested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2017-04-24 21:41:37 +02:00
Adrian Hunter
61c951dedc mmc: sdhci-pci: Let devices define how to add the host
SDHCI provides more flexibility than simply calling sdhci_add_host(). Make
that available by allowing devices to specify their own ->add_host()
function.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Tested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2017-04-24 21:41:36 +02:00
Adrian Hunter
d1e4f74f91 mmc: sdhci: Do not use spin lock in set_ios paths
The spin lock is not necessary in set_ios. Anything that is racing with
changes to the I/O state is already broken. The mmc core already provides
synchronization via "claiming" the host. So remove spin_lock and friends
from sdhci_set_ios and related callbacks.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Tested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2017-04-24 21:41:29 +02:00
Adrian Hunter
0c62e6752d mmc: sdhci: Remove ->select_drive_strength() callback
Drivers can use the host operation directly, so remove this now unused
callback.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Tested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2017-04-24 21:41:29 +02:00
Adrian Hunter
51ced59cc0 mmc: sdhci-pci: Use ACPI DSM to get driver strength for some Intel devices
Make use  of an Intel ACPI _DSM that provides eMMC driver strength.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Tested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2017-04-24 21:41:28 +02:00
Adrian Hunter
c959a6b00f mmc: sdhci-pci: Don't re-tune with runtime pm for some Intel devices
Make use  of an Intel ACPI _DSM that indicates if re-tuning is needed after
D3.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Tested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2017-04-24 21:41:28 +02:00
Adrian Hunter
ac9f67b580 mmc: sdhci-pci: Let devices define their own private data
Let devices define their own private data to facilitate device-specific
operations. The size of the private structure is specified in the
sdhci_pci_fixes structure, then sdhci_pci_probe_slot() will allocate extra
space for it, and sdhci_pci_priv() can be used to get a reference to it.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Tested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2017-04-24 21:41:27 +02:00
Adrian Hunter
d38dcad4e7 mmc: sdhci: Let drivers decide whether to use mmc_retune_needed() with pm
Devices might save and restore tuning values so that re-tuning might not be
needed after a pm transition.  Let drivers decide by pushing the
mmc_retune_needed() logic down to them.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Tested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2017-04-24 21:41:26 +02:00
Adrian Hunter
027fb89e61 mmc: sdhci-pci: Do not disable interrupts in sdhci_intel_set_power
Disabling interrupts for even a millisecond can cause problems for some
devices. That can happen when Intel host controllers wait for the present
state to propagate.

The spin lock is not necessary here. Anything that is racing with changes
to the I/O state is already broken. The mmc core already provides
synchronization via "claiming" the host.

Although the spin lock probably should be removed from the code paths that
lead to this point, such a patch would touch too much code to be suitable
for stable trees. Consequently, for this patch, just drop the spin lock
while waiting.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: stable@vger.kernel.org # v4.9+
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Tested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2017-03-23 09:24:42 +01:00
Shyam Sundar S K
c31165d740 mmc: sdhci-pci: Add support for HS200 tuning mode on AMD, eMMC-4.5.1
This patch adds support for HS200 tuning mode on AMD eMMC-4.5.1

Reviewed-by: Sen, Pankaj <Pankaj.Sen@amd.com>
Reviewed-by: Shah, Nehal-bakulchandra <Nehal-bakulchandra.Shah@amd.com>
Reviewed-by: Agrawal, Nitesh-kumar <Nitesh-kumar.Agrawal@amd.com>
Signed-off-by: S-k, Shyam-sundar <Shyam-sundar.S-k@amd.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-02-13 13:20:14 +01:00