Commit Graph

1044 Commits

Author SHA1 Message Date
Arnd Bergmann
704b1005d1 Renesas ARM based SoC cleanups for v3.11
__initdata annotations for the r8a7790 SoC by Morimoto-san.
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Merge tag 'renesas-cleanup-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/late

From Simon Horman:

Renesas ARM based SoC cleanups for v3.11

__initdata annotations for the r8a7790 SoC by Morimoto-san.

* tag 'renesas-cleanup-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (158 commits)
  ARM: shmobile: r8a7790: add __initdata on resource and device data

Based on 'renesas-pinmux-for-v3.11' and 'renesas-soc-for-v3.11

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-21 14:54:09 +02:00
Arnd Bergmann
86727c62c8 based on s3c24xx-pinctrl
- use correct header for chained_irq functions for s3c24xx-pinctrl
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Merge tag 's3c24xx-pinctrl-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/drivers

From Kukjin Kim:

based on s3c24xx-pinctrl
- use correct header for chained_irq functions for s3c24xx-pinctrl

* tag 's3c24xx-pinctrl-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  pinctrl: s3c24xx: use correct header for chained_irq functions

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-20 22:29:08 +02:00
Arnd Bergmann
402bf90df5 arch/arm/mach-exynos update
- enable XHCI on exynos5
 - enable Pinctrl on exynos4 and exynos5
 - calling scu_enable() is only available on Cortex-A9
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Merge tag 'exynos-arch-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc

From Kukjin Kim:

arch/arm/mach-exynos update
- enable XHCI on exynos5
- enable Pinctrl on exynos4 and exynos5
- calling scu_enable() is only available on Cortex-A9

* tag 'exynos-arch-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: EXYNOS: call scu_enable() only in case of cortex-A9 processor
  ARM: EXYNOS: Select PINCTRL_EXYNOS for exynos4/5 at chip level
  ARM: EXYNOS: Enable XHCI support on exynos5

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-20 21:50:51 +02:00
Arnd Bergmann
15f4b11b0f Nomadik DT and clock work:
- Lee Jones' pinctrl compat ontology patches
 - A real clock driver for the Nomadik, 100% DT-based
 - Device tree changes for the Nomadik clocks
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Merge tag 'nomadik-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt

From Linus Walleij:

Nomadik DT and clock work:
- Lee Jones' pinctrl compat ontology patches
- A real clock driver for the Nomadik, 100% DT-based
- Device tree changes for the Nomadik clocks

* tag 'nomadik-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
  ARM: nomadik: add the new clocks to the device tree
  clk: nomadik: implement the Nomadik clocks properly
  pinctrl/nomadik: Standardise Pinctrl compat string for Nomadik based platforms
  ARM: nomadik: Standardise Nomadik STN8815 based Pinctrl compat string in the DTS

Conflicts:
	arch/arm/boot/dts/ste-nomadik-s8815.dts

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-20 16:13:10 +02:00
Arnd Bergmann
c3b693d1d6 Device Tree and Multiplatform support for U300:
- Add devicetree support to timer, pinctrl (probe), I2C block,
   watchdog, DMA controller and clocks.
 - Piecewise add a device tree containing all peripherals.
 - Delete the ATAG boot path.
 - Delete redundant platform data and board files.
 - Convert to multiplatform.
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Merge tag 'u300-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/soc

From Linus Walleij:

Device Tree and Multiplatform support for U300:
- Add devicetree support to timer, pinctrl (probe), I2C block,
  watchdog, DMA controller and clocks.
- Piecewise add a device tree containing all peripherals.
- Delete the ATAG boot path.
- Delete redundant platform data and board files.
- Convert to multiplatform.

* tag 'u300-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: (40 commits)
  ARM: u300: switch to using syscon regmap for board
  ARM: u300: Update MMC configs for u300 defconfig
  spi: pl022: use DMA by default when probing from DT
  pinctrl: get rid of all platform data for coh901
  ARM: u300: convert MMC/SD clock to device tree
  ARM: u300: move the gated system controller clocks to DT
  i2c: stu300: do not request a specific clock name
  clk: move the U300 fixed and fixed-factor to DT
  ARM: u300: remove register definition file
  ARM: u300: add syscon node
  ARM: u300 use module_spi_driver to register driver
  ARM: u300: delete remnant machine headers
  ARM: u300: convert to multiplatform
  ARM: u300: localize <mach/u300-regs.h>
  ARM: u300: delete <mach/irqs.h>
  ARM: u300: delete <mach/hardware.h>
  ARM: u300: push down syscon registers
  ARM: u300: remove deps from debug macro
  ARM: u300: move debugmacro to debug includes
  ARM: u300: delete all static board data
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-20 01:51:18 +02:00
Leela Krishna Amudala
983dbeb35f pinctrl: exynos: add exynos5420 SoC specific data
Add Samsung EXYNOS5420 SoC specific data to enable pinctrl
support for all platforms based on EXYNOS5420.

Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by : Sunil Joshi <joshi@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-06-19 22:19:08 +09:00
Doug Anderson
83978253d0 ARM: EXYNOS: Select PINCTRL_EXYNOS for exynos4/5 at chip level
Previously if you had MACH_EXYNOS5_DT but not MACH_EXYNOS4_DT you'd be
missing the pincontrol definitions.  Move PINCTRL selects to the arch
level since we should be enabling the code for all exynos variants.

Update the PINCTRL descriptions to indicate that PINCTRL_EXYNOS is not
for exynos5440.  Also add basic dependencies for the PINCTRL_EXYNOS
kernel config.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-06-19 03:41:37 +09:00
Heiko Stuebner
c2c70a7905 pinctrl: s3c24xx: use correct header for chained_irq functions
chained_irq_enter and chained_irq_exit moved to a real header
under linux/pinctrl instead of asm/.

Update the pinctrl driver to use the correct header and fix the
build error.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org>`
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-06-19 02:41:20 +09:00
Mathias Nyman
a5d811bbf1 pinctrl: add Intel BayTrail GPIO/pinctrl support
Add support for gpio on Intel BayTrail platforms. BayTrail supports 3 banks
of gpios called SCORE, NCORE ans SUS with 102, 28 and 44 gpio pins.
Supports gpio interrupts and ACPI gpio events

Pins may be muxed to alternate function instead of gpio by firmware.
This driver does not touch the pin muxing and expect firmare
to set pin muxing and pullup/down properties properly.

Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-18 17:23:40 +02:00
Sachin Kamat
843aec9653 pinctrl: Staticize local symbols
Symbols referenced only in this file are made static.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Cc: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-18 16:54:45 +02:00
Sachin Kamat
a59f0e2181 pinctrl: spear/plgpio: Staticize spear310_o2p
'spear310_o2p' is referenced only in this file.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-18 16:52:37 +02:00
Sachin Kamat
2230a36e31 pinctrl: nomadik: Staticize local symbols
Some symbols referenced only in this file are made static.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-18 16:51:37 +02:00
Sachin Kamat
e8ed912e6e pinctrl: bcm2835: Staticize bcm2835_gpio_pins
'bcm2835_gpio_pins' is used only in this file.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-18 16:50:27 +02:00
Laurent Pinchart
12f3ad8df7 sh-pfc: Add pinconf support to DT bindings
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-18 10:57:59 +02:00
Laurent Pinchart
fe1c9a822c sh-pfc: Add DT support
Support device instantiation through the device tree. The compatible
property is used to select the SoC pinmux information.

Set the gpio_chip device field to the PFC device to enable automatic
GPIO OF support.

Cc: devicetree-discuss@lists.ozlabs.org
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-18 10:57:51 +02:00
Laurent Pinchart
3a7f520e63 sh-pfc: Remove support for platform data
Platform data isn't used, support can thus be removed.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-18 10:57:27 +02:00
Wei Yongjun
c8f50e8657 pinctrl: core: fix missing unlock on error in pinctrl_find_gpio_range_from_pin()
Add the missing unlock before return from function pinctrl_find_gpio_range_from_pin()
in the error handling case.

Introduced by commit 2ff3477efd7086544b9e298fc63afab0645921b4.
(pinctrl: add pin list based GPIO ranges)

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-18 09:41:15 +02:00
Kuninori Morimoto
cd622017eb sh-pfc: r8a7778: tidyup MMC_D1 pin
MMC_D1 is RCAR_GP_PIN(1, 8), not RCAR_GP_PIN(2, 8)

Reported-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-18 16:13:28 +09:00
Doug Anderson
5a68e7a748 pinctrl: exynos: ack level-triggered interrupts before unmasking
A level-triggered interrupt should be acked after the interrupt line
becomes inactive and before it is unmasked, or else another interrupt
will be immediately triggered.  Acking before or after calling the
handler is not enough.

Signed-off-by: Luigi Semenzato <semenzato@chromium.org>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-17 18:58:16 +02:00
Arnd Bergmann
f472deadd5 pinctrl: export pinctrl_pm_select_*_state
The three functions pinctrl_pm_select_default_state,
pinctrl_pm_select_sleep_state, and pinctrl_pm_select_idle_state
are used in drivers that can be loadable modules, and should
be exported.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-17 18:29:32 +02:00
Heiko Stübner
44b6d93043 pinctrl: rockchip: correctly handle arguments of pinconf options
Change the rockchip pinctrl driver to handle the arguments to the pull
pinconfig options correctly. So only accept non-0 values for the
pull options as the rockchip pin-controller can only turn pulls on and
off (this via BIAS_DISABLE).

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-17 18:18:34 +02:00
Hebbar Gururaja
0f9bc4bcdf pinctrl: single: adopt pinctrl sleep mode management
Make pinctrl-single able to handle suspend/resume events and change
hogged pins states accordingly.

Signed-off-by: Hebbar Gururaja <gururaja.hebbar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-17 18:18:34 +02:00
Maxime Ripard
ac68936652 pinctrl: sunxi: Add Allwinner A10s pins
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-17 18:18:33 +02:00
Maxime Ripard
44abb933f7 pinctrl: sunxi: Move the pins definitions to a separate header
It will allow us to have a cleaner separation between the data needed by
the driver to work, and the core logic of the driver in itself, and will
allow having too much noise in the core driver in the future.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-17 18:18:32 +02:00
Heiko Stübner
6abab2d4be pinctrl: dynamically alloc temp array when parsing dt pinconf options
Allocating the temorary array in pinconf_generic_parse_dt_config on stack
might cause problems later on, when the number of options grows over time.
Therefore also allocate this array dynamically to be on the safe side.

Suggested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-17 18:18:31 +02:00
Heiko Stübner
e4a8844c04 pinctrl: handle zero found dt pinconfig properties better
This adds a shortcut when no valid pinconf properties are found
in the parsed dt node, to set the values immediately and return.

Suggested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-17 18:18:31 +02:00
Heiko Stübner
9ee1f7d266 pinctrl: clarify some dt pinconfig options
The bias-pull-* options use values > 0 to indicate that the pull should
be activated and optionally also indicate the strength of the pull.
Therefore use an default value of 1 for these options.

Split the low-power-mode option into low-power-enable and -disable.

Update the documentation to describe the param arguments better.

Reported-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-17 18:18:30 +02:00
Christian Ruppert
c8587eeef8 pinctrl: add pin list based GPIO ranges
Traditionally, GPIO ranges are based on consecutive ranges of both GPIO
and pin numbers. This patch allows for GPIO ranges with arbitrary lists
of pin numbers.

Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-17 18:18:28 +02:00
Linus Walleij
b263e9b887 pinctrl: get rid of all platform data for coh901
This deletes the dependency on any platform data for
the COH901 pin controller. There is only one user in the
kernel, and if we at some point want to support more
variants, they shall provide their variant info through
the device tree.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-17 13:54:38 +02:00
Guennadi Liakhovetski
0a6ea54ff0 pinctrl: r8a7790: fix two pin numbers
Fix two erroneous MMCIF1 pin numbers on r8a7790.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-17 11:20:52 +09:00
Doug Anderson
5ace03fb6a pinctrl: exynos: reorder xyz_irq_unmask() so future patch can ack
This patch does nothing but reorder the functions to improve the
readability of a future patch.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 12:01:55 +02:00
Doug Anderson
5ae8cf7980 pinctrl: exynos: Add spinlocks to irq_mask and irq_unmask
The patch:
  1984695 pinctrl: samsung: Protect bank registers with a spinlock

...added spinlocks to protect many accesses.  However, the irq_mask
and irq_unmask functions still do an unprotected read/modify/write.
Add the spinlock there.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 12:01:54 +02:00
Patrice Chotard
ce06f40740 pinctrl: abx500: fix build warning
pinctrl-abx500.c: In function 'abx500_gpio_dbg_show_one':
pinctrl-abx500.c:534:14: warning: 'pud' may be used
uninitialized in this function [-Wuninitialized]

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:57:33 +02:00
Heiko Stübner
d3e5116119 pinctrl: add pinctrl driver for Rockchip SoCs
This driver adds support the Cortex-A9 based SoCs from Rockchip,
so at least the RK2928, RK3066 (a and b) and RK3188.
Earlier Rockchip SoCs seem to use similar mechanics for gpio
handling so should be supportable with relative small changes.
Pull handling on the rk3188 is currently a stub, due to it being
a bit different to the earlier SoCs.

Pinmuxing as well as gpio (and interrupt-) handling tested on
a rk3066a based machine.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:57:32 +02:00
Heiko Stübner
7db9af4b6e pinctrl: add function to parse generic pinconfig properties from a dt node
pinconf_generic_parse_dt_config() takes a node as input and generates an
array of generic pinconfig values from the properties of this node.

As I couldn't find a mechanism to count the number of properties of a node
the function uses internally an array to accept one of parameter and copies
the real present options to a smaller variable at its end.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:57:32 +02:00
Maxime Ripard
7f884b6483 pinctrl: sunxi: Add external interrupt functions
The A10 and A13 has a few pins that can be muxed into a particular
function that can be used as an interrupt source. Add the available
pins for such functions to the A10 and A13 description array.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:57:32 +02:00
Maxime Ripard
60242db1a7 pinctrl: sunxi: Add external interrupts support
The port controller IP found in the Allwinner A10 and A13 can use few of
the pins it manage as an interrupt source, called external interrupts in
the datasheet.

The number of these external interrupts are SoCs specific, but the
current upper limit is 32. In order to work, the external interrupts'
pins have to be muxed to a specific function to generate an interrupt.

This patch adds the irqchip and the needed logic to use the PIO
controller as an interrupt controller.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:57:31 +02:00
Maxime Ripard
814d4f2e15 pinctrl: sunxi: Search the description array by pin id
Avoid to use expensive string manipulation functions and search by pin
id when possible.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:53 +02:00
Thomas Abraham
79bae27ff9 pinctrl: exynos5440: fix issues reported by prevent tool
This patch fixes issues reported by prevent tool.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
[Drop hunk already in-tree from a patch by Wei Yongjun]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:52 +02:00
Manjunathappa, Prakash
6f924b0b7c pinctrl: pinctrl-single: pin names for pinctrl-single.bits
Take care to name pin names as
register-offset.bit-pos-of-pin-in-register in case configuring multiple
pins in register.

Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:52 +02:00
Manjunathappa, Prakash
4e7e8017a8 pinctrl: pinctrl-single: enhance to configure multiple pins of different modules
Add support to configure multiple pins in each register, existing
implementation added by [1] does not support full fledge multiple pin
configuration in single register, reports a pin clash when different
modules configure different bits of same register. The issue reported
and discussed here
http://www.spinics.net/lists/arm-kernel/msg235213.html

With pinctrl-single,bits-per-mux property specified, use function-mask
property to find out number pins to configure. Allocate and register
pin control functions based sub mask.

Tested on da850/omap-l138 EVM.
does not support variable submask for pins.
does not support pinconf.

[1] "pinctrl: pinctrl-single: Add pinctrl-single,bits type of mux"
(9e605cb68a),

Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
Reported-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Tested-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:52 +02:00
Linus Walleij
14005ee270 drivers: pinctrl sleep and idle states in the core
If a device have sleep and idle states in addition to the
default state, look up these in the core and stash them in
the pinctrl state container.

Add accessor functions for pinctrl consumers to put the pins
into "default", "sleep" and "idle" states passing nothing but
the struct device * affected.

Solution suggested by Kevin Hilman, Mark Brown and Dmitry
Torokhov in response to a patch series from Hebbar
Gururaja.

Cc: Hebbar Gururaja <gururaja.hebbar@ti.com>
Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Wolfram Sang <wsa@the-dreams.de>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:52 +02:00
Heiko Stübner
7970cb770d pinctrl: add pinconf-generic define for a pin-default pull
There exist controllers that don't support to set the pull to up or down
separately but instead automatically set the pull direction based on
embedded knowledge inside the controller, for example depending on the
selected mux function of the pin.

Therefore this patch adds another config option to use this default
pull-state for a pin where it is not possible to know or decide if the
pin will be pulled up or down.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:51 +02:00
Jingchang Lu
78bafc6618 pinctrl: add VF610 pinctrl driver
Adds Freescale Vybrid VF610 pin controller
driver to IMX common pinctrl driver framework.

Signed-off-by: Jingchang Lu <b35083@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:51 +02:00
Jingchang Lu
bf5a530971 pinctrl: imx: add VF610 support to imx pinctrl framework
On some platforms such as VF610, offset of mux and pad ctrl register
may be zero, and the mux_mode and config_val are in one 32-bit register.
This patch adds support to imx core pinctrl framework to handle these
cases.

Signed-off-by: Jingchang Lu <b35083@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:51 +02:00
Patrice Chotard
d2752ae54d pinctrl: abx500: fix abx500_gpio_dbg_show_one() to show pull up/down
- rework abx500_gpio_dbg_show_one() to take in account pull up/down
  feature available on AB8540 only.
- add abx500_get_pull_updown() needed by abx500_gpio_dbg_show_one()
- rename abx500_config_pull_updown() to abx500_set_pull_updown()

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:51 +02:00
Patrice Chotard
9ed3cd3338 pinctrl: abx500: allow to set pull up
On ABx500 chip family, all pins support only pull down except for
AB8540 which supports pull up/down on some pins.
Rework abx500_pin_config_set to be able to set pull up on
pins which support this feature.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:51 +02:00
Patrice Chotard
10a8be5414 pinctrl: abx500: fix abx500_config_pull_updown
Fix abx500_config_pull_updown() to set correct bit in
AB8540_GPIO_PULL_UPDOWN_REG.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:50 +02:00
James Hogan
a2df4269ca pinconf-generic: add BIAS_BUS_HOLD pinconf
Add a new PIN_CONFIG_BIAS_BUS_HOLD pin configuration for a bus holder
pin mode (also known as bus keeper, or repeater). This is a weak latch
which drives the last value on a tristate bus. Another device on the bus
can drive the bus high or low before going tristate to change the value
driven by the pin.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:50 +02:00
James Hogan
73ae368cd3 pinconf-generic: add drive strength to debugfs output
Add the drive strength pinconf to debugfs output (with the unit "mA").

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:50 +02:00
Patrice Chotard
b0bb6426e4 pinctrl: abx500: suppress unused mutex
Suppress a mutex which was initialized on probe
and destroyed on remove but never used.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:50 +02:00
Barry Song
bc8d25a405 pinctrl: sirf: save the status in suspend and restore after resuming
this patch saves the status of pinctrl registers and restore them while
resuming. this makes all drivers have coherent status for pinmux after
suspending and resuming.

Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:50 +02:00
Linus Walleij
44d5f7bbea pinctrl: sink pinctrldev_list_mutex
The pinctrldev_list_mutex is sinked into the functions that
actually traverse the list and lock it there. The code makes
much more sense in this way. All the callers are in
non-performance critical paths and the code is way more
readable this way.

Also refactor the function get_pinctrl_dev_from_devname() to
follow the design pattern of get_pinctrl_dev_from_of_node()
which is slightly simpler.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:50 +02:00
Barry Song
3370dc916c pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
   the related dt compatible node, so the pinctrl-sirf can support
   all SiRF SoCs with the config data as private data.

In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
        drivers/pinctrl/sirf/pinctrl-prima2.c +
        drivers/pinctrl/sirf/pinctrl-sirf.c

drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.

Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:49 +02:00
Laurent Navet
76cda6ec39 drivers: pinctrl: vt8500: use devm_ioremap_resource()
Replace a call to deprecated devm_request_and_ioremap by devm_ioremap_resource.

Found with coccicheck and this semantic patch:
 scripts/coccinelle/api/devm_ioremap_resource.cocci

Signed-off-by: Laurent Navet <laurent.navet@gmail.com>
Acked-by: Tony Prisk <linux@prisktech.co.nz>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:49 +02:00
Sebastian Hesselbarth
bbd7b275db pinctrl: dove: add PMU functions to pinctrl
Dove power management unit can mux some special functions to mpp0-15.
This patch adds support to set/get the current PMU function mapped
to the corresponding mpp pins. The device tree documentation is also
updated accordingly.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:49 +02:00
Wolfram Sang
8ec136d0f3 drivers/pinctrl/spear: don't check resource with devm_ioremap_resource
devm_ioremap_resource does sanity checks on the given resource. No need to
duplicate this in the driver.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:49 +02:00
Shawn Guo
4fdf774fc9 pinctrl: enable build of pinctrl-imx6sl driver
The pinctrl-imx6sl is in place.  Enable the build of it.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:49 +02:00
Wolfram Sang
f50b9e12db drivers/pinctrl: don't check resource with devm_ioremap_resource
devm_ioremap_resource does sanity checks on the given resource. No need to
duplicate this in the driver.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:49 +02:00
Jingoo Han
dbf850c687 pinctrl: u300: remove unnecessary platform_set_drvdata()
The driver core clears the driver data to NULL after device_release
or on probe failure, since commit 0998d06310
(device-core: Ensure drvdata = NULL when no driver is bound).
Thus, it is not needed to manually clear the device driver data to NULL.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:48 +02:00
Jingoo Han
3e6eeafc9c pinctrl: sirf: remove unnecessary platform_set_drvdata()
The driver core clears the driver data to NULL after device_release
or on probe failure, since commit 0998d06310
(device-core: Ensure drvdata = NULL when no driver is bound).
Thus, it is not needed to manually clear the device driver data to NULL.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:48 +02:00
Jingoo Han
59eb14dcc6 pinctrl: mxs: remove unnecessary platform_set_drvdata()
The driver core clears the driver data to NULL after device_release
or on probe failure, since commit 0998d06310
(device-core: Ensure drvdata = NULL when no driver is bound).
Thus, it is not needed to manually clear the device driver data to NULL.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:48 +02:00
Jingoo Han
c87feeeb1e pinctrl: coh901: remove unnecessary platform_set_drvdata()
The driver core clears the driver data to NULL after device_release
or on probe failure, since commit 0998d06310
(device-core: Ensure drvdata = NULL when no driver is bound).
Thus, it is not needed to manually clear the device driver data to NULL.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:48 +02:00
Olof Johansson
38d77ff90a Renesas ARM based SoC GPIO R-Car updates for v3.11
DT support to GPIO R-Car driver by Laurent Pinchart.
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Merge tag 'renesas-gpio-rcar-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers

From Simon Horman:
Renesas ARM based SoC GPIO R-Car updates for v3.11

DT support to GPIO R-Car driver by Laurent Pinchart.

* tag 'renesas-gpio-rcar-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (131 commits)
  gpio-rcar: Add DT support
2013-06-14 17:45:39 -07:00
Olof Johansson
9440bd2342 Device tree patches for ux500, basically trees and auxdata:
- Fix for the thermal node to be contained in the PRCMU node
 - Add the DTS and auxdata needed to boot the U8540 platform
 - Various regulators added and renamed
 - Rename base SoC node
 - A bunch of DMA patches adding channels for DT boots
 - A bunch of crypto+hash patches adding config for DT boots
 - A bunch of patches fixing the ALSA SoC support to work
 - Register the LP5521 LEDs
 - Fix a number of typos and naming errors
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Merge tag 'ux500-dt-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/dt

From Linus Walleij:
Device tree patches for ux500, basically trees and auxdata:
- Fix for the thermal node to be contained in the PRCMU node
- Add the DTS and auxdata needed to boot the U8540 platform
- Various regulators added and renamed
- Rename base SoC node
- A bunch of DMA patches adding channels for DT boots
- A bunch of crypto+hash patches adding config for DT boots
- A bunch of patches fixing the ALSA SoC support to work
- Register the LP5521 LEDs
- Fix a number of typos and naming errors

* tag 'ux500-dt-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: (39 commits)
  ARM: ux500: drop any 0x prefix from I2C DT devices
  ARM: ux500: Allocate correct amount of memory for the u8540 in DT
  ARM: ux500: Provide auxdata to ux500 ASoC driver
  ARM: ux500: Add DT regulators for ab8500-codec
  ARM: ux500: Correct anamic2 typo in DT files
  ARM: ux500: Fix trivial typo in v-anamic1 comment
  ARM: ux500: Reduce PRCMU reg-names to shorter form for u8540 DT
  ARM: ux500: Add an auxdata entry for MUSB for clock-name look-up
  ARM: ux500: cut chip-select GPIOs from SSP device
  ARM: ux500: use symbolic names for interrupt flags
  ARM: ux500: use #include syntax to include *.dtsi.
  ARM: ux500: bump MMC/SD max frequency for DT boots
  ARM: ux500: Apply other compatible name to the u8540 DTS file
  pinctrl/nomadik: Standardise Pinctrl compat string for DBx5x based platforms
  ARM: ux500: Standardise Pinctrl compatible string for DBx5x based platforms
  ARM: ux500: Standardise DBx5x0 based Pinctrl compat string in the DTS
  crypto: ux500/hash - Enable DT probing of the driver
  crypto: ux500/cryp - Enable DT probing of the driver
  ARM: ux500: enable the crypto and hash on all dbx500
  ARM: ux500: Provide an AUXDATA entry for ux500-hash
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-14 16:54:27 -07:00
Ulrich Hecht
fbd0ca3de1 sh-pfc: r8a7790: add HSCIF pin groups
Adds HSCIF data/clk/ctrl groups to R8A7790 PFC driver.

Signed-off-by: Ulrich Hecht <ulrich.hecht@gmail.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-12 17:40:26 +09:00
Guennadi Liakhovetski
6e8d1d41bb pinctrl: r8a73a4: add pinmux data for MMCIF and SDHI interfaces
This patch adds pinmux groups and functions for the two MMCIF and three
SDHI interfaces on r8a73a4 (APE6).

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-12 17:39:34 +09:00
Olof Johansson
ea36b02269 Merge branch 'clps711x/soc' into next/soc
From Alexander Shiyan, this is a series of cleanups of clps711x, movig it
closer to multiplatform and cleans up a bunch of old code.

* clps711x/soc:
  ARM: clps711x: Update defconfig
  ARM: clps711x: Add support for SYSCON driver
  ARM: clps711x: edb7211: Control LCD backlight via PWM
  ARM: clps711x: edb7211: Add support for I2C
  ARM: clps711x: Optimize interrupt handling
  ARM: clps711x: Add clocksource framework
  ARM: clps711x: Replace "arch_initcall" in common code with ".init_early"
  ARM: clps711x: Move specific definitions from hardware.h to boards files
  ARM: clps711x: p720t: Define PLD registers as GPIOs
  ARM: clps711x: autcpu12: Move remaining specific definitions to board file
  ARM: clps711x: autcpu12: Special driver for handling memory is removed
  ARM: clps711x: autcpu12: Add support for NOR flash
  ARM: clps711x: autcpu12: Move LCD DPOT definitions to board file
  ARM: clps711x: Set PLL clock to zero if we work from 13 mHz source
  ARM: clps711x: Remove NEED_MACH_MEMORY_H dependency
  ARM: clps711x: Re-add GPIO support
  GPIO: clps711x: Add DT support
  GPIO: clps711x: Rewrite driver for using generic GPIO code
  + Linux 3.10-rc4

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-11 15:57:51 -07:00
Kukjin Kim
0e81a3529e Merge branch 'v3.11-next/driver-pinctrl' into v3.11-next/s3c24xx-driver 2013-06-12 05:24:16 +09:00
Olof Johansson
fb565ff7c8 Renesas ARM based SoC fixes for v3.10
* Correction to USB OVC and PENC pin groupings on r8a7779 SoC.
   This avoids conflicts when the USB_OVCn pins are used by another function.
   This has been observed to be a problem in v3.10-rc1.
 
 * Update CMT clock rating for sh73a0 SoC to resolve boot failure
   on kzm9g-reference. This resolves a regression between v3.9 and v3.10-rc1.
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Merge tag 'renesas-fixes-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes

From Simon Horman, Renesas ARM based SoC fixes for v3.10:
- Correction to USB OVC and PENC pin groupings on r8a7779 SoC.
  This avoids conflicts when the USB_OVCn pins are used by another function.
  This has been observed to be a problem in v3.10-rc1.
- Update CMT clock rating for sh73a0 SoC to resolve boot failure
  on kzm9g-reference. This resolves a regression between v3.9 and v3.10-rc1.

* tag 'renesas-fixes-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: sh73a0: Update CMT clockevent rating to 80
  sh-pfc: r8a7779: Don't group USB OVC and PENC pins

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-07 18:11:02 -07:00
Phil Edworthy
b9ffcc2b12 pinctrl: sh-pfc: r8a7779: Fix missing MOD_SEL2 entry
The list of functions selected by the MOD_SEL2 register was missing
an entry. This caused all entries after this to modify the MOD_SEL2
register incorrectly.

This bug showed up when selecting i2c2_c pins on the Renesas Hurricane board.

This bug has been present since pinmux support was added for the
r8a7779 SoC by 881023d28b ("sh-pfc: Add
r8a7779 pinmux support") in v3.8-rc4.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:18:21 +09:00
Guennadi Liakhovetski
066f0d6eb7 pinctrl: r8a7790: add pinmux data for MMCIF and SDHI interfaces
This patch adds pinmux groups and functions for the two MMCIF and four
SDHI interfaces on r8a73a4 (APE6).

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:18:20 +09:00
Kuninori Morimoto
3ef2a776d1 sh-pfc: r8a7778: add MMCIF pin groups
Add MMCIF CLK/CMD/DATA groups to R8A7778 PFC driver.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:18:20 +09:00
Kuninori Morimoto
09cc76a958 sh-pfc: r8a7778: add HSPI pin groups
Add HSPI CLK/CS/RX/TX pin groups to R8A7778 PFC driver.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:18:19 +09:00
Kuninori Morimoto
0dcbc69e2b sh-pfc: r8a7778: add I2C pin groups
Add I2C SDA/SCL pin groups to R8A7778 PFC driver.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:18:19 +09:00
Guennadi Liakhovetski
7f35184b3d pinctrl: sh-pfc: fix a typo in pfc-r8a7790
Fix multiple occurrences of the "RESEVED" typo.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:18:13 +09:00
Guennadi Liakhovetski
17babad61d pinctrl: sh-pfc: fix r8a7790 Function Select register tables
Fix several errors in Peripheral Function Select register tables for
r8a7790, which prevent various function pins from being correctly
configured.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:17:20 +09:00
Kuninori Morimoto
d64d00504a sh-pfc: r8a7778: fixup IRQ1A settings
IP2[31] func2 is IRQ1A, not IRQ3A

Reported-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:17:20 +09:00
Sergei Shtylyov
eca4e3b3cc sh-pfc: r8a7779: add Ether pin groups
Add Ether RMII/LINK/MAGIC pin groups to R8A7779 PFC driver.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Laurent Pinchart<laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:17:19 +09:00
Sergei Shtylyov
3c5886d145 sh-pfc: r8a7778: add Ether pin groups
Add Ether RMII/LINK/MAGIC pin groups to R8A7778 PFC driver.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Laurent Pinchart<laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:17:19 +09:00
Vladimir Barinov
2d7cd39870 sh-pfc: r8a7778: add VIN pin groups
Add VIN DATA[0:8]/CLK/HSYNC/VSYNC pin groups to R8A7778 PFC driver.
While at it, add SH_PFC_MUX8() macro for 8-bit data busses.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
[Sergei: updated the copyrights, added SH_PFC_MUX8() macro for 8-bit data bus,
made use of SH_PFC_*() macros to define the pin groups.]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:17:19 +09:00
Laurent Pinchart
a27c5cd1a0 sh-pfc: sh73a0: Remove function GPIOs
No sh73a0 platform use the function GPIOs API. Remove it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:17:18 +09:00
Laurent Pinchart
682e05a14f sh-pfc: r8a7790: Add TPU pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:17:18 +09:00
Laurent Pinchart
c2ad27e63d sh-pfc: r8a7740: Add TPU pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:17:17 +09:00
Laurent Pinchart
5da4eb049d sh-pfc: sh73a0: Add TPU pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:17:17 +09:00
Sergei Shtylyov
5cee53b6fc sh-pfc: r8a7778: add USB pin groups
Add USB0/1 PENC/USB_OVC pin groups to R8A7778 PFC driver.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:17:16 +09:00
Laurent Pinchart
ea770ad2ec sh-pfc: sh73a0: Add VCCQ MC0 regulator
The sh73a0 has an internal power gate on the VCCQ power supply for the
SDHI0 device that is controlled (for some strange reason) by a bit in a
PFC register. This feature should be exposed as a regulator.

As the same register is also used for pin control purposes there is no
way to achieve atomic read/write sequences with a separate regulator
driver. We thus need to implement the regulator here.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:17:14 +09:00
Laurent Pinchart
0c151062f3 sh-pfc: Add support for SoC-specific initialization
Add two optional init and exit SoC operations and call them from the
core at probe and remove time.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:17:13 +09:00
Kuninori Morimoto
0290df2d24 sh-pfc: r8a7778: tidyup SDHI naming suffixes and sort it alphabetically
SDHI 1/2 are the target

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:17:11 +09:00
Laurent Pinchart
0eef12d732 sh-pfc: r8a7778: Fix outdated GPIO_FN comments
Function GPIOs have been removed, remove comments that refer to them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:17:11 +09:00
Laurent Pinchart
80da8e02d2 sh-pfc: r8a7740: Add bias (pull-up/down) pinconf support
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:17:10 +09:00
Laurent Pinchart
7d5684575c sh-pfc: r8a7740: Replace GPIO_PORTx enum with GPIO port numbers
The PFC GPIO API implementation moved to using port numbers. Replace all
GPIO_PORTx enum usage with the corresponding port number. The GPIO_PORTx
enum values are identical to the port number on this platform.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:17:09 +09:00
Laurent Pinchart
d65c5ee14e sh-pfc: r8a7740: Remove function GPIOs
No r8a7740 platform use the function GPIOs API. Remove it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:17:09 +09:00
Laurent Pinchart
0f7f51d82c sh-pfc: r8a7740: Remove HDMI function GPIOS
All r8a7740 platforms now use the pinctrl API to control the HDMI pins,
the corresponding function GPIOS are unused. Remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:34 +09:00
Laurent Pinchart
592e0c3029 sh-pfc: r8a7740: Remove FSI function GPIOS
All r8a7740 platforms now use the pinctrl API to control the FSI pins,
the corresponding function GPIOS are unused. Remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:34 +09:00
Laurent Pinchart
75c57d2c90 sh-pfc: r8a7740: Remove CEU function GPIOS
All r8a7740 platforms now use the pinctrl API to control the CEU pins,
the corresponding function GPIOS are unused. Remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:33 +09:00
Laurent Pinchart
3456e2543e sh-pfc: r8a7740: Remove GETHER function GPIOS
All r8a7740 platforms now use the pinctrl API to control the GETHER
pins, the corresponding function GPIOS are unused. Remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:33 +09:00
Laurent Pinchart
0be4e53913 sh-pfc: r8a7740: Remove BSC function GPIOS
All r8a7740 platforms now use the pinctrl API to control the BSC pins,
the corresponding function GPIOS are unused. Remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:32 +09:00
Laurent Pinchart
78c3e9b2a1 sh-pfc: r8a7740: Remove INTC function GPIOS
All r8a7740 platforms now use the pinctrl API to control the INTC pins,
the corresponding function GPIOS are unused. Remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:32 +09:00
Laurent Pinchart
aae36d71a3 sh-pfc: r8a7740: Remove SCIF function GPIOS
All r8a7740 platforms now use the pinctrl API to control the SCIF pins,
the corresponding function GPIOS are unused. Remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:31 +09:00
Laurent Pinchart
b79839024f sh-pfc: r8a7740: Hardcode the LCDC0 output
The r8a7740 has two LCDC units and two sets of LCDC output signals. By
default LCDC0 is routed to the LCD0 signals, and LCDC1 to the LCD1
signals. However, LCDC1 can be routed to the LCD0 signals by setting bit
MSEL6 in MSEL3CR (the LCD0 signals are further pinmuxed the usual way).

This could be configured by duplicating the LCD0 pin groups for LCDC1.
However, this would unnecessarily complicate the LCD pin groups, as no
r8a7740 board supported in mainline use such a configuration. Hardcode
the MSEL3CR MSEL6 bit to 0 for now.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:25 +09:00
Laurent Pinchart
a37d60659f sh-pfc: r8a7740: Add HDMI pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:25 +09:00
Laurent Pinchart
909dd95f13 sh-pfc: r8a7740: Add FSI pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:24 +09:00
Laurent Pinchart
0ec939bd75 sh-pfc: r8a7740: Add CEU pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:24 +09:00
Laurent Pinchart
bae11d30d0 sh-pfc: r8a7740: Add GETHER pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:23 +09:00
Laurent Pinchart
b7099c498b sh-pfc: r8a7740: Add BSC pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:23 +09:00
Laurent Pinchart
d031696e02 sh-pfc: r8a7740: Declare missing INTC function
When adding the INTC pin groups the INTC function hasn't been added to
the functions list. Fix it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:22 +09:00
Laurent Pinchart
cdd2c76935 sh-pfc: r8a7740: Add SCIF pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:22 +09:00
Laurent Pinchart
7cacd75559 sh-pfc: sh7372: Add bias (pull-up/down) pinconf support
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:21 +09:00
Laurent Pinchart
15dba8a454 sh-pfc: sh7372: Remove function GPIOs
No sh7372 platform use the function GPIOs API. Remove it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:21 +09:00
Laurent Pinchart
4e65c958d3 sh-pfc: sh7372: Replace GPIO_PORTx enum with GPIO port numbers
The PFC GPIO API implementation moved to using port numbers. Replace all
GPIO_PORTx enum usage with the corresponding port number. The GPIO_PORTx
enum values are identical to the port number on this platform.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:20 +09:00
Laurent Pinchart
e04662d69b sh-pfc: sh7372: Add USB pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:10 +09:00
Laurent Pinchart
ddc3296179 sh-pfc: sh7372: Add SCIF pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:09 +09:00
Laurent Pinchart
f3e03eb825 sh-pfc: sh7372: Add LCDC pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:09 +09:00
Laurent Pinchart
41eb7d605e sh-pfc: sh7372: Add KEYSC pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:08 +09:00
Laurent Pinchart
4d0882963e sh-pfc: sh7372: Add INTC pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:08 +09:00
Laurent Pinchart
7231fa45e9 sh-pfc: sh7372: Add HDMI pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:07 +09:00
Laurent Pinchart
971a0cd6dc sh-pfc: sh7372: Add FSI pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:07 +09:00
Laurent Pinchart
8b1b71d3a8 sh-pfc: sh7372: Add FLCTL pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:06 +09:00
Laurent Pinchart
d4d1c6538e sh-pfc: sh7372: Add CEU pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:06 +09:00
Laurent Pinchart
e68e641543 sh-pfc: sh7372: Add BSC pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:05 +09:00
Kuninori Morimoto
564617d2f9 sh-pfc: r8a7778: add SDHI support
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:05 +09:00
Kuninori Morimoto
a10cd30ed6 sh-pfc: r8a7778: add common PFC macro helper
pfc-r8a7778 will have many devices pfc support in the future,
and current pfc-r8a7778 is using pin/mux definition macro for SCIF.
The device definition style using macro is readable code IMO,
but creating new macro for each devices is not good sense.
This patch adds common SH_PFC_xx() macro for each new feature devices

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:04 +09:00
Vladimir Barinov
54ee73c6f5 sh-pfc: r8a7779: add VIN pin groups
Add VIN DATA[0:7]/CLK/HSYNC/VSYNC pin groups to R8A7779 PFC driver.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
[horms+renesas@verge.net.au: trivial rebase on top of
 "sh-pfc: r8a7779: Don't group USB OVC and PENC pins"]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:04 +09:00
Kuninori Morimoto
de9edf7d2c sh-pfc: r8a7779: use RCAR_GP_PIN() on _GP_GPIO() macro
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:03 +09:00
Laurent Pinchart
e21ea1977c sh-pfc: r8a7779: Replace hardcoded pin numbers with RCAR_GP_PIN macro
Use the RCAR_GP_PIN macro to convert from the documentation pin number
space to the linear pinctrl space.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:03 +09:00
Bastian Hecht
8fbfdbbb04 sh-pfc: r8a7740: Add SCIFA1 data group
Add SCIFA1 as preparation to switch to pinctrl in board files.

Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:02 +09:00
Kuninori Morimoto
87f8c98863 sh-pfc: Add r8a7778 pinmux support
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
2013-06-04 21:04:02 +09:00
Laurent Pinchart
ed3e26049e sh-pfc: r8a7790: Don't use GPIO enum entries
Refactor the GPIO macro magic to use GPIO numbers directly instead of
the GPIO_GP_x_y enum entries. This will allow removing the GPIO enum
entries from the mach/r8a7790.h header.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:01 +09:00
Laurent Pinchart
728d53f4a4 sh-pfc: r8a7790: Remove function GPIOs
No r8a7770 platform use the function GPIOs API. Remove it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
[horms+renesas@verge.net.au: fixed typo in changelog: r8a7779 -> r8a7770]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:01 +09:00
Laurent Pinchart
30e4247e5b sh-pfc: r8a7790: Remove GPIO data
GPIOs are now handled by a separate driver, remove GPIO data from the
SoC information structure.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:00 +09:00
Laurent Pinchart
45c6c85d13 sh-pfc: r8a7790: Add SCIF, SCIFA and SCIFB pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:00 +09:00
Laurent Pinchart
04e7ce78e0 sh-pfc: r8a7790: Add INTC pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:00 +09:00
Laurent Pinchart
1627769b5f sh-pfc: r8a7790: Add ETH pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:03:59 +09:00
Laurent Pinchart
bf9f0674e3 sh-pfc: Remove dependency on GPIOLIB
Make GPIO support optional for platforms that don't support GPIOLIB.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:03:59 +09:00
Bastian Hecht
09bbc1fd03 sh-pfc: Add entries for INTC external IRQs
We add all necessary entries to support the external IRQs from the INTC.

Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:03:58 +09:00
Koji Matsuoka
58c229e18b sh-pfc: Initial r8a7790 PFC support
Add initial PFC support for the r8a7790 SoC.

At this point only GPIO interface is supported, move to
newer interfaces planned as incremental changes.

Original authors is Koji Matsuoka-san, thanks for him
and his team for the heavy lifting. Adjusted by Magnus
to work together with updated code in drivers/pinctrl.

Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@rms.renesas.com>
Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:03:58 +09:00
Laurent Pinchart
350753bf2b sh-pfc: r8a7779: Don't group USB OVC and PENC pins
The USB_OVCn pins are alternate options for USB over-current detection
when using a 3.3V USB interface. As they're not mandatory they can be
used independently of the USB PENC pins. Don't group the USB_OVCn and
PENC pins to avoid conflicts when the USB_OVCn pins are used by another
function.

Reported-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 14:37:43 +09:00
Linus Walleij
351c2163f9 pinctrl: coh901: add device tree support
This makes it possible to probe the COH901 pinctrl driver from
the device tree, and assigned the device tree node in the
gpio_chip so we can look up cross-references from the device
tree. Start grabbing the per-port (bank) IRQs by index instead
of by name so we don't have to look up the IRQs by name going
forward.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-31 11:25:45 +02:00
Linus Walleij
21a035db89 pinctrl: u300 device tree support
This adds a simple device tree compat string for the U300 pin
controller. The base address is already passed properly as
a resource and everything works fine.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-31 11:24:50 +02:00
Lee Jones
3fd765a917 pinctrl/nomadik: Standardise Pinctrl compat string for Nomadik based platforms
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-28 16:27:15 +02:00
Linus Walleij
a386267a2c pinctrl: pinconf: take the right mutex
The pinconf_dgb_config_print() takes the per-pincontroller
mutex, when what it wants to take is actually the pin maps
mutex.

Reported-by: James Hogan <james.hogan@imgtec.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-27 15:53:32 +02:00
Wei Yongjun
d72f88a42b pinctrl: sunxi: fix error return code in sunxi_pinctrl_probe()
Fix to return a negative error code from the devm_clk_get() error
handling case instead of 0, as done elsewhere in this function.

Introduced by commit 950707c0eb
(pinctrl: sunxi: add clock support)

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-27 15:37:09 +02:00
Tomasz Figa
7ccbc60cd9 pinctrl: exynos: Handle suspend/resume of GPIO EINT registers
Some GPIO EINT control registers needs to be preserved across
suspend/resume cycle. This patch extends the driver to take care of
this.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-27 15:37:09 +02:00
Tomasz Figa
3385474c3a pinctrl: samsung: Allow per-bank SoC-specific private data
This patch extends pin bank descriptor structure with SoC-specific
private data field that allows SoC-specific drivers to store their own
private data.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Tested-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-27 15:37:09 +02:00
Tomasz Figa
21c219933f pinctrl: samsung: Add support for SoC-specific suspend/resume callbacks
SoC-specific driver might require additional save and restore of
registers. This patch adds pair of SoC-specific callbacks per pinctrl
device to account for this.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Tested-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-27 15:37:08 +02:00
Axel Lin
97fc463769 pinctrl: Don't override the error code in probe error handling
Otherwise, we return 0 in probe error paths when gpiochip_remove() returns 0.
Also show error message if gpiochip_remove() fails.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Tony Prisk <linux@prisktech.co.nz>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-27 15:37:08 +02:00
Tomasz Figa
ad350cd9d5 pinctrl: exynos: Add support for set_irq_wake of wake-up EINTs
This patch adds support of IRQ wake-up ability configuration for
wake-up EINTs on Exynos SoCs.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Tested-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-27 15:37:08 +02:00
Doug Anderson
d9f998639f pinctrl: samsung: fix suspend/resume functionality
The GPIO states need to be restored after s2r and this is not currently
supported in the pinctrl driver. This patch saves the gpio states before
suspend and restores them after resume.

Saving and restoring is done very early using syscore_ops and must
happen before pins are released from their powerdown state.

Patch originally from Prathyush K <prathyush.k@samsung.com> but
rewritten by Doug Anderson <dianders@chromium.org>.

Signed-off-by: Prathyush K <prathyush.k@samsung.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Tested-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-27 15:37:08 +02:00
Lee Jones
6b09a83429 pinctrl/nomadik: Standardise Pinctrl compat string for DBx5x based platforms
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-27 14:07:59 +02:00
Heiko Stuebner
af99a75074 pinctrl: Add pinctrl-s3c24xx driver
The s3c24xx pins follow a similar pattern as the other Samsung SoCs and
can therefore reuse the already introduced infrastructure.

The s3c24xx SoCs have one design oddity in that the first 4 external
interrupts do not reside in the eint pending register but in the main
interrupt controller instead. We solve this by forwarding the external
interrupt from the main controller into the irq domain of the pin bank.
The masking/acking of these interrupts is handled in the same way.

Furthermore the S3C2412/2413 SoCs contain another oddity in that they
keep the same 4 eints in the main interrupt controller and eintpend
register and requiring ack operations to happen in both. This is solved
by using different compatible properties for the wakeup eint node which
set a property accordingly.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-05-21 00:56:13 +09:00
Linus Torvalds
2c2c0e5231 Pinctrl fixes for the v3.10 series:
- Three fixes to make the boot path for device tree work
   properly on the Nomadik pin controller.
 - Compile warning fix for the vt8500 driver.
 - Fix error path in pinctrl-single.
 - Free mappings in error path of the Lantiq controller.
 - Documentation fixes.
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Merge tag 'pinctrl-fixes-v3.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pinctrl fixes from Linus Walleij:

 - Three fixes to make the boot path for device tree work properly on
   the Nomadik pin controller.

 - Compile warning fix for the vt8500 driver.

 - Fix error path in pinctrl-single.

 - Free mappings in error path of the Lantiq controller.

 - Documentation fixes.

* tag 'pinctrl-fixes-v3.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
  pinctrl/lantiq: Free mapping configs for both pin and groups
  pinctrl: single: fix error return code in pcs_parse_one_pinctrl_entry()
  pinctrl: generic: Fix typos and clarify comments
  pinctrl: vt8500: Fix incorrect data in WM8750 pinctrl table
  pinctrl: abx500: Rejiggle platform data and DT initialisation
  pinctrl: abx500: Specify failed sub-driver by ID instead of driver_data
2013-05-20 07:59:46 -07:00
Wolfram Sang
0497a59450 drivers/pinctrl: don't check resource with devm_ioremap_resource
devm_ioremap_resource does sanity checks on the given resource. No need to
duplicate this in the driver.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2013-05-18 11:55:56 +02:00
Laurent Pinchart
1dda2fa650 pinctrl/lantiq: Free mapping configs for both pin and groups
When creating mappings from DT both pin config and group config mappings
are allocated. Free them both when destroying the mappings.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-15 13:28:46 +02:00
Wei Yongjun
18442e65d4 pinctrl: single: fix error return code in pcs_parse_one_pinctrl_entry()
Fix to return a negative error code from the error handling
case instead of 0, as done elsewhere in this function.

Introduced by commit 9dddb4df90
(pinctrl: single: support generic pinconf)

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 14:04:14 +02:00
Tony Prisk
1c7ad8f001 pinctrl: vt8500: Fix incorrect data in WM8750 pinctrl table
WMT_PIN_WAKEUP1 should be declared as WMT_PIN(0, 17) rather than
WMT_PIN(0, 16). This currently generates a runtime warning because
WMT_PIN_WAKEUP0 is already defined as WMT_PIN(0, 16).

Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 13:08:28 +02:00
Lee Jones
86c976e43d pinctrl: abx500: Rejiggle platform data and DT initialisation
Platform Data is invariably populated for this driver, even when
booting with Device Tree. Thus the Device Tree probing code encased
within the first check for Platform Data will never executed, causing
the driver to fail when DT is enabled.

This patch fixes the aforementioned regression by rejigging the
probe() semantics to attempt to extract a platform ID from Device Tree
if one can not be sourced from platform data.

A pointer to GPIO platform data is always passed to the driver now, so
there's little point in checking for 'pdata' and executing the DT case if
it's not there. The difference between booting with DT and !DT is when
booting with DT, plat_id is not populated. Thus, in the DT case we have
to use a DT match table in order to find out which platform we're
executing on. So, we're changing the semantics here to only use the
match table if no plat_id is supplied though platform data.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
[edited commit message]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 13:07:49 +02:00
Lee Jones
2fcad12eb4 pinctrl: abx500: Specify failed sub-driver by ID instead of driver_data
If a sub-driver has not been specified correctly, there is a good chance
that plat_id is NULL, hence using an attribute of plat_id in the error
message is likely to not only fail the driver but Oops the kernel. Use
the failed ID instead.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-14 10:34:55 +02:00
Linus Torvalds
5647ac0ad4 Removal of GENERIC_GPIO for v3.10
GENERIC_GPIO now synonymous with GPIOLIB. There are no longer any valid
 cases for enableing GENERIC_GPIO without GPIOLIB, even though it is
 possible to do so which has been causing confusion and breakage. This
 branch does the work to completely eliminate GENERIC_GPIO.
 
 However, it is not trivial to just create a branch to remove it. Over
 the course of the v3.9 cycle more code referencing GENERIC_GPIO has been
 added to linux-next that conflicts with this branch. The following must
 be done to resolve the conflicts when merging this branch into mainline:
 
 * "git grep CONFIG_GENERIC_GPIO" should return 0 hits. Matches should be
   replaced with CONFIG_GPIOLIB
 * "git grep '\bGENERIC_GPIO\b'" should return 1 hit in the Chinese
   documentation.
 * Selectors of GENERIC_GPIO should be turned into selectors of GPIOLIB
 * definitions of the option in architecture Kconfig code should be deleted.
 
 Stephen has 3 merge fixup patches[1] that do the above. They are currently
 applicable on mainline as of May 2nd.
 
 [1] http://www.mail-archive.com/linux-kernel@vger.kernel.org/msg428056.html
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Merge tag 'gpio-for-linus' of git://git.secretlab.ca/git/linux

Pull removal of GENERIC_GPIO from Grant Likely:
 "GENERIC_GPIO now synonymous with GPIOLIB.  There are no longer any
  valid cases for enableing GENERIC_GPIO without GPIOLIB, even though it
  is possible to do so which has been causing confusion and breakage.
  This branch does the work to completely eliminate GENERIC_GPIO."

* tag 'gpio-for-linus' of git://git.secretlab.ca/git/linux:
  gpio: update gpio Chinese documentation
  Remove GENERIC_GPIO config option
  Convert selectors of GENERIC_GPIO to GPIOLIB
  blackfin: force use of gpiolib
  m68k: coldfire: use gpiolib
  mips: pnx833x: remove requirement for GENERIC_GPIO
  openrisc: default GENERIC_GPIO to false
  avr32: default GENERIC_GPIO to false
  xtensa: remove explicit selection of GENERIC_GPIO
  sh: replace CONFIG_GENERIC_GPIO by CONFIG_GPIOLIB
  powerpc: remove redundant GENERIC_GPIO selection
  unicore32: default GENERIC_GPIO to false
  unicore32: remove unneeded select GENERIC_GPIO
  arm: plat-orion: use GPIO driver on CONFIG_GPIOLIB
  arm: remove redundant GENERIC_GPIO selection
  mips: alchemy: require gpiolib
  mips: txx9: change GENERIC_GPIO to GPIOLIB
  mips: loongson: use GPIO driver on CONFIG_GPIOLIB
  mips: remove redundant GENERIC_GPIO select
2013-05-09 09:59:16 -07:00
Linus Torvalds
fcba914542 ARM: arm-soc platform updates for 3.10, part 3
This is the third and smallest of the SoC specific updates.
 Changes include:
 
 * SMP support for the Xilinx zynq platform
 * Smaller imx changes
 * LPAE support for mvebu
 * Moving the orion5x, kirkwood, dove and mvebu platforms
   to a common "mbus" driver for their internal devices.
 
 It would be good to get feedback on the location of the "mbus"
 driver. Since this is used on multiple platforms may potentially
 get shared with other architectures (powerpc and arm64), it
 was moved to drivers/bus/. We expect other similar drivers to
 get moved to the same place in order to avoid creating more
 top-level directories under drivers/ or cluttering up the
 messy drivers/misc/ even more.
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Merge tag 'soc-for-linus-3' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform updates (part 3) from Arnd Bergmann:
 "This is the third and smallest of the SoC specific updates.  Changes
  include:

   - SMP support for the Xilinx zynq platform
   - Smaller imx changes
   - LPAE support for mvebu
   - Moving the orion5x, kirkwood, dove and mvebu platforms to a common
     "mbus" driver for their internal devices.

  It would be good to get feedback on the location of the "mbus" driver.
  Since this is used on multiple platforms may potentially get shared
  with other architectures (powerpc and arm64), it was moved to
  drivers/bus/.  We expect other similar drivers to get moved to the
  same place in order to avoid creating more top-level directories under
  drivers/ or cluttering up the messy drivers/misc/ even more."

* tag 'soc-for-linus-3' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (50 commits)
  ARM: imx: reset_controller may be disabled
  ARM: mvebu: Align the internal registers virtual base to support LPAE
  ARM: mvebu: Limit the DMA zone when LPAE is selected
  arm: plat-orion: remove addr-map code
  arm: mach-mv78xx0: convert to use the mvebu-mbus driver
  arm: mach-orion5x: convert to use mvebu-mbus driver
  arm: mach-dove: convert to use mvebu-mbus driver
  arm: mach-kirkwood: convert to use mvebu-mbus driver
  arm: mach-mvebu: convert to use mvebu-mbus driver
  ARM i.MX53: set CLK_SET_RATE_PARENT flag on the tve_ext_sel clock
  ARM i.MX53: tve_di clock is not part of the CCM, but of TVE
  ARM i.MX53: make tve_ext_sel propagate rate change to PLL
  ARM i.MX53: Remove unused tve_gate clkdev entry
  ARM i.MX5: Remove tve_sel clock from i.MX53 clock tree
  ARM: i.MX5: Add PATA and SRTC clocks
  ARM: imx: do not bring up unavailable cores
  ARM: imx: add initial imx6dl support
  ARM: imx1: mm: add call to mxc_device_init
  ARM: imx_v4_v5_defconfig: Add CONFIG_GPIO_SYSFS
  ARM: imx_v6_v7_defconfig: Select CONFIG_PERF_EVENTS
  ...
2013-05-07 11:02:18 -07:00
Linus Torvalds
a8c4b90e67 ARM: arm-soc platform updates for 3.10, part 2
These patches are all for Renesas shmobile, and depend on the earlier
 pinctrl updates. Remarkably, this adds support for three new SoCs:
 r8a73a4, r8a73a4 and r8a7778. The bulk of the code added for these is
 for pinctrl (using the new subsystem) and for clocks (not yet using the
 common clock subsystem). The latter will have to get converted in one
 of the upcoming releases, but shmobile is not ready for that yet.
 
 The series also contains Renesas shmobile board changes, adding one
 board file for each of the three new SoCs.  These boards are using a
 mix of classic and device-tree based probing, as there is still a lot of
 infrastructure in shmobile that has not been converted to DT yet. Once
 those are resolved to the degree that no board specific setup code is
 needed, they can get folded into the respective SoC setup files.
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Merge tag 'soc-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform updates (part 2) from Arnd Bergmann:
 "These patches are all for Renesas shmobile, and depend on the earlier
  pinctrl updates.  Remarkably, this adds support for three new SoCs:
  r8a73a4, r8a73a4 and r8a7778.  The bulk of the code added for these is
  for pinctrl (using the new subsystem) and for clocks (not yet using
  the common clock subsystem).  The latter will have to get converted in
  one of the upcoming releases, but shmobile is not ready for that yet.

  The series also contains Renesas shmobile board changes, adding one
  board file for each of the three new SoCs.  These boards are using a
  mix of classic and device-tree based probing, as there is still a lot
  of infrastructure in shmobile that has not been converted to DT yet.
  Once those are resolved to the degree that no board specific setup
  code is needed, they can get folded into the respective SoC setup files."

* tag 'soc-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (78 commits)
  ARM: shmobile: use r8a7790 timer setup code on Lager
  ARM: shmobile: force enable of r8a7790 arch timer
  ARM: shmobile: Add second I/O range for r8a7790 PFC
  ARM: shmobile: bockw: enable network settings on bootargs
  ARM: shmobile: bockw: add SMSC ethernet support
  ARM: shmobile: R8A7778: add Ether support
  ARM: shmobile: bockw: enable SMSC ethernet on defconfig
  ARM: shmobile: r8a7778: add r8a7778_init_irq_extpin()
  ARM: shmobile: r8a7778: remove pointless PLATFORM_INFO()
  ARM: shmobile: mackerel: clean up MMCIF vs. SDHI1 selection
  ARM: shmobile: mackerel: add interrupt names for SDHI0
  ARM: shmobile: mackerel: switch SDHI and MMCIF interfaces to slot-gpio
  ARM: shmobile: mackerel: remove OCR masks, where regulators are used
  ARM: shmobile: mackerel: SDHI resources do not have to be numbered
  ARM: shmobile: Initial r8a7790 Lager board support
  ARM: shmobile: APE6EVM LAN9220 support
  ARM: shmobile: APE6EVM PFC support
  ARM: shmobile: APE6EVM base support
  ARM: shmobile: kzm9g-reference: add ethernet support
  ARM: shmobile: add R-Car M1A Bock-W platform support
  ...
2013-05-07 10:57:51 -07:00
Linus Torvalds
22b154365f ARM: arm-soc pinctrl changes for Renesas for 3.10
This is yet another driver change, which is split out just because
 of its size. As already in 3.9, a lot of changes are going on here,
 as the shmobile platform gets converted from its own pin control
 API to the generic drivers/pinctrl subsystem.
 
 Based on agreements with Paul Mundt, we are merging the sh-arch-side
 changes here as well.
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Merge tag 'renesas-pinctrl-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC pinctrl changes for Renesas from Olof Johansson:
 "This is yet another driver change, which is split out just because of
  its size.  As already in 3.9, a lot of changes are going on here, as
  the shmobile platform gets converted from its own pin control API to
  the generic drivers/pinctrl subsystem.

  Based on agreements with Paul Mundt, we are merging the sh-arch-side
  changes here as well"

* tag 'renesas-pinctrl-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (142 commits)
  ARM: shmobile: r8a7779: Remove INTC function GPIOs
  ARM: shmobile: r8a7779: Remove LBSC function GPIOs
  ARM: shmobile: r8a7779: Remove USB function GPIOs
  ARM: shmobile: r8a7779: Remove HSPI function GPIOs
  ARM: shmobile: r8a7779: Remove SCIF function GPIOs
  ARM: shmobile: r8a7779: Remove SDHI and MMCIF function GPIOs
  ARM: shmobile: r8a7779: Remove DU function GPIOs
  ARM: shmobile: r8a7779: Remove DU1_DOTCLKOUT1 GPIO
  ARM: shmobile: r8a7740: Remove SDHI and MMCIF function GPIOs
  ARM: shmobile: r8a7740: Remove LCD0 and LCD1 function GPIOs
  ARM: shmobile: sh73a0: Remove IrDA function GPIOs
  ARM: shmobile: sh73a0: Remove USB function GPIOs
  ARM: shmobile: sh73a0: Remove BSC function GPIOs
  ARM: shmobile: sh73a0: Remove KEYSC function GPIOs
  ARM: shmobile: sh73a0: Remove pull-up function GPIOS
  ARM: shmobile: sh73a0: Remove FSI function GPIOs
  ARM: shmobile: sh73a0: Remove I2C function GPIOs
  ARM: shmobile: sh73a0: Remove SCIFA and SCIFB function GPIOs
  ARM: shmobile: sh73a0: Remove LCDC and LCDC2 function GPIOs
  ARM: shmobile: sh7372: Remove SDHI and MMCIF function GPIOs
  ...
2013-05-04 12:32:41 -07:00
Linus Torvalds
6fa52ed33b ARM: arm-soc driver changes for 3.10
This is a rather large set of patches for device drivers that for one
 reason or another the subsystem maintainer preferred to get merged
 through the arm-soc tree. There are both new drivers as well as
 existing drivers that are getting converted from platform-specific
 code into standalone drivers using the appropriate subsystem
 specific interfaces.
 
 In particular, we can now have pinctrl, clk, clksource and irqchip
 drivers in one file per driver, without the need to call into
 platform specific interface, or to get called from platform specific
 code, as long as all information about the hardware is provided
 through a device tree.
 
 Most of the drivers we touch this time are for clocksource. Since
 now most of them are part of drivers/clocksource, I expect that we
 won't have to touch these again from arm-soc and can let the
 clocksource maintainers take care of these in the future.
 
 Another larger part of this series is specific to the exynos platform,
 which is seeing some significant effort in upstreaming and
 modernization of its device drivers this time around, which
 unfortunately is also the cause for the churn and a lot of the
 merge conflicts.
 
 There is one new subsystem that gets merged as part of this series:
 the reset controller interface, which is a very simple interface
 for taking devices on the SoC out of reset or back into reset.
 Patches to use this interface on i.MX follow later in this merge
 window, and we are going to have other platforms (at least tegra
 and sirf) get converted in 3.11. This will let us get rid of
 platform specific callbacks in a number of platform independent
 device drivers.
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Merge tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver changes from Olof Johansson:
 "This is a rather large set of patches for device drivers that for one
  reason or another the subsystem maintainer preferred to get merged
  through the arm-soc tree.  There are both new drivers as well as
  existing drivers that are getting converted from platform-specific
  code into standalone drivers using the appropriate subsystem specific
  interfaces.

  In particular, we can now have pinctrl, clk, clksource and irqchip
  drivers in one file per driver, without the need to call into platform
  specific interface, or to get called from platform specific code, as
  long as all information about the hardware is provided through a
  device tree.

  Most of the drivers we touch this time are for clocksource.  Since now
  most of them are part of drivers/clocksource, I expect that we won't
  have to touch these again from arm-soc and can let the clocksource
  maintainers take care of these in the future.

  Another larger part of this series is specific to the exynos platform,
  which is seeing some significant effort in upstreaming and
  modernization of its device drivers this time around, which
  unfortunately is also the cause for the churn and a lot of the merge
  conflicts.

  There is one new subsystem that gets merged as part of this series:
  the reset controller interface, which is a very simple interface for
  taking devices on the SoC out of reset or back into reset.  Patches to
  use this interface on i.MX follow later in this merge window, and we
  are going to have other platforms (at least tegra and sirf) get
  converted in 3.11.  This will let us get rid of platform specific
  callbacks in a number of platform independent device drivers."

* tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (256 commits)
  irqchip: s3c24xx: add missing __init annotations
  ARM: dts: Disable the RTC by default on exynos5
  clk: exynos5250: Fix parent clock for sclk_mmc{0,1,2,3}
  ARM: exynos: restore mach/regs-clock.h for exynos5
  clocksource: exynos_mct: fix build error on non-DT
  pinctrl: vt8500: wmt: Fix checking return value of pinctrl_register()
  irqchip: vt8500: Convert arch-vt8500 to new irqchip infrastructure
  reset: NULL deref on allocation failure
  reset: Add reset controller API
  dt: describe base reset signal binding
  ARM: EXYNOS: Add arm-pmu DT binding for exynos421x
  ARM: EXYNOS: Add arm-pmu DT binding for exynos5250
  ARM: EXYNOS: Enable PMUs for exynos4
  irqchip: exynos-combiner: Correct combined IRQs for exynos4
  irqchip: exynos-combiner: Add set_irq_affinity function for combiner_irq
  ARM: EXYNOS: fix compilation error introduced due to common clock migration
  clk: exynos5250: Fix divider values for sclk_mmc{0,1,2,3}
  clk: exynos4: export clocks required for fimc-is
  clk: samsung: Fix compilation error
  clk: tegra: fix enum tegra114_clk to match binding
  ...
2013-05-04 12:31:18 -07:00
Linus Torvalds
fbe8ed634d Two fixes to the pinctrl subsystem for v3.10:
- A quite apparent mutex fix in an untested codepath
 - A compile warning fix in the plgpio driver
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Merge tag 'pinctrl-fixes-v3.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pinctrl fixes from Linus Walleij:
 "Two fixes to the pinctrl subsystem for v3.10:
   - A quite apparent mutex fix in an untested codepath
   - A compile warning fix in the plgpio driver"

* tag 'pinctrl-fixes-v3.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
  pinctrl: fix mutex deadlock in get_pinctrl_dev_from_of_node()
  pinctrl: plgpio: add CONFIG_PM_SLEEP to suspend/resume functions
2013-05-02 14:42:46 -07:00
Linus Torvalds
99c6bcf46d ARM: arm-soc multiplatform updates for 3.10
More multiplatform enablement for ARM platforms. The ones converted in
 this branch are:
 - bcm2835
 - cns3xxx
 - sirf
 - nomadik
 - msx
 - spear
 - tegra
 - ux500
 
 We're getting close to having most of them converted!
 
 One of the larger platforms remaining is Samsung Exynos, and there are
 a bunch of supporting patches in this merge window for it. There was a
 patch in this branch to a early version of multiplatform conversion,
 but it ended up being reverted due to need of more bake time. The
 revert commit is part of the branch since it would have required
 rebasing multiple dependent branches and they were stable by then.
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Merge tag 'multiplatform-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC multiplatform updates from Olof Johansson:
 "More multiplatform enablement for ARM platforms.  The ones converted
  in this branch are:

   - bcm2835
   - cns3xxx
   - sirf
   - nomadik
   - msx
   - spear
   - tegra
   - ux500

  We're getting close to having most of them converted!

  One of the larger platforms remaining is Samsung Exynos, and there are
  a bunch of supporting patches in this merge window for it.  There was
  a patch in this branch to a early version of multiplatform conversion,
  but it ended up being reverted due to need of more bake time.  The
  revert commit is part of the branch since it would have required
  rebasing multiple dependent branches and they were stable by then"

* tag 'multiplatform-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (70 commits)
  mmc: sdhci-s3c: Fix operation on non-single image Samsung platforms
  clocksource: nomadik-mtu: fix up clocksource/timer
  Revert "ARM: exynos: enable multiplatform support"
  ARM: SPEAr13xx: Fix typo "ARCH_HAVE_CPUFREQ"
  ARM: exynos: enable multiplatform support
  rtc: s3c: make header file local
  mtd: onenand/samsung: make regs-onenand.h file local
  thermal/exynos: remove unnecessary header inclusions
  mmc: sdhci-s3c: remove platform dependencies
  ARM: samsung: move mfc device definition to s5p-dev-mfc.c
  ARM: exynos: move debug-macro.S to include/debug/
  ARM: exynos: prepare for sparse IRQ
  ARM: exynos: introduce EXYNOS_ATAGS symbol
  ARM: tegra: build assembly files with -march=armv7-a
  ARM: Push selects for TWD/SCU into machine entries
  ARM: ux500: build hotplug.o for ARMv7-a
  ARM: ux500: move to multiplatform
  ARM: ux500: make remaining headers local
  ARM: ux500: make irqs.h local to platform
  ARM: ux500: get rid of <mach/[hardware|db8500-regs].h>
  ...
2013-05-02 09:38:16 -07:00
Linus Torvalds
dfab34aa61 ARM: arm-soc device-tree updates for 3.10, part 1
Device-tree updates for 3.10. The bulk of the churn in this branch is due
 to i.MX moving from C-defined pin control over to device tree, which is
 a one-time conversion that will allow greater flexibility down the road.
 
 Besides that, there's PCI-e bindings for Marvell mvebu platforms and a
 handful of cleanups to tegra due to the new include file functionality
 of the device tree compiler.
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Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC device-tree updates from Olof Johansson:
 "Part 1 of device-tree updates for 3.10.  The bulk of the churn in this
  branch is due to i.MX moving from C-defined pin control over to device
  tree, which is a one-time conversion that will allow greater
  flexibility down the road.

  Besides that, there's PCI-e bindings for Marvell mvebu platforms and a
  handful of cleanups to tegra due to the new include file functionality
  of the device tree compiler"

* tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (113 commits)
  arm: mvebu: PCIe Device Tree informations for Armada XP GP
  arm: mvebu: PCIe Device Tree informations for Armada 370 DB
  arm: mvebu: PCIe Device Tree informations for Armada 370 Mirabox
  arm: mvebu: PCIe Device Tree informations for Armada XP DB
  arm: mvebu: PCIe Device Tree informations for OpenBlocks AX3-4
  arm: mvebu: add PCIe Device Tree informations for Armada XP
  arm: mvebu: add PCIe Device Tree informations for Armada 370
  ARM: sunxi: unify osc24M_fixed and osc24M
  arm: vt8500: Add SDHC support to WM8505 DT
  ARM: dts: Add a 64 bits version of the skeleton device tree
  ARM: mvebu: Add Device Bus and CFI flash memory support to defconfig
  ARM: mvebu: Add support for NOR flash device on Openblocks AX3 board
  ARM: mvebu: Add support for NOR flash device on Armada XP-GP board
  ARM: mvebu: Add Device Bus support for Armada 370/XP SoC
  ARM: dts: imx6dl-wandboard: Add USB Host support
  ARM: dts: imx51 cpu node
  ARM: dts: Add missing imx27-phytec-phycore dtb target
  ARM: dts: Add NFC support for i.MX27 Phytec PCM038 module
  ARM: i.MX51: Add PATA support
  ARM: dts: Add initial support for Wandboard Dual-Lite
  ...
2013-05-02 09:28:03 -07:00
Linus Torvalds
a7726350e0 ARM: arm-soc cleanup for 3.10
Here is a collection of cleanup patches. Among the pieces that stand out are:
 
 - The deletion of h720x platforms
 - Split of at91 non-dt platforms to their own Kconfig file to keep them separate
 - General cleanups and refactoring of i.MX and MXS platforms
 - Some restructuring of clock tables for OMAP
 - Convertion of PMC driver for Tegra to dt-only
 - Some renames of sunxi -> sun4i (Allwinner A10)
 - ... plus a bunch of other stuff that I haven't mentioned
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Merge tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC cleanup from Olof Johansson:
 "Here is a collection of cleanup patches.  Among the pieces that stand
  out are:

   - The deletion of h720x platforms
   - Split of at91 non-dt platforms to their own Kconfig file to keep
     them separate
   - General cleanups and refactoring of i.MX and MXS platforms
   - Some restructuring of clock tables for OMAP
   - Convertion of PMC driver for Tegra to dt-only
   - Some renames of sunxi -> sun4i (Allwinner A10)
   - ... plus a bunch of other stuff that I haven't mentioned"

* tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (119 commits)
  ARM: i.MX: remove unused ARCH_* configs
  ARM i.MX53: remove platform ahci support
  ARM: sunxi: Rework the restart code
  irqchip: sunxi: Rename sunxi to sun4i
  irqchip: sunxi: Make use of the IRQCHIP_DECLARE macro
  clocksource: sunxi: Rename sunxi to sun4i
  clocksource: sunxi: make use of CLKSRC_OF
  clocksource: sunxi: Cleanup the timer code
  ARM: at91: remove trailing semicolon from macros
  ARM: at91/setup: fix trivial typos
  ARM: EXYNOS: remove "config EXYNOS_DEV_DRM"
  ARM: EXYNOS: change the name of USB ohci header
  ARM: SAMSUNG: Remove unnecessary code for dma
  ARM: S3C24XX: Remove unused GPIO drive strength register definitions
  ARM: OMAP4+: PM: Restore CPU power state to ON with clockdomain force wakeup method
  ARM: S3C24XX: Removed unneeded dependency on CPU_S3C2412
  ARM: S3C24XX: Removed unneeded dependency on CPU_S3C2410
  ARM: S3C24XX: Removed unneeded dependency on ARCH_S3C24XX for boards
  ARM: SAMSUNG: Fix typo "CONFIG_SAMSUNG_DEV_RTC"
  ARM: S5P64X0: Fix typo "CONFIG_S5P64X0_SETUP_SDHCI"
  ...
2013-05-02 09:03:55 -07:00
Daniel Mack
d463f82d22 pinctrl: fix mutex deadlock in get_pinctrl_dev_from_of_node()
This obvious bug was introduced by d755910b7 ("pinctrl: move subsystem
mutex to pinctrl_dev struct").

Signed-off-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-30 13:02:04 +02:00
Jingoo Han
37e4901449 pinctrl: plgpio: add CONFIG_PM_SLEEP to suspend/resume functions
Add CONFIG_PM_SLEEP to suspend/resume functions to fix the following
build warning when CONFIG_PM_SLEEP is not selected. This is because
sleep PM callbacks defined by SIMPLE_DEV_PM_OPS are only used when
the CONFIG_PM_SLEEP is enabled.

drivers/pinctrl/spear/pinctrl-plgpio.c:645:12: warning: 'plgpio_suspend' defined but not used [-Wunused-function]
drivers/pinctrl/spear/pinctrl-plgpio.c:684:12: warning: 'plgpio_resume' defined but not used [-Wunused-function]

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-30 13:01:17 +02:00
Patrice Chotard
42fed7ba44 pinctrl: move subsystem mutex to pinctrl_dev struct
This mutex avoids deadlock in case of use of multiple pin
controllers. Before this modification, by using a global
mutex, deadlock appeared when, for example, a call to
pinctrl_pins_show() locked the pinctrl_mutex, called the
ops->pin_dbg_show of a particular pin controller. If this
pin controller needs I2C access to retrieve configuration
information and I2C driver is using pinctrl to drive its
pins, a call to pinctrl_select_state() try to lock again
pinctrl_mutex which leads to a deadlock.

Notice that the mutex grab from the two direction functions
was moved into pinctrl_gpio_direction().

For several cases, we can't replace pinctrl_mutex by
pctldev->mutex, because at this stage, pctldev is
not accessible :
	- pinctrl_get()/pinctrl_put()
	- pinctrl_register_maps()

So add respectively pinctrl_list_mutex and
pinctrl_maps_mutex in order to protect
pinctrl_list and pinctrl_maps list instead.

Reintroduce pinctrldev_list_mutex in
find_pinctrl_by_of_node(),
pinctrl_find_and_add_gpio_range()
pinctrl_request_gpio(), pinctrl_free_gpio(),
pinctrl_gpio_direction(), pinctrl_devices_show(),
pinctrl_register() and pinctrl_unregister() to
protect pinctrldev_list.

Changes v2->v3:
- Fix a missing EXPORT_SYMBOL_GPL() for pinctrl_select_state().

Changes v1->v2:
- pinctrl_select_state_locked() is removed, all lock mechanism
  is located inside pinctrl_select_state(). When parsing
  the state->setting list, take the per-pin-controller driver
  lock. (Patrice).
- Introduce pinctrldev_list_mutex to protect pinctrldev_list
  in all functions which parse or modify pictrldev_list.
  (Patrice).
- move find_pinctrl_by_of_node() from pinctrl/devicetree.c to
  pinctrl/core.c in order to protect pinctrldev_list.
  (Patrice).
- Sink mutex:es into some functions and remove some _locked
  variants down to where the lists are actually accessed to
  make things simpler. (Linus)
- Drop *all* mutexes completely from pinctrl_lookup_state()
  and pinctrl_select_state() - no relevant mutex was taken
  and it was unclear what this was protecting against. (Linus)

Reported by : Seraphin Bonnaffe <seraphin.bonnaffe@stericsson.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-26 17:01:35 +02:00
Laurent Meunier
cb6d315dc3 pinctrl/pinconfig: fix misplaced goto
This update contains a basic fix that went unseen through
test and review.

Signed-off-by: Laurent Meunier <laurent.meunier@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-26 17:00:14 +02:00
Tomasz Figa
a0d4262a25 pinctrl: s3c64xx: Fix build error caused by undefined chained_irq_enter
Commit de88cbb7 moved definitions of chained_irq_enter and
chained_irq_exit to a generic header, which must be now included instead
of the legacy arch-specific one.

This patch fixes build error caused by including the legacy header
leading to undefined chained_irq_enter and chained_irq_exit symbols.

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-23 13:59:45 +02:00
Axel Lin
1f1a73571c pinctrl: vt8500: wmt: Fix checking return value of pinctrl_register()
pinctrl_register() returns NULL on error.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Tony Prisk <linux@prisktech.co.nz>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-19 17:16:36 +02:00
Laurent Meunier
f07512e615 pinctrl/pinconfig: add debug interface
This update adds a debugfs interface to modify a pin configuration
for a given state in the pinctrl map. This allows to modify the
configuration for a non-active state, typically sleep state.
This configuration is not applied right away, but only when the state
will be entered.

This solution is mandated for us by HW validation: in order
to test and verify several pin configurations during sleep without
recompiling the software.

Change log in this patch set;
Take into account latest feedback from Stephen Warren:
- stale comments update
- improved code efficiency and readibility
- limit size of global variable pinconf_dbg_conf
- remove req_type as it can easily be added later when
add/delete requests support is implemented

Signed-off-by: Laurent Meunier <laurent.meunier@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-19 15:45:05 +02:00
Patrice CHOTARD
06b62d8214 pinctrl: abx500: fix issue when no pdata
Fix an issue when probing pinctrl-abx500 with no
platform data.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-18 10:28:04 +02:00
Alexandre Courbot
76ec9d18b8 Convert selectors of GENERIC_GPIO to GPIOLIB
GENERIC_GPIO is now equivalent to GPIOLIB and features that depended on
GENERIC_GPIO can now depend on GPIOLIB to allow removal of this option.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
2013-04-16 18:47:14 +09:00
Olof Johansson
432b473419 Renesas ARM and SH based SoC pinmux fixes for v3.10
Correct a typo in sh-pfc r8a7779
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Merge tag 'renesas-pinmux-fixes-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc2

From Simon Horman:
Renesas ARM and SH based SoC pinmux fixes for v3.10

Correct a typo in sh-pfc r8a7779

* tag 'renesas-pinmux-fixes-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  sh-pfc: r8a7779: tidyup intc_irq3_b typo

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-11 10:30:28 -07:00
Shawn Guo
21e59123a8 pinctrl: add pinctrl driver for imx6sl
Add a pinctrl driver for i.MX6 SoloLite based on pinctrl-imx core
driver.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-09 22:53:38 +08:00
Shawn Guo
3f551d6aca pinctrl: add pinctrl driver for imx6dl
The imx6dl is a derivative of imx6q with very limited difference.  These
two SoCs are so compatible that they can be handled as one platform in
software.  That said, we will not have target SOC_IMX6DL but just
reusing SOC_IMX6Q.   That's why the pinctrl-imx6dl driver is added here
with symbol PINCTRL_IMX6Q controlling the build of it.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-09 22:53:38 +08:00
Shawn Guo
e16415313c pinctrl: imx: move hard-coding data into device tree
Currently, all imx pinctrl drivers maintain a big array of struct
imx_pin_reg which hard-codes data like register offset and mux mode
setting for each pin function.  Every time a new imx SoC support is
added, we need to add such a big mount of data.  With moving to single
kernel build, it's only matter of time to be blamed on memory consuming.

With DTC pre-processor support in place, the patch moves all these data
into device tree by redefining the PIN_FUNC_ID in imxXX-pinfunc.h and
changing the PIN_FUNC_ID parsing code a little bit.

The pin id gets re-numbered based on mux register offset, or config
register offset if the pin has no mux register, so that kernel can
identify the pin id from register offsets provided by device tree.

As a bonus point of the change, those arbitrary magic numbers standing
for particular PIN_FUNC_ID in device tree sources are now replaced by
macros to improve the readability of dts files.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-09 22:52:50 +08:00
Arnd Bergmann
71f6424023 Merge branch 'mxs/cleanup' into next/multiplatform
This is a dependency for mxs/multiplatform

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Conflicts:
	drivers/clocksource/Makefile
2013-04-09 16:02:14 +02:00
Arnd Bergmann
44c0d23775 Linux 3.9-rc5
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Merge tag 'v3.9-rc5' into next/cleanup

This is a dependency for the mxs/cleanup branch.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-09 15:29:43 +02:00
Kuninori Morimoto
407cd59798 sh-pfc: r8a7779: tidyup intc_irq3_b typo
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
2013-04-09 17:56:08 +09:00
Maxime Ripard
cb51f8e8e3 pinctrl: sunxi: Rename wemac functions to emac
The pin functions associated to the ethernet controller were introduced
with the label "wemac", which was the name of the ethernet driver in the
allwinner source tree, while the real name of the IP is actually "emac",
as advertised in several documents including the datasheet.

Since this is part of the device tree bindings, and that these part of
the bindings have not yet be released in a kernel version, it seems like
the good timing to change it and assure consistency.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-09 10:47:52 +02:00
Thomas Abraham
8dc3568d55 pinctrl: exynos5440: add gpio interrupt support
Exynos5440 supports gpio interrupts on gpios 16 to 23. The eight interrupt lines
originating from the pin-controller are connected to the gic. Add irq-chip support
for these interrupts.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-09 10:16:53 +02:00
Thomas Abraham
f981973942 pinctrl: exynos5440: fix probe failure due to missing pin-list in config nodes
The property 'samsung,exynos5440-pins' is optional in configuration nodes
which are included in the Exynos5440 pin-controller device node. Fix the
incorrect failure in driver probe if 'samsung,exynos5440-pins' property
is not found in the configuration nodes.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-09 10:13:59 +02:00
Sachin Kamat
2e8ff91a5b pinctrl: ab8505: Staticize some symbols
Silences the following warnings:
drivers/pinctrl/pinctrl-ab8505.c:274:28: warning:
symbol 'ab8505_alternate_functions' was not declared. Should it be static?
drivers/pinctrl/pinctrl-ab8505.c:351:32: warning:
symbol 'ab8505_gpio_irq_cluster' was not declared. Should it be static?

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-09 09:59:42 +02:00
Sachin Kamat
efdd69f124 pinctrl: ab8540: Staticize some symbols
Silences the following warnings:
drivers/pinctrl/pinctrl-ab8540.c:302:28: warning:
symbol 'ab8540_alternate_functions' was not declared. Should it be static?
drivers/pinctrl/pinctrl-ab8540.c:379:32: warning:
symbol 'ab8540_gpio_irq_cluster' was not declared. Should it be static?

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-09 09:58:02 +02:00
Sachin Kamat
49e6cbfbfe pinctrl: ab9540: Staticize some symbols
Fixes the following warnings:
drivers/pinctrl/pinctrl-ab9540.c:382:28: warning:
symbol 'ab9540alternate_functions' was not declared. Should it be static?
drivers/pinctrl/pinctrl-ab9540.c:457:32: warning:
symbol 'ab9540_gpio_irq_cluster' was not declared. Should it be static?

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-09 09:55:59 +02:00
Sachin Kamat
a0ce9f3ee3 pinctrl: ab8500: Staticize some symbols
These symbols are used only in this file. Silences the following
warnings:
drivers/pinctrl/pinctrl-ab8500.c:392:28: warning:
symbol 'ab8500_alternate_functions' was not declared. Should it be static?
drivers/pinctrl/pinctrl-ab8500.c:458:32: warning:
symbol 'ab8500_gpio_irq_cluster' was not declared. Should it be static?

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-09 09:54:00 +02:00
Sachin Kamat
9c4154ef76 pinctrl: abx500: Staticize some symbols
These symbols are used only in this file. Without this patch
we get the following warnings:
drivers/pinctrl/pinctrl-abx500.c:520:5: warning:
symbol 'abx500_gpio_request' was not declared. Should it be static?
drivers/pinctrl/pinctrl-abx500.c:527:6: warning:
symbol 'abx500_gpio_free' was not declared. Should it be static?
drivers/pinctrl/pinctrl-abx500.c:614:5: warning:
symbol 'abx500_gpio_request_enable' was not declared. Should it be static?
drivers/pinctrl/pinctrl-abx500.c:714:5: warning:
symbol 'abx500_pin_config_get' was not declared. Should it be static?
drivers/pinctrl/pinctrl-abx500.c:721:5: warning:
symbol 'abx500_pin_config_set' was not declared. Should it be static?

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-09 09:52:57 +02:00
Tomasz Figa
61dd726131 pinctrl: Add pinctrl-s3c64xx driver
This patch adds pinctrl-s3c64xx driver which implements pin control
interface for Samsung S3C64xx SoCs.

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-09 09:45:10 +02:00
Tomasz Figa
c16150d846 pinctrl: samsung: Handle banks with two configuration registers
This patch adds support for banks that have more than one function
configuration registers, e.g. some of the banks of S3C64xx SoCs.

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-09 09:43:39 +02:00
Tomasz Figa
43fc9e7fab pinctrl: samsung: Remove hardcoded register offsets
This patch replaces statically hardcoded register offsets of Exynos SoCs
with an array of register offsets in samsung_pin_bank_type struct.

Thanks to this change, support for SoCs with other set and order of
registers can be added (e.g. S3C24xx and S3C64xx).

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-09 09:42:25 +02:00
Tomasz Figa
499147c9db pinctrl: samsung: Split pin bank description into two structures
This patch splits pin bank description into two structures, one
describing bank type (currently only bitfield widths), which can be
shared across multiple banks and second containing bank-specific
parameters including a pointer to a bank type struct.

It is a prerequisite for further patch removing the statically hardcoded
register offsets, making it impossible to support SoCs with different
set and order of pin control registers.

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-09 09:41:09 +02:00
Tomasz Figa
d5517bec27 pinctrl: samsung: Include pinctrl-exynos driver data conditionally
Since pinctrl-samsung is a common part of the pin control support for
several Samsung SoCs, it can be compiled without Exynos support enabled.

This patch surrounds Exynos-specific driver data with ifdefs to include
them only when support for Exynos is enabled.

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
[Fixed up EXYNOS4->EXYNOS]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-09 09:39:32 +02:00
Tomasz Figa
198469504a pinctrl: samsung: Protect bank registers with a spinlock
Certain pin control registers can be accessed from different contexts,
i.e. pinctrl, gpio and irq functions. This makes the locking provided by
pin control core insufficient.

This patch adds necessary locking using a per bank spinlock as it was
done in the old Samsung GPIO driver.

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-09 09:36:42 +02:00
Arnd Bergmann
dc2d3db813 Clean-up for omap2+ timers from Jon Hunter <jon-hunter@ti.com>:
This series consists mainly of clean-ups for clockevents and
 clocksource timers on OMAP2+ devices. The most significant change
 in functionality comes from the 5th patch which is changing the
 selection of the clocksource timer for OMAP3 and AM335x devices
 when gptimers are used for clocksource.
 
 Note that this series depends on 7185684 (ARM: OMAP: use
 consistent error checking) in RMK's tree and 960cba6 (ARM:
 OMAP5: timer: Update the clocksource name as per clock data)
 in omap-for-v3.10/fixes-non-critical. So this branch is based
 on a merge of 7185684 and omap-for-v3.10/fixes-non-critical
 to avoid non-trivial merge conflicts.
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Merge tag 'omap-for-v3.10/timer-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers

From Tony Lindgren <tony@atomide.com>:

Clean-up for omap2+ timers from Jon Hunter <jon-hunter@ti.com>:

This series consists mainly of clean-ups for clockevents and
clocksource timers on OMAP2+ devices. The most significant change
in functionality comes from the 5th patch which is changing the
selection of the clocksource timer for OMAP3 and AM335x devices
when gptimers are used for clocksource.

Note that this series depends on 7185684 (ARM: OMAP: use
consistent error checking) in RMK's tree and 960cba6 (ARM:
OMAP5: timer: Update the clocksource name as per clock data)
in omap-for-v3.10/fixes-non-critical. So this branch is based
on a merge of 7185684 and omap-for-v3.10/fixes-non-critical
to avoid non-trivial merge conflicts.

* tag 'omap-for-v3.10/timer-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP4+: Fix sparse warning in system timers
  ARM: OMAP2+: Store ID of system timers in timer structure
  ARM: OMAP3: Update clocksource timer selection
  ARM: OMAP2+: Simplify system timers definitions
  ARM: OMAP2+: Simplify system timer clock definitions
  ARM: OMAP2+: Remove hard-coded test on timer ID
  ARM: OMAP2+: Display correct system timer name
  ARM: OMAP2+: fix typo "CONFIG_BRIDGE_DVFS"
  ARM: OMAP1: remove "config MACH_OMAP_HTCWIZARD"
  ARM: OMAP: dpll: enable bypass clock only when attempting dpll bypass
  ARM: OMAP2+: powerdomain: avoid testing whether an unsigned char is less than 0
  ARM: OMAP2+: hwmod: Remove unused _HWMOD_WAKEUP_ENABLED flag
  ARM: OMAP2+: am335x: Change the wdt1 func clk src to per_32k clk
  ARM: OMAP2+: AM33xx: hwmod: Add missing sysc definition to wdt1 entry

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-08 19:30:48 +02:00
Arnd Bergmann
797b3a9ee7 Merge branch 'gic/cleanup' into next/soc2
Both zynq and shmobile have conflicts against the gic cleanup
series, resolved here.

Conflicts:
	arch/arm/mach-shmobile/smp-emev2.c
	arch/arm/mach-shmobile/smp-r8a7779.c
	arch/arm/mach-shmobile/smp-sh73a0.c
	arch/arm/mach-zynq/platsmp.c
	drivers/gpio/gpio-pl061.c

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-08 18:59:19 +02:00
Arnd Bergmann
e9069cf8b7 arm: vt8500: Add pinctrl driver for arch-vt8500
This series adds support for the pinctrl/gpio module on all arch-vt8500
 supported SoCs.
 
 As part of the review process, some tidy up is also done to
 drivers/of/base.c to remove some code that is being constantly duplicated.
 
 Also, a patch for the bcm2835 pinctrl driver is included to take advantage
 of the new of/base.c code.
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Merge tag 'vt8500/pinctrl' of git://server.prisktech.co.nz/git/linuxwmt into next/drivers

From Tony Prisk <linux@prisktech.co.nz>:

arm: vt8500: Add pinctrl driver for arch-vt8500

This series adds support for the pinctrl/gpio module on all arch-vt8500
supported SoCs.

As part of the review process, some tidy up is also done to
drivers/of/base.c to remove some code that is being constantly duplicated.

Also, a patch for the bcm2835 pinctrl driver is included to take advantage
of the new of/base.c code.

* tag 'vt8500/pinctrl' of git://server.prisktech.co.nz/git/linuxwmt: (606 commits)
  pinctrl: bcm2835: make use of of_property_read_u32_index()
  gpio: vt8500: Remove arch-vt8500 gpio driver
  arm: vt8500: Remove gpio devicetree nodes
  arm: dts: vt8500: Update Wondermedia SoC dtsi files for pinctrl driver
  pinctrl: gpio: vt8500: Add pincontrol driver for arch-vt8500
  arm: vt8500: Increase available GPIOs on arch-vt8500
  of: Remove duplicated code for validating property and value
  of: Add support for reading a u32 from a multi-value property.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-08 18:26:15 +02:00
Stephen Warren
ce63d6d4bb pinctrl: bcm2835: make use of of_property_read_u32_index()
Use the new standard API of_property_read_u32_index() instead of open-
coding it.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
2013-04-04 18:05:26 +13:00
Tony Prisk
170c6152ae pinctrl: gpio: vt8500: Add pincontrol driver for arch-vt8500
This patch adds support for the GPIO/pinmux controller found on the VIA
VT8500 and Wondermedia WM8xxx-series SoCs.

Each pin within the controller is capable of operating as a GPIO or as
an alternate function. The pins are numbered according to their control
bank/bit so that if new pins are added, the existing numbering is maintained.

All currently supported SoCs are included: VT8500, WM8505, WM8650, WM8750 and
WM8850.

Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-04 18:00:02 +13:00
Linus Walleij
6a7b3e9704 Linux 3.9-rc5
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Merge tag 'v3.9-rc5' into devel

Linux 3.9-rc5

Conflicts:
	drivers/pinctrl/pinconf.c
2013-04-03 22:18:36 +02:00
Patrice Chotard
661462f4c6 pinctrl/abx500: fix ab9540 alternate function
This fix allows to correctly select default and
alternate pin mode.

By default for all ABx500 family chip, pin default
mode is selected by clearing corresponding bit in
GPIOSELx register except for pins which support
alternate function, in this case, corresponding bit
must be set.

But, due to an unlogical hardware implementation,
for one particular pin (GPIO11) reverse setting
must be done. For that, update the alternate function
array by declaring that this pin supports alternate
function.
Same issue has been fixed in pinctrl-ab8505.c

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-03 22:15:14 +02:00
Linus Walleij
6282c02e2c pinctrl/pinconf: partial revert of pin config debugfs
I accidentally left this patch:

commit 6f9e41f4e6
"pinctrl/pinconfig: add debug interface"

in the tree though the patch was not yet finished.
Revert it partially (we need the infrastructural changes).

Cc: Laurent Meunier <laurent.meunier@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-03 21:59:45 +02:00
Gabriel Fernandez
356d3e4562 pinctrl/nomadik: add device tree bindings for db8540
This adds a simple device tree binding for db8540 boards.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@stericsson.com>
Reviewed-by: Philippe Langlais <philippe.langlais@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-03 19:21:05 +02:00
Richard Genoud
385d94246b pinctrl: simplify the re-enable old state code in pinctrl_select_state
Instead of just enabling the settings that were disabled in the 1st
loop, it's simpler to recall pinctrl_select_state with the old state.

Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-03 14:38:27 +02:00
Richard Genoud
af60617771 pinctrl: select_state: don't call pinctrl_free_setting on error
As Stephen Warren pointed out, pinctrl_free_setting() was called instead
of pinmux_disable_setting() on error.
In this error code, we want to call pinmux_disable_setting() where
pinmux_enable_setting() was called.
And when pinconf_apply_setting() was called, we can't do much to undo
the pin muxing (the closest thing I can think about for "unmuxing" a pin
is muxing it as GPIO input).

Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-03 14:36:43 +02:00
Axel Lin
28d0c14b43 pinctrl: coh901: Fix error checking in u300_gpio_to_irq
The pointer "port" is always not NULL if gpio->port_list is not empty.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-03 14:31:19 +02:00
Richard Genoud
175ca83c0b pinctrl: pinctrl_select_state: set the old_state back on error
In unapply_new_state, the old state is re-applied, but p->state is not
set back as it should.

Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-03 14:27:31 +02:00
Richard Genoud
8009d5ff00 pinctrl: remove superfluous optimization in pinctrl_select_state_locked
As Stephen Warren suggested, checking first if the setting->node entry
is the first in the list or not is superfluous, as it is checked again
in the list_for_each_entry bellow.
So, remove it, the code will be simpler and lighter !

Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-03 14:22:39 +02:00
Richard Genoud
da58751ca2 pinctrl: use dev_info instead of pr_info in pinctrl_select_state_locked
And remove superfluous brackets.

Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-03 14:20:37 +02:00
Emilio López
950707c0eb pinctrl: sunxi: add clock support
For the port controller to work, we need to enable the apb0_pio gate.
This commit adds the ability to enable one clock specified on the device
tree to the pinctrl driver.

Signed-off-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-03 13:58:38 +02:00
Haojian Zhuang
2afe822968 pinctrl: core: add dependence of GPIOLIB
In file included from drivers/pinctrl/core.c:30:0:
include/asm-generic/gpio.h: In function 'gpio_get_value_cansleep':
include/asm-generic/gpio.h:270:2: error: implicit declaration of
function '__gpio_get_value' [-Werror=implicit-function-declaration]
include/asm-generic/gpio.h: In function 'gpio_set_value_cansleep':
include/asm-generic/gpio.h:276:2: error: implicit declaration of
function '__gpio_set_value' [-Werror=implicit-function-declaration]
drivers/pinctrl/core.c: In function 'pinctrl_ready_for_gpio_range':
drivers/pinctrl/core.c:297:9: error: implicit declaration of function
'gpio_to_chip' [-Werror=implicit-function-declaration]
drivers/pinctrl/core.c:297:27: warning: initialization makes pointer
from integer without a cast [enabled by default]
drivers/pinctrl/core.c:304:45: error: dereferencing pointer to
incomplete type
drivers/pinctrl/core.c:305:26: error: dereferencing pointer to
incomplete type
drivers/pinctrl/core.c:305:39: error: dereferencing pointer to
incomplete type
cc1: some warnings being treated as errors
make[2]: *** [drivers/pinctrl/core.o] Error 1
make[1]: *** [drivers/pinctrl] Error 2
make[1]: *** Waiting for unfinished jobs....

It's caused by CONFIG_GPIOLIB isn't enabled for some platform. So
add the dependence on pinctrl_ready_for_gpio_range().

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-03 13:48:33 +02:00
Patrice Chotard
a36571b59e pinctrl/abx500: fix ab8505 alternate function
This fix allows to correctly select default and
alternate pin mode.

By default for all ABx500 family chip, pin default
mode is selected by clearing corresponding bit in
GPIOSELx register except for pins which support
alternate function, in this case, corresponding bit
must be set.

But, due to an unlogical hardware implementation,
for one particular pin (GPIO11) reverse setting
must be done. For that, update the alternate function
array by declaring that this pin supports alternate
function.

Reported-by: Ramesh Chandrasekaran <ramesh.chandrasekaran@stericsson.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-03 11:23:13 +02:00
Olof Johansson
16eaaee4d8 Third round of Renesas ARM SoC board updates for v3.10
Highlights:
 
 * Add Lager board support
 * Add ape6evm board support
 * Add Bock-W board support
 * Mackerel MMCIF/SDHI clean ups
 * Add ethernet support to kzm9g-reference
 
 This pull request is based on a merge of:
 
 git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-pinmux2-for-v3.10
 git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-boards2-for-v3.10
 
 The merge with renesas-pinmux2-for-v3.10 was made to provide
 run-time dependencies for the following changes:
 
 ARM: shmobile: APE6EVM LAN9220 support
 ARM: shmobile: APE6EVM PFC support
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Merge tag 'renesas-boards3-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/boards2

Third round of  Renesas ARM SoC board updates for v3.10

Highlights:

* Add Lager board support
* Add ape6evm board support
* Add Bock-W board support
* Mackerel MMCIF/SDHI clean ups
* Add ethernet support to kzm9g-reference

This pull request is based on a merge of:

git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-pinmux2-for-v3.10
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-boards2-for-v3.10

The merge with renesas-pinmux2-for-v3.10 was made to provide
run-time dependencies for the following changes:

ARM: shmobile: APE6EVM LAN9220 support
ARM: shmobile: APE6EVM PFC support

* tag 'renesas-boards3-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (307 commits)
  ARM: shmobile: mackerel: clean up MMCIF vs. SDHI1 selection
  ARM: shmobile: mackerel: add interrupt names for SDHI0
  ARM: shmobile: mackerel: switch SDHI and MMCIF interfaces to slot-gpio
  ARM: shmobile: mackerel: remove OCR masks, where regulators are used
  ARM: shmobile: mackerel: SDHI resources do not have to be numbered
  ARM: shmobile: Initial r8a7790 Lager board support
  ARM: shmobile: APE6EVM LAN9220 support
  ARM: shmobile: APE6EVM PFC support
  ARM: shmobile: APE6EVM base support
  ARM: shmobile: kzm9g-reference: add ethernet support
  ARM: shmobile: add R-Car M1A Bock-W platform support
  sh-pfc: r8a73a4: Remove unused GPIO bias data
  ARM: shmobile: r8a73a4: Remove all GPIO enums
  sh-pfc: r8a73a4: Remove function GPIOs
  ARM: shmobile: r8a73a4: Remove IRQC function GPIOs
  ARM: shmobile: r8a73a4: Remove SCIF function GPIOs
  sh-pfc: r8a73a4: Remove IRQC function GPIOS
  sh-pfc: r8a73a4: Remove SCIF function GPIOS
  sh-pfc: r8a73a4: Add IRQC pin groups and functions
  sh-pfc: r8a73a4: Add SCIF pin groups and functions
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-02 23:27:51 -07:00
Olof Johansson
e382328a81 Second round of Renesas ARM and SH based SoC pinmux updates for v3.10
Highlights:
 
 * Compilation fixes for sh7269 and for when CONFIG_BUG is not set
 * sh-pfc Support for r8a73a4 SoC
 * Move GPIOs handling from the PFC device to separate GPIO devices on the r8a7779 SoC
 
 This pull request is based on a merge of:
 git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-pinmux-for-v3.10
 git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-soc2-for-v3.10
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Merge tag 'renesas-pinmux2-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc2

Second round of Renesas ARM and SH based SoC pinmux updates for v3.10

Highlights:

* Compilation fixes for sh7269 and for when CONFIG_BUG is not set
* sh-pfc Support for r8a73a4 SoC
* Move GPIOs handling from the PFC device to separate GPIO devices on the r8a7779 SoC

This pull request is based on a merge of:
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-pinmux-for-v3.10
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-soc2-for-v3.10

* tag 'renesas-pinmux2-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (185 commits)
  sh-pfc: r8a73a4: Remove unused GPIO bias data
  ARM: shmobile: r8a73a4: Remove all GPIO enums
  sh-pfc: r8a73a4: Remove function GPIOs
  ARM: shmobile: r8a73a4: Remove IRQC function GPIOs
  ARM: shmobile: r8a73a4: Remove SCIF function GPIOs
  sh-pfc: r8a73a4: Remove IRQC function GPIOS
  sh-pfc: r8a73a4: Remove SCIF function GPIOS
  sh-pfc: r8a73a4: Add IRQC pin groups and functions
  sh-pfc: r8a73a4: Add SCIF pin groups and functions
  sh-pfc: r8a73a4: Add bias (pull-up/down) pinconf support
  sh-pfc: r8a73a4: GPIO IRQ support
  sh-pfc: r8a73a4: Support sparse GPIO numbers
  sh-pfc: Add r8a73a4 pinmux support
  sh-pfc: r8a7779: Split DU input and output pixel clocks
  sh-pfc: r8a7779: Remove GPIO data
  ARM: shmobile: r8a7779: Register GPIO devices
  sh-pfc: Configure pins as GPIOs at request time when handled externally
  sh-pfc: Skip gpiochip registration when no GPIO resource is found
  sh-pfc: Make GPIO support optional
  sh-pfc: Make function GPIOs support optional
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-02 23:06:57 -07:00
Olof Johansson
2f7053e0ec Second round of Renesas ARM SoC updates for v3.10
Some Highlights:
 
 * Add r8a7790 SoC
 * Add r8a73a4 SoC
 * Migrate r8a7740 SoC from INTC to GIC
 * Add thermal driver support to r8a73a4 SoC
 * Add irqpin DT nodes to sh73a0 SoC
 * Add SCIF support to r8a7778 SoC
 
 This pull request is based on a merge of:
 git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-soc-for-v3.10
 git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-intc-external-irq2-for-v3.10
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Merge tag 'renesas-soc2-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc2

Second round of Renesas ARM SoC updates for v3.10

Some Highlights:

* Add r8a7790 SoC
* Add r8a73a4 SoC
* Migrate r8a7740 SoC from INTC to GIC
* Add thermal driver support to r8a73a4 SoC
* Add irqpin DT nodes to sh73a0 SoC
* Add SCIF support to r8a7778 SoC

This pull request is based on a merge of:
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-soc-for-v3.10
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-intc-external-irq2-for-v3.10

* tag 'renesas-soc2-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (88 commits)
  ARM: shmobile: r8a7790 SoC 64-bit DT support
  ARM: shmobile: r8a73a4 SoC 64-bit DT support
  ARM: shmobile: r8a7790 PFC support
  ARM: shmobile: r8a7790 IRQC support
  ARM: shmobile: r8a7790 SCIF support
  ARM: shmobile: Initial r8a7790 SoC support
  ARM: shmobile: r8a7779: move global functions to r8a7779.h
  ARM: shmobile: r8a7740: move global functions to r8a7740.h
  ARM: shmobile: sh73a0: move global functions to sh73a0.h
  ARM: shmobile: sh7372: move global functions to sh7372.h
  ARM: shmobile: r8a7779: remove DIV4 clocks and use fixed ratio clock
  ARM: shmobile: r8a7740: use fixed ratio clock
  ARM: shmobile: r8a7740: tidyup comment/implementation mismatch
  ARM: shmobile: sh73a0: use fixed ratio clock
  ARM: shmobile: sh7372: use fixed ratio clock
  ARM: shmobile: add struct clk_ratio and fixed ratio clock macro
  ARM: shmobile: sh7372: remove DIV4_ZT* clocks
  ARM: shmobile: sh73a0: remove DIV4_ZT* clocks
  ARM: shmobile: sh73a0: add a TWD clock
  ARM: shmobile: r8a7740: Migrate from INTC to GIC
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-02 22:49:03 -07:00
Magnus Damm
202ac6a21a sh-pfc: r8a73a4: Remove unused GPIO bias data
Remove unused pull-up/down data from the r8a73a4 PFC code.

Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03 10:30:43 +09:00
Magnus Damm
3e36ab671c sh-pfc: r8a73a4: Remove function GPIOs
All r8a73a4 platforms use the pinctrl API to control pin functions.
Function GPIOs are no longer needed.

Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03 10:30:42 +09:00
Magnus Damm
f91663ff56 sh-pfc: r8a73a4: Remove IRQC function GPIOS
The r8a73a4 board support will use the pinctrl API to control the
external IRQ pins so remove the unused function GPIOS.

Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03 10:30:41 +09:00
Magnus Damm
504e584aa1 sh-pfc: r8a73a4: Remove SCIF function GPIOS
The r8a73a4 board support will use the pinctrl API to control the SCIF
pins, remove the corresponding unused function GPIOS.

Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03 10:30:41 +09:00
Magnus Damm
515a828f77 sh-pfc: r8a73a4: Add IRQC pin groups and functions
V2 of PINCTRL support for r8a73a4 IRQC hardware
and in particular the external pins IRQ0 -> IRQ57.

Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03 10:30:40 +09:00
Magnus Damm
172fd616dd sh-pfc: r8a73a4: Add SCIF pin groups and functions
Add PINCTRL support for r8a73a4 SCIF ports SCIFA0->SCIFA1 and
SCIFB0->SCIFB3.

Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03 10:30:40 +09:00
Magnus Damm
57ef73b469 sh-pfc: r8a73a4: Add bias (pull-up/down) pinconf support
Implement pull-up/down support for r8a73a4 similar to the implementation
for sh73a0.

Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03 10:30:39 +09:00
Magnus Damm
c96931ca88 sh-pfc: r8a73a4: GPIO IRQ support
V2 of code to add GPIO -> IRQ mappings to the
PFC table for the r8a73a4 SoC. Requires the IRQs
to be mapped at a fixed location in Linux IRQ
space. The actual IRQs are not handled by the
PFC, instead IRQC is used on r8a73a4.

Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03 10:30:39 +09:00
Magnus Damm
f365bfcc87 sh-pfc: r8a73a4: Support sparse GPIO numbers
The r8a73a4 SoC has sparse GPIO numbers. Declare ranges for pin numbers
in the PFC SoC data. Pin numbers shall be used with the GPIO API from
this point on.

Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03 10:30:38 +09:00
Magnus Damm
c98f6c21af sh-pfc: Add r8a73a4 pinmux support
Add initial PFC support for the r8a73a4 SoC.

At this point only GPIO interface is supported, move to newer interfaces
planned as incremental changes.

Original authors are Morimoto-san with help from Yoshii-san, thanks to
them for the heavy lifting. Adjusted by Magnus to work together with
updated code in drivers/pinctrl.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Takashi Yoshii <takashi.yoshii.zj@renesas.com>
Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03 10:30:38 +09:00
Laurent Pinchart
ba774cc738 sh-pfc: r8a7779: Split DU input and output pixel clocks
The output pixel clocks can be used without the input pixel clocks.
Split them in different groups.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03 10:30:37 +09:00
Laurent Pinchart
2b4b588299 sh-pfc: r8a7779: Remove GPIO data
GPIOs are now handled by a separate driver, remove GPIO data from the
SoC information structure.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03 10:30:37 +09:00
Laurent Pinchart
e3c470510b sh-pfc: Configure pins as GPIOs at request time when handled externally
When a GPIO is handled by a separate driver the pinmux
gpio_set_direction() handler won't be called. The pin mux type then need
to be configured to GPIO at request time.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03 10:30:36 +09:00
Laurent Pinchart
ceef91dcc0 sh-pfc: Skip gpiochip registration when no GPIO resource is found
Boards/platforms that register dedicated GPIO devices will not supply a
memory resource for GPIOs. Try to locate the GPIO memory resource at
initialization time, and skip registration of the gpiochip if the
resource can't be found.

This is a temporary modification to ease the transition to separate GPIO
drivers. It should be reverted when all boards and platforms will have
been moved.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03 10:30:36 +09:00
Laurent Pinchart
1a4fd58f76 sh-pfc: Make GPIO support optional
When implemented as a separate IP block, GPIOs should be handled by a
separate driver. To make this possible GPIO support needs to be optional
in the sh-pfc driver.

If no GPIO data registers are supplied in the SoC information structure
skip registration of the gpiochip.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03 10:30:35 +09:00
Laurent Pinchart
542a564d2d sh-pfc: Make function GPIOs support optional
The target is to get rid of function GPIOs completely. To reach this,
make function GPIOs support optional by skipping the function GPIO chip
registration if no function GPIOS are defined in SoC data.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03 10:30:35 +09:00
Laurent Pinchart
7417dae521 sh-pfc: r8a7779: Don't use GPIO enum entries
Refactor the GPIO macro magic to use GPIO numbers directly instead of
the GPIO_GP_x_y enum entries. This will allow removing the GPIO enum
entries from the mach/r8a7779.h header.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-02 11:09:45 +09:00
Laurent Pinchart
c09b51d5de sh-pfc: r8a7779: Remove function GPIOs
All r8a7779 platforms use the pinctrl API to control functions. Function
GPIOs are unused and unneeded, remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-02 11:09:45 +09:00
Laurent Pinchart
1960d58003 sh-pfc: Fix compiler warning when BUG()
The sh_pfc_phys_to_virt() function ends with a BUG() statement without a
return. When CONFIG_BUG isn't set the function will thus have no return
value. Fix it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-02 11:09:45 +09:00
Simon Horman
809609a5d8 Merge branch 'soc' into pinmux-base
Conflicts:
	drivers/pinctrl/sh-pfc/pfc-r8a7740.c

This merge is to provide r8a73a4 SoC files, which are added in the
soc branch and depended on by r8a73a4 pfc-changes which are to
be added to the pinmux branch.
2013-04-02 11:08:34 +09:00
Bastian Hecht
0b7d782022 ARM: shmobile: r8a7740: Migrate from INTC to GIC
With the added capabilty of the intc_irqpin driver to handle shared
external IRQs, all prerequisites are fulfilled and we are ready to
migrate completely to GIC. This includes the following steps:

- Kconfig:	select ARM_GIC and RENESAS_INTC_IRQPIN
- intc-r8a7740: Throw out all legacy INTC code and init the GIC. We need
  		to mask out all shared IRQs as it is needed by the
		shared intc_irqpin driver.
- setup-r8a7740: Add 4 irqpin devices to handle external IRQs and update
		all IRQ numbers to point to the GIC SPI.
- board-armadillo: Update all IRQ numbers to point to the GIC SPI.
- pfc-r8a7740:	Update all IRQ numbers of the GPIOs to point to the GIC
		SPI.

Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-02 11:02:09 +09:00
David Woodhouse
aaed651ff6 pinctrl: mvebu: prevent walking off the end of group array
While investigating (ab)use of krealloc, David found this bug.  It's
unlikely to occur, but now we detect the condition and error out
appropriately.

Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27 23:36:17 +01:00
Richard Genoud
50cf7c8ab3 pinctrl: re-enable old state in case of error in pinctrl_select_state
If a new state is applied, the groups configured in the old state but
not in the new state are disabled.
If something goes wrong and the new state can't be applied, we have to
re-enable those groups.

Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27 23:18:28 +01:00
Richard Genoud
3102a76cfb pinctrl: disable and free setting in select_state in case of error
If enabling a pin fails in pinctrl_select_state_locked(), all the
previous enabled pins have to be disabled to get back to the previous
state.

Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27 23:17:12 +01:00
Richard Genoud
d3cee8305b pinctrl: create pinctrl_free_setting function
This prepares the implementation of pinctrl_select_state_locked() free code.

No functionnal change.

Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27 23:14:52 +01:00
Richard Genoud
2c9abf808a pinctrl: fix typo in header
Clearly, "node" was meant instead of "not"

Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27 23:12:48 +01:00
Wei Yongjun
3dcbd6f578 pinctrl: sirf: using for_each_set_bit to simplify the code
Using for_each_set_bit() to simplify the code.

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Acked-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27 22:57:14 +01:00
Sachin Kamat
8b0ef2580f pinctrl: coh901: Fix checkpatch error
Fixes the following checkpatch error:
ERROR: space required before the open parenthesis '('

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27 22:50:01 +01:00
Sachin Kamat
b6465424a6 pinctrl: generic: Fix checkpatch errors
Fixes the following type of checkpatch errors:
ERROR: space required before the open parenthesis '('

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27 22:49:13 +01:00
Sachin Kamat
1ef465c059 pinctrl: generic: Make 'conf_items' static
'conf_items' is used only in this file. Silences the below
sparse warning:
drivers/pinctrl/pinconf-generic.c:37:24: warning:
symbol 'conf_items' was not declared. Should it be static?

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27 22:48:08 +01:00
Sachin Kamat
3c93600d3e pinctrl: at91: Fix checkpatch errors
Fixes the following types of checkpatch errors:
ERROR: "foo * bar" should be "foo *bar"
ERROR: "foo* bar" should be "foo *bar"
ERROR: space required before the open parenthesis '('
ERROR: "(foo*)" should be "(foo *)"
ERROR: space required after that ',' (ctx:WxV)
ERROR: "(foo*const*)" should be "(foo *const*)"
ERROR: space required before that '*' (ctx:VxB)

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27 22:47:12 +01:00
Sachin Kamat
1164d73a98 pinctrl: at91: Remove duplicate const
const declared twice. Fixes the following sparse warning:
drivers/pinctrl/pinctrl-at91.c:815:21: warning: duplicate const
drivers/pinctrl/pinctrl-at91.c:849:21: warning: duplicate const

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27 22:46:18 +01:00