Commit Graph

88 Commits

Author SHA1 Message Date
Drew Fustini
25fae75215 pinctrl: single: fix function name in documentation
Use the correct the function name in the documentation for
"pcs_parse_one_pinctrl_entry()".

"smux_parse_one_pinctrl_entry()" appears to be an artifact from the
development of a prior patch series ("simple pinmux driver") which
transformed into pinctrl-single.

Signed-off-by: Drew Fustini <drew@beagleboard.org>
Link: https://lore.kernel.org/r/20200612112758.GA3407886@x1
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-06-20 22:41:32 +02:00
Rob Herring
94f4e54cec pinctrl: Convert to using %pOFn instead of device_node.name
In preparation to remove the node name pointer from struct device_node,
convert printf users to use the %pOFn format specifier.

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Stefan Agner <stefan@agner.ch>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Sean Wang <sean.wang@mediatek.com>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: Carlo Caione <carlo@caione.org>
Cc: Kevin Hilman <khilman@baylibre.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <gregory.clement@bootlin.com>
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Haojian Zhuang <haojian.zhuang@linaro.org>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Barry Song <baohua@kernel.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Ripard <maxime.ripard@bootlin.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: linux-gpio@vger.kernel.org
Cc: linux-mediatek@lists.infradead.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-amlogic@lists.infradead.org
Cc: linux-rockchip@lists.infradead.org
Cc: linux-omap@vger.kernel.org
Acked-by: Dong Aisheng <aisheng.dong@nxp.com>
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Sean Wang <sean.wang@mediatek.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-08-29 14:05:36 +02:00
Linus Torvalds
c6ed444fd6 This is the bulk of pin control changes for v4.19:
Core changes:
 
 - Augment pinctrl_generic_add_group() and pinmux_generic_add_function()
   to return the selector for the added group/function to the caller
   and augment (hopefully) all drivers to handle this.
 
 New subdrivers:
 
 - Qualcomm PM8998 and PM8005 are supported in the SPMI pin
   control and GPIO driver.
 
 - Intel Ice Lake PCH (platform controller hub) support.
 
 - NXP (ex Freescale) i.MX8MQ support.
 
 - Berlin AS370 support.
 
 Improvements to drivers:
 
 - Support interrupts on the Ocelot pin controller.
 
 - Add SPI pins to the Uniphier driver.
 
 - Define a GPIO compatible per SoC in the Tegra driver.
 
 - Push Tegra initialization down in the initlevels.
 
 - Support external wakeup interrupts on the Exynos.
 
 - Add generic clocks pins to the meson driver.
 
 - Add USB and HSCIF pins for some Renesas PFC chips.
 
 - Suspend/resume support in the armada-37xx.
 
 - Interrupt support for the Actions Semiconductor S900 also
   known as "owl".
 
 - Correct the pin ordering in Cedarfork.
 
 - Debugfs output for INTF in the mcp23s08 driver
 
 - Avoid divisions in context save/restore in pinctrl-single.
 
 The rest is minor bug fixes or cleanups.
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Merge tag 'pinctrl-v4.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes for v4.19:

  Core changes:

   - Augment pinctrl_generic_add_group() and pinmux_generic_add_function()
     to return the selector for the added group/function to the caller
     and augment (hopefully) all drivers to handle this

  New subdrivers:

   - Qualcomm PM8998 and PM8005 are supported in the SPMI pin control
     and GPIO driver

   - Intel Ice Lake PCH (platform controller hub) support

   - NXP (ex Freescale) i.MX8MQ support

   - Berlin AS370 support

  Improvements to drivers:

   - Support interrupts on the Ocelot pin controller

   - Add SPI pins to the Uniphier driver

   - Define a GPIO compatible per SoC in the Tegra driver

   - Push Tegra initialization down in the initlevels

   - Support external wakeup interrupts on the Exynos

   - Add generic clocks pins to the meson driver

   - Add USB and HSCIF pins for some Renesas PFC chips

   - Suspend/resume support in the armada-37xx

   - Interrupt support for the Actions Semiconductor S900 also known as
     "owl"

   - Correct the pin ordering in Cedarfork

   - Debugfs output for INTF in the mcp23s08 driver

   - Avoid divisions in context save/restore in pinctrl-single

  The rest is minor bug fixes or cleanups"

* tag 'pinctrl-v4.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (69 commits)
  pinctrl: nomadik: silence uninitialized variable warning
  pinctrl: axp209: Fix NULL pointer dereference after allocation
  pinctrl: samsung: Remove duplicated "wakeup" in printk
  pinctrl: ocelot: add support for interrupt controller
  pinctrl: intel: Don't shadow error code of gpiochip_lock_as_irq()
  pinctrl: berlin: fix 'pctrl->functions' allocation in berlin_pinctrl_build_state
  gpio: tegra: Move driver registration to subsys_init level
  pinctrl: tegra: Move drivers registration to arch_init level
  pinctrl: baytrail: actually print the apparently misconfigured pin
  MAINTAINERS: Replace Heikki as maintainer of Intel pinctrl
  pinctrl: freescale: off by one in imx1_pinconf_group_dbg_show()
  pinctrl: uniphier: add spi pin-mux settings
  pinctrl: cannonlake: Fix community ordering for H variant
  pinctrl: tegra: define GPIO compatible node per SoC
  pinctrl: intel: Do pin translation when lock IRQ
  pinctrl: imx: off by one in imx_pinconf_group_dbg_show()
  pinctrl: mediatek: include chained_irq.h header
  pinctrl/amd: only handle irq if it is pending and unmasked
  pinctrl/amd: fix gpio irq level in debugfs
  pinctrl: stm32: add syscfg mask parameter
  ...
2018-08-14 12:31:27 -07:00
Wei Yongjun
673ba5a05c pinctrl: single: Fix missing unlock on error path
Add the missing unlock before return from function
in the error handling case.

Fixes: 0f5972033509 ("pinctrl: single: Fix group and function selector use")
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-07-17 10:50:05 +02:00
Tony Lindgren
a4ab108607 pinctrl: single: Fix group and function selector use
We must use a mutex around the generic_add functions and save the
function and group selector in case we need to remove them. Otherwise
the selector use will be racy for deferred probe at least.

Note that struct device_node *np is unused in pcs_add_function() we
remove that too and fix a checkpatch warning for bare unsigned while
at it.

Fixes: 571aec4df5 ("pinctrl: single: Use generic pinmux helpers for
managing functions")
Reported-by: H. Nikolaus Schaller <hns@goldelico.com>
Cc: Christ van Willegen <cvwillegen@gmail.com>
Cc: Haojian Zhuang <haojian.zhuang@linaro.org>
Cc: Jacopo Mondi <jacopo+renesas@jmondi.org>
Cc: Paul Cercueil <paul@crapouillou.net>
Cc: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tested-By: H. Nikolaus Schaller <hns@goldelico.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-07-17 10:49:10 +02:00
Geert Uytterhoeven
7d71b5f4b2 pinctrl: pinctrl-single: Avoid divisions in context save/restore
The divisions (and multiplications) can be avoided by changing the loops
to use increments of mux_bytes instead of 1.
While at it, remove the unneeded casts when assigning void pointers.

This saves +100 bytes of kernel size on arm32/arm64.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Tony Lindgren <tony@atomide.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-06-18 07:56:05 +02:00
Colin Ian King
7f57871f39 pinctrl: single: Add allocation failure checking of saved_vals
Currently saved_vals is being allocated and there is no check for
failed allocation (which is more likely than normal when using
GFP_ATOMIC).  Fix this by checking for a failed allocation and
propagating this error return down the the caller chain.

Detected by CoverityScan, CID#1469841 ("Dereference null return value")
Fixes: 88a1dbdec6 ("pinctrl: pinctrl-single: Add functions to save and restore pinctrl context")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Reviewed-by: Johan Hovold <johan@kernel.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-06-18 07:55:56 +02:00
Kees Cook
a86854d0c5 treewide: devm_kzalloc() -> devm_kcalloc()
The devm_kzalloc() function has a 2-factor argument form, devm_kcalloc().
This patch replaces cases of:

        devm_kzalloc(handle, a * b, gfp)

with:
        devm_kcalloc(handle, a * b, gfp)

as well as handling cases of:

        devm_kzalloc(handle, a * b * c, gfp)

with:

        devm_kzalloc(handle, array3_size(a, b, c), gfp)

as it's slightly less ugly than:

        devm_kcalloc(handle, array_size(a, b), c, gfp)

This does, however, attempt to ignore constant size factors like:

        devm_kzalloc(handle, 4 * 1024, gfp)

though any constants defined via macros get caught up in the conversion.

Any factors with a sizeof() of "unsigned char", "char", and "u8" were
dropped, since they're redundant.

Some manual whitespace fixes were needed in this patch, as Coccinelle
really liked to write "=devm_kcalloc..." instead of "= devm_kcalloc...".

The Coccinelle script used for this was:

// Fix redundant parens around sizeof().
@@
expression HANDLE;
type TYPE;
expression THING, E;
@@

(
  devm_kzalloc(HANDLE,
-	(sizeof(TYPE)) * E
+	sizeof(TYPE) * E
  , ...)
|
  devm_kzalloc(HANDLE,
-	(sizeof(THING)) * E
+	sizeof(THING) * E
  , ...)
)

// Drop single-byte sizes and redundant parens.
@@
expression HANDLE;
expression COUNT;
typedef u8;
typedef __u8;
@@

(
  devm_kzalloc(HANDLE,
-	sizeof(u8) * (COUNT)
+	COUNT
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(__u8) * (COUNT)
+	COUNT
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(char) * (COUNT)
+	COUNT
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(unsigned char) * (COUNT)
+	COUNT
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(u8) * COUNT
+	COUNT
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(__u8) * COUNT
+	COUNT
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(char) * COUNT
+	COUNT
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(unsigned char) * COUNT
+	COUNT
  , ...)
)

// 2-factor product with sizeof(type/expression) and identifier or constant.
@@
expression HANDLE;
type TYPE;
expression THING;
identifier COUNT_ID;
constant COUNT_CONST;
@@

(
- devm_kzalloc
+ devm_kcalloc
  (HANDLE,
-	sizeof(TYPE) * (COUNT_ID)
+	COUNT_ID, sizeof(TYPE)
  , ...)
|
- devm_kzalloc
+ devm_kcalloc
  (HANDLE,
-	sizeof(TYPE) * COUNT_ID
+	COUNT_ID, sizeof(TYPE)
  , ...)
|
- devm_kzalloc
+ devm_kcalloc
  (HANDLE,
-	sizeof(TYPE) * (COUNT_CONST)
+	COUNT_CONST, sizeof(TYPE)
  , ...)
|
- devm_kzalloc
+ devm_kcalloc
  (HANDLE,
-	sizeof(TYPE) * COUNT_CONST
+	COUNT_CONST, sizeof(TYPE)
  , ...)
|
- devm_kzalloc
+ devm_kcalloc
  (HANDLE,
-	sizeof(THING) * (COUNT_ID)
+	COUNT_ID, sizeof(THING)
  , ...)
|
- devm_kzalloc
+ devm_kcalloc
  (HANDLE,
-	sizeof(THING) * COUNT_ID
+	COUNT_ID, sizeof(THING)
  , ...)
|
- devm_kzalloc
+ devm_kcalloc
  (HANDLE,
-	sizeof(THING) * (COUNT_CONST)
+	COUNT_CONST, sizeof(THING)
  , ...)
|
- devm_kzalloc
+ devm_kcalloc
  (HANDLE,
-	sizeof(THING) * COUNT_CONST
+	COUNT_CONST, sizeof(THING)
  , ...)
)

// 2-factor product, only identifiers.
@@
expression HANDLE;
identifier SIZE, COUNT;
@@

- devm_kzalloc
+ devm_kcalloc
  (HANDLE,
-	SIZE * COUNT
+	COUNT, SIZE
  , ...)

// 3-factor product with 1 sizeof(type) or sizeof(expression), with
// redundant parens removed.
@@
expression HANDLE;
expression THING;
identifier STRIDE, COUNT;
type TYPE;
@@

(
  devm_kzalloc(HANDLE,
-	sizeof(TYPE) * (COUNT) * (STRIDE)
+	array3_size(COUNT, STRIDE, sizeof(TYPE))
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(TYPE) * (COUNT) * STRIDE
+	array3_size(COUNT, STRIDE, sizeof(TYPE))
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(TYPE) * COUNT * (STRIDE)
+	array3_size(COUNT, STRIDE, sizeof(TYPE))
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(TYPE) * COUNT * STRIDE
+	array3_size(COUNT, STRIDE, sizeof(TYPE))
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(THING) * (COUNT) * (STRIDE)
+	array3_size(COUNT, STRIDE, sizeof(THING))
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(THING) * (COUNT) * STRIDE
+	array3_size(COUNT, STRIDE, sizeof(THING))
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(THING) * COUNT * (STRIDE)
+	array3_size(COUNT, STRIDE, sizeof(THING))
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(THING) * COUNT * STRIDE
+	array3_size(COUNT, STRIDE, sizeof(THING))
  , ...)
)

// 3-factor product with 2 sizeof(variable), with redundant parens removed.
@@
expression HANDLE;
expression THING1, THING2;
identifier COUNT;
type TYPE1, TYPE2;
@@

(
  devm_kzalloc(HANDLE,
-	sizeof(TYPE1) * sizeof(TYPE2) * COUNT
+	array3_size(COUNT, sizeof(TYPE1), sizeof(TYPE2))
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(TYPE1) * sizeof(THING2) * (COUNT)
+	array3_size(COUNT, sizeof(TYPE1), sizeof(TYPE2))
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(THING1) * sizeof(THING2) * COUNT
+	array3_size(COUNT, sizeof(THING1), sizeof(THING2))
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(THING1) * sizeof(THING2) * (COUNT)
+	array3_size(COUNT, sizeof(THING1), sizeof(THING2))
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(TYPE1) * sizeof(THING2) * COUNT
+	array3_size(COUNT, sizeof(TYPE1), sizeof(THING2))
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(TYPE1) * sizeof(THING2) * (COUNT)
+	array3_size(COUNT, sizeof(TYPE1), sizeof(THING2))
  , ...)
)

// 3-factor product, only identifiers, with redundant parens removed.
@@
expression HANDLE;
identifier STRIDE, SIZE, COUNT;
@@

(
  devm_kzalloc(HANDLE,
-	(COUNT) * STRIDE * SIZE
+	array3_size(COUNT, STRIDE, SIZE)
  , ...)
|
  devm_kzalloc(HANDLE,
-	COUNT * (STRIDE) * SIZE
+	array3_size(COUNT, STRIDE, SIZE)
  , ...)
|
  devm_kzalloc(HANDLE,
-	COUNT * STRIDE * (SIZE)
+	array3_size(COUNT, STRIDE, SIZE)
  , ...)
|
  devm_kzalloc(HANDLE,
-	(COUNT) * (STRIDE) * SIZE
+	array3_size(COUNT, STRIDE, SIZE)
  , ...)
|
  devm_kzalloc(HANDLE,
-	COUNT * (STRIDE) * (SIZE)
+	array3_size(COUNT, STRIDE, SIZE)
  , ...)
|
  devm_kzalloc(HANDLE,
-	(COUNT) * STRIDE * (SIZE)
+	array3_size(COUNT, STRIDE, SIZE)
  , ...)
|
  devm_kzalloc(HANDLE,
-	(COUNT) * (STRIDE) * (SIZE)
+	array3_size(COUNT, STRIDE, SIZE)
  , ...)
|
  devm_kzalloc(HANDLE,
-	COUNT * STRIDE * SIZE
+	array3_size(COUNT, STRIDE, SIZE)
  , ...)
)

// Any remaining multi-factor products, first at least 3-factor products,
// when they're not all constants...
@@
expression HANDLE;
expression E1, E2, E3;
constant C1, C2, C3;
@@

(
  devm_kzalloc(HANDLE, C1 * C2 * C3, ...)
|
  devm_kzalloc(HANDLE,
-	(E1) * E2 * E3
+	array3_size(E1, E2, E3)
  , ...)
|
  devm_kzalloc(HANDLE,
-	(E1) * (E2) * E3
+	array3_size(E1, E2, E3)
  , ...)
|
  devm_kzalloc(HANDLE,
-	(E1) * (E2) * (E3)
+	array3_size(E1, E2, E3)
  , ...)
|
  devm_kzalloc(HANDLE,
-	E1 * E2 * E3
+	array3_size(E1, E2, E3)
  , ...)
)

// And then all remaining 2 factors products when they're not all constants,
// keeping sizeof() as the second factor argument.
@@
expression HANDLE;
expression THING, E1, E2;
type TYPE;
constant C1, C2, C3;
@@

(
  devm_kzalloc(HANDLE, sizeof(THING) * C2, ...)
|
  devm_kzalloc(HANDLE, sizeof(TYPE) * C2, ...)
|
  devm_kzalloc(HANDLE, C1 * C2 * C3, ...)
|
  devm_kzalloc(HANDLE, C1 * C2, ...)
|
- devm_kzalloc
+ devm_kcalloc
  (HANDLE,
-	sizeof(TYPE) * (E2)
+	E2, sizeof(TYPE)
  , ...)
|
- devm_kzalloc
+ devm_kcalloc
  (HANDLE,
-	sizeof(TYPE) * E2
+	E2, sizeof(TYPE)
  , ...)
|
- devm_kzalloc
+ devm_kcalloc
  (HANDLE,
-	sizeof(THING) * (E2)
+	E2, sizeof(THING)
  , ...)
|
- devm_kzalloc
+ devm_kcalloc
  (HANDLE,
-	sizeof(THING) * E2
+	E2, sizeof(THING)
  , ...)
|
- devm_kzalloc
+ devm_kcalloc
  (HANDLE,
-	(E1) * E2
+	E1, E2
  , ...)
|
- devm_kzalloc
+ devm_kcalloc
  (HANDLE,
-	(E1) * (E2)
+	E1, E2
  , ...)
|
- devm_kzalloc
+ devm_kcalloc
  (HANDLE,
-	E1 * E2
+	E1, E2
  , ...)
)

Signed-off-by: Kees Cook <keescook@chromium.org>
2018-06-12 16:19:22 -07:00
Keerthy
88a1dbdec6 pinctrl: pinctrl-single: Add functions to save and restore pinctrl context
This adds a pair of context save/restore functions to save/restore the
state of a set of pinctrl registers. The context is lost during rtc only
suspend with ddr in self-refresh on am43xx. Currently the save/restore
is being done unconditionally. This will be optimized later with a
pdata-quirk function which will allow is to save/restore only when doing
the rtc only mode with ddr in self refresh.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-05-23 10:30:03 +02:00
David Lechner
45dcb54f01 pinctrl: pinctrl-single: Fix pcs_request_gpio() when bits_per_mux != 0
This fixes pcs_request_gpio() in the pinctrl-single driver when
bits_per_mux != 0. It appears this was overlooked when the multiple
pins per register feature was added.

Fixes: 4e7e8017a8 ("pinctrl: pinctrl-single: enhance to configure multiple pins of different modules")
Signed-off-by: David Lechner <david@lechnology.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-03-26 10:48:17 +02:00
Linus Torvalds
ef991796be This is the bulk of pin control changes for the v4.16 kernel cycle:
Core changes:
 
 - After lengthy discussions and partly due to my ignorance, we have
   merged a patch making pinctrl_force_default() and pinctrl_force_sleep()
   reprogram the states into the hardware of any hogged pins, even
   if they are already in the desired state. This only apply to hogged
   pins since groups of pins owned by drivers need to be managed by
   each driver, lest they could not do things like runtime PM and
   put pins to sleeping state even if the system as a whole is not
   in sleep.
 
 New drivers:
 
 - New driver for the Microsemi Ocelot SoC. This is used in ethernet
   switches.
 
 - The X-Powers AXP209 GPIO driver was extended to also deal with pin
   control and moved over from the GPIO subsystem. This circuit is
   a mixed-mode integrated circuit which is part of AllWinner designs.
 
 - New subdriver for the Qualcomm MSM8998 SoC, core of a high end
   mobile devices (phones) chipset.
 
 - New subdriver for the ST Microelectronics STM32MP157 MPU and
   STM32F769 MCU from the STM32 family.
 
 - New subdriver for the MediaTek MT7622 SoC. This is used for routers,
   repeater, gateways and such network infrastructure.
 
 - New subdriver for the NXP (former Freescale) i.MX 6ULL. This SoC has
   multimedia features and target "smart devices", I guess in-car
   entertainment, in-flight entertainment, industrial control panels etc.
 
 General improvements:
 
 - Incremental improvements on the SH-PFC subdrivers for things like
   the CAN bus.
 
 - Enable the glitch filter on Baytrail GPIOs used for interrupts.
 
 - Proper handling of pins to GPIO ranges on the Semtec SX150X
 
 - An IRQ setup ordering fix on MCP23S08.
 
 - A good set of janitorial coding style fixes.
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Merge tag 'pinctrl-v4.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes for the v4.16 kernel cycle.
  Like with GPIO it is actually a bit calm this time.

  Core changes:

   - After lengthy discussions and partly due to my ignorance, we have
     merged a patch making pinctrl_force_default() and
     pinctrl_force_sleep() reprogram the states into the hardware of any
     hogged pins, even if they are already in the desired state.

     This only apply to hogged pins since groups of pins owned by
     drivers need to be managed by each driver, lest they could not do
     things like runtime PM and put pins to sleeping state even if the
     system as a whole is not in sleep.

  New drivers:

   - New driver for the Microsemi Ocelot SoC. This is used in ethernet
     switches.

   - The X-Powers AXP209 GPIO driver was extended to also deal with pin
     control and moved over from the GPIO subsystem. This circuit is a
     mixed-mode integrated circuit which is part of AllWinner designs.

   - New subdriver for the Qualcomm MSM8998 SoC, core of a high end
     mobile devices (phones) chipset.

   - New subdriver for the ST Microelectronics STM32MP157 MPU and
     STM32F769 MCU from the STM32 family.

   - New subdriver for the MediaTek MT7622 SoC. This is used for
     routers, repeater, gateways and such network infrastructure.

   - New subdriver for the NXP (former Freescale) i.MX 6ULL. This SoC
     has multimedia features and target "smart devices", I guess in-car
     entertainment, in-flight entertainment, industrial control panels
     etc.

  General improvements:

   - Incremental improvements on the SH-PFC subdrivers for things like
     the CAN bus.

   - Enable the glitch filter on Baytrail GPIOs used for interrupts.

   - Proper handling of pins to GPIO ranges on the Semtec SX150X

   - An IRQ setup ordering fix on MCP23S08.

   - A good set of janitorial coding style fixes"

* tag 'pinctrl-v4.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (102 commits)
  pinctrl: mcp23s08: fix irq setup order
  pinctrl: Forward declare struct device
  pinctrl: sunxi: Use of_clk_get_parent_count() instead of open coding
  pinctrl: stm32: add STM32F769 MCU support
  pinctrl: sx150x: Add a static gpio/pinctrl pin range mapping
  pinctrl: sx150x: Register pinctrl before adding the gpiochip
  pinctrl: sx150x: Unregister the pinctrl on release
  pinctrl: ingenic: Remove redundant dev_err call in ingenic_pinctrl_probe()
  pinctrl: sprd: Use seq_putc() in sprd_pinconf_group_dbg_show()
  pinctrl: pinmux: Use seq_putc() in pinmux_pins_show()
  pinctrl: abx500: Use seq_putc() in abx500_gpio_dbg_show()
  pinctrl: mediatek: mt7622: align error handling of mtk_hw_get_value call
  pinctrl: mediatek: mt7622: fix potential uninitialized value being returned
  pinctrl: uniphier: refactor drive strength get/set functions
  pinctrl: imx7ulp: constify struct imx_cfg_params_decode
  pinctrl: imx: constify struct imx_pinctrl_soc_info
  pinctrl: imx7d: simplify imx7d_pinctrl_probe
  pinctrl: imx: use struct imx_pinctrl_soc_info as a const
  pinctrl: sunxi-pinctrl: fix pin funtion can not be match correctly.
  pinctrl: qcom: Add msm8998 pinctrl driver
  ...
2018-02-02 14:22:53 -08:00
Markus Elfring
7598160d7d pinctrl: single: Delete an unnecessary return statement in pcs_irq_chain_handler()
The script "checkpatch.pl" pointed information out like the following.

WARNING: void function return statements are not generally useful

Thus remove such a statement in the affected function.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-01-03 08:46:51 +01:00
Markus Elfring
a14aa2716b pinctrl: single: Delete an error message for a failed memory allocation in pcs_probe()
Omit an extra message for a memory allocation failure in this function.

This issue was detected by using the Coccinelle software.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-01-03 08:46:51 +01:00
Andrew Lunn
39c3fd5895 kernel/irq: Extend lockdep class for request mutex
The IRQ code already has support for lockdep class for the lock mutex
in an interrupt descriptor. Extend this to add a second class for the
request mutex in the descriptor. Not having a class is resulting in
false positive splats in some code paths.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: linus.walleij@linaro.org
Cc: grygorii.strashko@ti.com
Cc: f.fainelli@gmail.com
Link: https://lkml.kernel.org/r/1512234664-21555-1-git-send-email-andrew@lunn.ch
2017-12-28 12:26:35 +01:00
Tony Lindgren
c2584927b7 pinctrl: single: Remove invalid message
Pinctrl single should just show how many pins were found, the physical
address is already in the dev information. So let's remove the wrong
information that claims to show the physical address but really prints
a virtual address that is now hashed.

Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-12-20 12:38:46 +01:00
Colin Ian King
b582658ae0 pinctrl: single: make two arrays static const, reduces object code size
Don't populate the read-only arrays prop2 and prop4 on the stack, instead
make them static const.  Makes the object code smaller by over 230 bytes:

Before:
   text	   data	    bss	    dec	    hex	filename
  28235	   5820	    192	  34247	   85c7	drivers/pinctrl/pinctrl-single.o

After:
   text	   data	    bss	    dec	    hex	filename
  27839	   5980	    192	  34011	   84db	drivers/pinctrl/pinctrl-single.o

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-09-21 14:09:49 +02:00
Masahiro Yamada
1a8764f45c pinctrl: single: use of_device_get_match_data() to get soc data
Use of_device_get_match_data() instead of of_match_device().
It allows us to remove the forward declaration of pcs_of_match.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-29 10:18:46 +02:00
Tony Lindgren
6118714275 pinctrl: core: Fix pinctrl_register_and_init() with pinctrl_enable()
Recent pinctrl changes to allow dynamic allocation of pins exposed one
more issue with the pinctrl pins claimed early by the controller itself.
This caused a regression for IMX6 pinctrl hogs.

Before enabling the pin controller driver we need to wait until it has
been properly initialized, then claim the hogs, and only then enable it.

To fix the regression, split the code into pinctrl_claim_hogs() and
pinctrl_enable(). And then let's require that pinctrl_enable() is always
called by the pin controller driver when ready after calling
pinctrl_register_and_init().

Depends-on: 950b0d91dc ("pinctrl: core: Fix regression caused by delayed
work for hogs")
Fixes: df61b366af26 ("pinctrl: core: Use delayed work for hogs")
Fixes: e566fc11ea ("pinctrl: imx: use generic pinctrl helpers for
managing groups")
Cc: Haojian Zhuang <haojian.zhuang@linaro.org>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Mika Penttilä <mika.penttila@nextfour.com>
Cc: Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: Nishanth Menon <nm@ti.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Stefan Agner <stefan@agner.ch>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Gary Bisson <gary.bisson@boundarydevices.com>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-04-07 01:08:08 +02:00
Linus Walleij
27a2873617 Merge branch 'ib-pinctrl-genprops' into devel 2017-01-26 15:27:54 +01:00
Mika Westerberg
58957d2edf pinctrl: Widen the generic pinconf argument from 16 to 24 bits
The current pinconf packed format allows only 16-bit argument limiting
the maximum value 65535. For most types this is enough. However,
debounce time can be in range of hundreths of milliseconds in case of
mechanical switches so we cannot represent the worst case using the
current format.

In order to support larger values change the packed format so that the
lower 8 bits are used as type which leaves 24 bits for the argument.
This allows representing values up to 16777215 and debounce times up to
16 seconds.

We also convert the existing users to use 32-bit integer when extracting
argument from the packed configuration value.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-01-26 15:22:32 +01:00
Tony Lindgren
950b0d91dc pinctrl: core: Fix regression caused by delayed work for hogs
Commit df61b366af26 ("pinctrl: core: Use delayed work for hogs") caused a
regression at least with sh-pfc that is also a GPIO controller as
noted by Geert Uytterhoeven <geert@linux-m68k.org>.

As the original pinctrl_register() has issues calling pin controller
driver functions early before the controller has finished registering,
we can't just revert commit df61b366af26. That would break the drivers
using GENERIC_PINCTRL_GROUPS or GENERIC_PINMUX_FUNCTIONS.

So let's fix the issue with the following steps as a single patch:

1. Revert the late_init parts of commit df61b366af26.

   The late_init clearly won't work and we have to just give up
   on fixing pinctrl_register() for GENERIC_PINCTRL_GROUPS and
   GENERIC_PINMUX_FUNCTIONS.

2. Split pinctrl_register() into two parts

   By splitting pinctrl_register() into pinctrl_init_controller()
   and pinctrl_create_and_start() we have better control over when
   it's safe to call pinctrl_create().

3. Introduce a new pinctrl_register_and_init() function

   As suggested by Linus Walleij <linus.walleij@linaro.org>, we
   can just introduce a new function for the controllers that need
   pinctrl_create() called later.

4. Convert the four known problem cases to use new function

   Let's convert pinctrl-imx, pinctrl-single, sh-pfc and ti-iodelay
   to use the new function to fix the issues. The rest of the drivers
   can be converted later. Let's also update Documentation/pinctrl.txt
   accordingly because of the known issues with pinctrl_register().

Fixes: df61b366af26 ("pinctrl: core: Use delayed work for hogs")
Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Gary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-01-13 16:25:17 +01:00
Tony Lindgren
571aec4df5 pinctrl: single: Use generic pinmux helpers for managing functions
We can now drop the driver specific code for managing functions.

Signed-off-by: Tony Lindgren <tony@atomide.com>
[Replaces GENERIC_PINMUX with GENERIC_PINMUX_FUNCTIONS]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-01-03 09:26:19 +01:00
Tony Lindgren
caeb774ea3 pinctrl: single: Use generic pinctrl helpers for managing groups
We can now drop the driver specific code for managing groups.

Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-01-03 09:26:19 +01:00
Colin Ian King
059a6e630b pinctrl: single: fix spelling mistakes on "Ivalid"
Trivial fixe to spelling mistake "Ivalid" to "Invalid" in
dev_err  error message.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-12-30 14:00:29 +01:00
Dan Carpenter
712778d02d pinctrl: single: Fix a couple error codes
We should return -ENOMEM instead of success if pcs_add_function() fails.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-11-16 20:56:19 +01:00
Axel Haslam
dd68a526c7 pinctrl: single: search for the bits property when parsing bits
The pcs_parse_bits_in_pinctrl_entry function should search
for the "pinctrl-single,bits" and not "pinctrl-single,pins"

Signed-off-by: Axel Haslam <ahaslam@baylibre.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-11-11 21:29:37 +01:00
Axel Haslam
de7416bcee pinctrl: single: check for any error when getting rows
pinctrl_count_index_with_args returns -ENOENT not
-EINVAL. The return check would pass, and we would
try to kzalloc with a negative error size throwing
a warning.

Instead of checking for -EINVAL specifically, lets
check for any error and avoid negative size allocations.

Signed-off-by: Axel Haslam <ahaslam@baylibre.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-11-11 21:28:07 +01:00
Tony Lindgren
22d5127ec9 pinctrl: single: Use generic parser and #pinctrl-cells for pinctrl-single,bits
We can now use generic parser and keep things compatible with the
old binding.

Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-11-04 22:53:06 +01:00
Tony Lindgren
4622215fb1 pinctrl: single: Use generic parser and #pinctrl-cells for pinctrl-single,pins
We can now use generic parser. To support the legacy binding without
#pinctrl-cells, add pcs_quirk_missing_pinctrl_cells() and warn about
missing #pinctrl-cells.

Let's also update the documentation for struct pcs_soc_data while at it
as that seems to be out of date.

Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-11-04 22:51:50 +01:00
Tony Lindgren
cd23604a4b pinctrl: single: Drop pointless macro
This is left over from initial experiments with more properties.
It's only used in one place, so let's just get rid of it to make
the code more readable.

Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-10-28 13:54:00 +02:00
Tony Lindgren
223decc457 pinctrl: single: Drop custom names
>From tony Mon Sep 17 00:00:00 2001
From: Tony Lindgren <tony@atomide.com>
Date: Tue, 25 Oct 2016 08:33:34 -0700
Subject: [PATCHv2] pinctrl: single: Drop custom names

We no longer need to allocate custom names as those are dynamically
generated in pinctrl_register_one_pin() if no name is passed to
pinctrl_register_pins().

Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-10-28 13:31:50 +02:00
Tony Lindgren
0ac3c0a402 pinctrl: single: Fix missing flush of posted write for a wakeirq
With many repeated suspend resume cycles, the pin specific wakeirq
may not always work on omaps. This is because the write to enable the
pin interrupt may not have reached the device over the interconnect
before suspend happens.

Let's fix the issue with a flush of posted write with a readback.

Cc: stable@vger.kernel.org
Reported-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-06-22 17:58:07 +02:00
Keerthy
56b367c0cd pinctrl: single: Fix pcs_parse_bits_in_pinctrl_entry to use __ffs than ffs
pcs_parse_bits_in_pinctrl_entry uses ffs which gives bit indices
ranging from 1 to MAX. This leads to a corner case where we try to request
the pin number = MAX and fails.

bit_pos value is being calculted using ffs. pin_num_from_lsb uses
bit_pos value. pins array is populated with:

pin + pin_num_from_lsb.

The above is 1 more than usual bit indices as bit_pos uses ffs to compute
first set bit. Hence the last of the pins array is populated with the MAX
value and not MAX - 1 which causes error when we call pin_request.

mask_pos is rightly calculated as ((pcs->fmask) << (bit_pos - 1))
Consequently val_pos and submask are correct.

Hence use __ffs which gives (ffs(x) - 1) as the first bit set.

fixes: 4e7e8017a8 ("pinctrl: pinctrl-single: enhance to configure multiple pins of different modules")
Signed-off-by: Keerthy <j-keerthy@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-04-15 11:26:55 +02:00
Sudeep Holla
3c177a1662 pinctrl: single: Use a separate lockdep class
The single pinmux controller can be cascaded to the other interrupt
controllers. Hence when propagating wake-up settings to its parent
interrupt controller, there's possiblity of detecting possible recursive
locking and getting lockdep warning.

This patch avoids this false positive by using a separate lockdep class
for this single pinctrl interrupts.

Cc: linux-gpio@vger.kernel.org
Suggested-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-11 23:03:06 +07:00
Markus Elfring
f10a258581 pinctrl: Delete unnecessary checks
The pinctrl_unregister() function tests whether its argument is NULL
and then returns immediately. Thus the test around the call is not needed.

This issue was detected by using the Coccinelle software.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-17 11:49:50 +01:00
Thomas Gleixner
bd0b9ac405 genirq: Remove irq argument from irq flow handlers
Most interrupt flow handlers do not use the irq argument. Those few
which use it can retrieve the irq number from the irq descriptor.

Remove the argument.

Search and replace was done with coccinelle and some extra helper
scripts around it. Thanks to Julia for her help!

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Julia Lawall <Julia.Lawall@lip6.fr>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
2015-09-16 15:47:51 +02:00
Linus Torvalds
88a99886c2 This is the bulk of pin control changes for the v4.3 development
cycle
 
 Core changes:
 
 - It is possible configure groups in debugfs.
 
 - Consolidation of chained IRQ handler install/remove replacing
   all call sites where irq_set_handler_data() and
   irq_set_chained_handler() were done in succession with a
   combined call to irq_set_chained_handler_and_data(). This
   series was created by Thomas Gleixner after the problem was
   observed by Russell King.
 
 - Tglx also made another series of patches switching
   __irq_set_handler_locked() for irq_set_handler_locked() which
   is way cleaner.
 
 - Tglx also wrote a good bunch of patches to make use of
   irq_desc_get_xxx() accessors and avoid looking up irq_descs
   from IRQ numbers. The goal is to get rid of the irq number
   from the handlers in the IRQ flow which is nice.
 
 Driver feature enhancements:
 
 - Power management support for the SiRF SoC Atlas 7.
 
 - Power down support for the Qualcomm driver.
 
 - Intel Cherryview and Baytrail: switch drivers to use raw
   spinlocks in IRQ handlers to play nice with the realtime
   patch set.
 
 - Rework and new modes handling for Qualcomm SPMI-MPP.
 
 - Pinconf power source config for SH PFC.
 
 New drivers and subdrivers:
 
 - A new driver for Conexant Digicolor CX92755.
 
 - A new driver for UniPhier PH1-LD4, PH1-Pro4, PH1-sLD8,
   PH1-Pro5, ProXtream2 and PH1-LD6b SoC pin control support.
 
 - Reverse-egineered the S/PDIF settings for the Allwinner
   sun4i driver.
 
 - Support for Qualcomm Technologies QDF2xxx ARM64 SoCs
 
 - A new Freescale i.mx6ul subdriver.
 
 Cleanup:
 
 - Remove platform data support in a number of SH PFC
   subdrivers.
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Merge tag 'pinctrl-v4.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes for the v4.3 development
  cycle.

  Like with GPIO it's a lot of stuff.  If my subsystems are any sign of
  the overall tempo of the kernel v4.3 will be a gigantic diff.

[ It looks like 4.3 is calmer than 4.2 in most other subsystems, but
  we'll see - Linus ]

  Core changes:

   - It is possible configure groups in debugfs.

   - Consolidation of chained IRQ handler install/remove replacing all
     call sites where irq_set_handler_data() and
     irq_set_chained_handler() were done in succession with a combined
     call to irq_set_chained_handler_and_data().  This series was
     created by Thomas Gleixner after the problem was observed by
     Russell King.

   - Tglx also made another series of patches switching
     __irq_set_handler_locked() for irq_set_handler_locked() which is
     way cleaner.

   - Tglx also wrote a good bunch of patches to make use of
     irq_desc_get_xxx() accessors and avoid looking up irq_descs from
     IRQ numbers.  The goal is to get rid of the irq number from the
     handlers in the IRQ flow which is nice.

  Driver feature enhancements:

   - Power management support for the SiRF SoC Atlas 7.

   - Power down support for the Qualcomm driver.

   - Intel Cherryview and Baytrail: switch drivers to use raw spinlocks
     in IRQ handlers to play nice with the realtime patch set.

   - Rework and new modes handling for Qualcomm SPMI-MPP.

   - Pinconf power source config for SH PFC.

  New drivers and subdrivers:

   - A new driver for Conexant Digicolor CX92755.

   - A new driver for UniPhier PH1-LD4, PH1-Pro4, PH1-sLD8, PH1-Pro5,
     ProXtream2 and PH1-LD6b SoC pin control support.

   - Reverse-egineered the S/PDIF settings for the Allwinner sun4i
     driver.

   - Support for Qualcomm Technologies QDF2xxx ARM64 SoCs

   - A new Freescale i.mx6ul subdriver.

  Cleanup:

   - Remove platform data support in a number of SH PFC subdrivers"

* tag 'pinctrl-v4.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (95 commits)
  pinctrl: at91: fix null pointer dereference
  pinctrl: mediatek: Implement wake handler and suspend resume
  pinctrl: mediatek: Fix multiple registration issue.
  pinctrl: sh-pfc: r8a7794: add USB pin groups
  pinctrl: at91: Use generic irq_{request,release}_resources()
  pinctrl: cherryview: Use raw_spinlock for locking
  pinctrl: baytrail: Use raw_spinlock for locking
  pinctrl: imx6ul: Remove .owner field
  pinctrl: zynq: Fix typos in smc0_nand_grp and smc0_nor_grp
  pinctrl: sh-pfc: Implement pinconf power-source param for voltage switching
  clk: rockchip: add pclk_pd_pmu to the list of rk3288 critical clocks
  pinctrl: sun4i: add spdif to pin description.
  pinctrl: atlas7: clear ugly branch statements for pull and drivestrength
  pinctrl: baytrail: Serialize all register access
  pinctrl: baytrail: Drop FSF mailing address
  pinctrl: rockchip: only enable gpio clock when it setting
  pinctrl/mediatek: fix spelling mistake in dev_err error message
  pinctrl: cherryview: Serialize all register access
  pinctrl: UniPhier: PH1-Pro5: add I2C ch6 pin-mux setting
  pinctrl: nomadik: reflect current input value
  ...
2015-09-04 10:22:09 -07:00
Rob Herring
9458120ea1 pinctrl: kill off set_irq_flags usage
set_irq_flags is ARM specific with custom flags which have genirq
equivalents. Convert drivers to use the genirq interfaces directly, so we
can kill off set_irq_flags. The translation of flags is as follows:

IRQF_VALID -> !IRQ_NOREQUEST
IRQF_PROBE -> !IRQ_NOPROBE
IRQF_NOAUTOEN -> IRQ_NOAUTOEN

For IRQs managed by an irqdomain, the irqdomain core code handles clearing
and setting IRQ_NOREQUEST already, so there is no need to do this in
.map() functions and we can simply remove the set_irq_flags calls. Some
users also modify IRQ_NOPROBE and this has been maintained although it
is not clear that is really needed. There appears to be a great deal of
blind copy and paste of this code.

Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Lee Jones <lee@kernel.org>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Thomas Abraham <thomas.abraham@linaro.org>
Cc: Kukjin Kim <kgene@kernel.org>
Cc: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Cc: linux-gpio@vger.kernel.org
Cc: linux-rpi-kernel@lists.infradead.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-mediatek@lists.infradead.org
Cc: linux-samsung-soc@vger.kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-28 12:15:19 +02:00
Grygorii Strashko
c10372e615 pinctrl: single: ensure pcs irq will not be forced threaded
The PSC IRQ is requested using request_irq() API and as result it can
be forced to be threaded IRQ in RT-Kernel if PCS_QUIRK_HAS_SHARED_IRQ
is enabled for pinctrl domain.

As result, following 'possible irq lock inversion dependency' report
can be seen:
=========================================================
[ INFO: possible irq lock inversion dependency detected ]
3.14.43-rt42-00360-g96ff499-dirty #24 Not tainted
---------------------------------------------------------
irq/369-pinctrl/927 just changed the state of lock:
 (&pcs->lock){+.....}, at: [<c0375b54>] pcs_irq_handle+0x48/0x9c
but this lock was taken by another, HARDIRQ-safe lock in the past:
 (&irq_desc_lock_class){-.....}

and interrupts could create inverse lock ordering between them.

other info that might help us debug this:
 Possible interrupt unsafe locking scenario:

       CPU0                    CPU1
       ----                    ----
  lock(&pcs->lock);
                               local_irq_disable();
                               lock(&irq_desc_lock_class);
                               lock(&pcs->lock);
  <Interrupt>
    lock(&irq_desc_lock_class);

 *** DEADLOCK ***

no locks held by irq/369-pinctrl/927.

the shortest dependencies between 2nd lock and 1st lock:
  -> (&irq_desc_lock_class){-.....} ops: 58724 {
     IN-HARDIRQ-W at:
                       [<c0090040>] lock_acquire+0x9c/0x158
                       [<c07065c8>] _raw_spin_lock+0x48/0x58
                       [<c009edac>] handle_fasteoi_irq+0x24/0x15c
                       [<c009abb0>] generic_handle_irq+0x3c/0x4c
                       [<c000f83c>] handle_IRQ+0x50/0xa0
                       [<c0008674>] gic_handle_irq+0x3c/0x6c
                       [<c0707a04>] __irq_svc+0x44/0x8c
                       [<c000fc44>] arch_cpu_idle+0x40/0x4c
                       [<c009aadc>] cpu_startup_entry+0x270/0x2e0
                       [<c06fcbf8>] rest_init+0xd4/0xe4
                       [<c0a44bfc>] start_kernel+0x3d0/0x3dc
                       [<80008084>] 0x80008084
     INITIAL USE at:
                      [<c0090040>] lock_acquire+0x9c/0x158
                      [<c070674c>] _raw_spin_lock_irqsave+0x54/0x68
                      [<c009aff8>] __irq_get_desc_lock+0x64/0xa4
                      [<c009e38c>] irq_set_chip+0x30/0x78
                      [<c009ec30>] irq_set_chip_and_handler_name+0x24/0x3c
                      [<c036ca10>] gic_irq_domain_map+0x48/0xb4
                      [<c00a0a80>] irq_domain_associate+0x84/0x1d4
                      [<c00a1154>] irq_create_mapping+0x80/0x11c
                      [<c00a1270>] irq_create_of_mapping+0x80/0x120
                      [<c05cdaa8>] irq_of_parse_and_map+0x34/0x3c
                      [<c0a4ea24>] omap_dm_timer_init_one+0x90/0x30c
                      [<c0a4eef0>] omap5_realtime_timer_init+0x8c/0x48c
                      [<c0a486b0>] time_init+0x28/0x38
                      [<c0a44a6c>] start_kernel+0x240/0x3dc
                      [<80008084>] 0x80008084
   }
   ... key      at: [<c1049ce0>] irq_desc_lock_class+0x0/0x8
   ... acquired at:
   [<c07065c8>] _raw_spin_lock+0x48/0x58
   [<c0375a90>] pcs_irq_unmask+0x58/0xa0
   [<c009ea48>] irq_enable+0x38/0x48
   [<c009ead0>] irq_startup+0x78/0x7c
   [<c009d440>] __setup_irq+0x4a8/0x4f4
   [<c009d5dc>] request_threaded_irq+0xb8/0x138
   [<c0415a5c>] omap_8250_startup+0x4c/0x148
   [<c041276c>] serial8250_startup+0x24/0x30
   [<c040d0ec>] uart_startup.part.9+0x5c/0x1b4
   [<c040dbcc>] uart_open+0xf4/0x16c
   [<c03f0540>] tty_open+0x170/0x61c
   [<c0157028>] chrdev_open+0xbc/0x1b4
   [<c0150494>] do_dentry_open+0x1e8/0x2bc
   [<c0150a84>] finish_open+0x44/0x5c
   [<c0160d50>] do_last.isra.47+0x710/0xca0
   [<c01613a4>] path_openat+0xc4/0x640
   [<c0162904>] do_filp_open+0x3c/0x98
   [<c0151bdc>] do_sys_open+0x114/0x1d8
   [<c0151cc8>] SyS_open+0x28/0x2c
   [<c0a44d70>] kernel_init_freeable+0x168/0x1e4
   [<c06fcc24>] kernel_init+0x1c/0xf8
   [<c000eee8>] ret_from_fork+0x14/0x20

-> (&pcs->lock){+.....} ops: 65 {
   HARDIRQ-ON-W at:
                    [<c0090040>] lock_acquire+0x9c/0x158
                    [<c07065c8>] _raw_spin_lock+0x48/0x58
                    [<c0375b54>] pcs_irq_handle+0x48/0x9c
                    [<c0375c5c>] pcs_irq_handler+0x1c/0x28
                    [<c009c458>] irq_forced_thread_fn+0x30/0x74
                    [<c009c784>] irq_thread+0x158/0x1c4
                    [<c0063fc4>] kthread+0xd4/0xe8
                    [<c000eee8>] ret_from_fork+0x14/0x20
   INITIAL USE at:
                   [<c0090040>] lock_acquire+0x9c/0x158
                   [<c070674c>] _raw_spin_lock_irqsave+0x54/0x68
                   [<c0375344>] pcs_enable+0x7c/0xe8
                   [<c0372a44>] pinmux_enable_setting+0x178/0x220
                   [<c036fecc>] pinctrl_select_state+0x110/0x194
                   [<c04732dc>] pinctrl_bind_pins+0x7c/0x108
                   [<c045853c>] driver_probe_device+0x70/0x254
                   [<c0458810>] __driver_attach+0x9c/0xa0
                   [<c045674c>] bus_for_each_dev+0x78/0xac
                   [<c0458030>] driver_attach+0x2c/0x30
                   [<c0457c78>] bus_add_driver+0x15c/0x204
                   [<c0458ee0>] driver_register+0x88/0x108
                   [<c045a168>] __platform_driver_register+0x64/0x6c
                   [<c0a8170c>] omap_hsmmc_driver_init+0x1c/0x20
                   [<c0008a94>] do_one_initcall+0x110/0x170
                   [<c0a44d48>] kernel_init_freeable+0x140/0x1e4
                   [<c06fcc24>] kernel_init+0x1c/0xf8
                   [<c000eee8>] ret_from_fork+0x14/0x20
 }
 ... key      at: [<c1088a8c>] __key.18572+0x0/0x8
 ... acquired at:
   [<c008cdd4>] mark_lock+0x388/0x76c
   [<c008df40>] __lock_acquire+0x6d0/0x1f98
   [<c0090040>] lock_acquire+0x9c/0x158
   [<c07065c8>] _raw_spin_lock+0x48/0x58
   [<c0375b54>] pcs_irq_handle+0x48/0x9c
   [<c0375c5c>] pcs_irq_handler+0x1c/0x28
   [<c009c458>] irq_forced_thread_fn+0x30/0x74
   [<c009c784>] irq_thread+0x158/0x1c4
   [<c0063fc4>] kthread+0xd4/0xe8
   [<c000eee8>] ret_from_fork+0x14/0x20

stack backtrace:
CPU: 1 PID: 927 Comm: irq/369-pinctrl Not tainted 3.14.43-rt42-00360-g96ff499-dirty #24
[<c00177e0>] (unwind_backtrace) from [<c00130b0>] (show_stack+0x20/0x24)
[<c00130b0>] (show_stack) from [<c0702958>] (dump_stack+0x84/0xd0)
[<c0702958>] (dump_stack) from [<c008bcfc>] (print_irq_inversion_bug+0x1d0/0x21c)
[<c008bcfc>] (print_irq_inversion_bug) from [<c008bf18>] (check_usage_backwards+0xb4/0x11c)
[<c008bf18>] (check_usage_backwards) from [<c008cdd4>] (mark_lock+0x388/0x76c)
[<c008cdd4>] (mark_lock) from [<c008df40>] (__lock_acquire+0x6d0/0x1f98)
[<c008df40>] (__lock_acquire) from [<c0090040>] (lock_acquire+0x9c/0x158)
[<c0090040>] (lock_acquire) from [<c07065c8>] (_raw_spin_lock+0x48/0x58)
[<c07065c8>] (_raw_spin_lock) from [<c0375b54>] (pcs_irq_handle+0x48/0x9c)
[<c0375b54>] (pcs_irq_handle) from [<c0375c5c>] (pcs_irq_handler+0x1c/0x28)
[<c0375c5c>] (pcs_irq_handler) from [<c009c458>] (irq_forced_thread_fn+0x30/0x74)
[<c009c458>] (irq_forced_thread_fn) from [<c009c784>] (irq_thread+0x158/0x1c4)
[<c009c784>] (irq_thread) from [<c0063fc4>] (kthread+0xd4/0xe8)
[<c0063fc4>] (kthread) from [<c000eee8>] (ret_from_fork+0x14/0x20)

To fix it use IRQF_NO_THREAD to ensure that pcs irq will not be forced threaded.

Cc: Tony Lindgren <tony@atomide.com>
Cc: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-20 11:01:52 +02:00
Jiang Liu
5663bb27de pinctrl: Use irq_desc_get_xxx() to avoid redundant lookup of irq_desc
Use irq_desc_get_xxx() to avoid redundant lookup of irq_desc while we
already have a pointer to corresponding irq_desc.

Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-gpio@vger.kernel.org
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-07-17 21:56:20 +02:00
Thomas Gleixner
20d5d142a6 pinctrl: Consolidate chained IRQ handler install/remove
Chained irq handlers usually set up handler data as well. We now have
a function to set both under irq_desc->lock. Replace the two calls
with one.

Search and conversion was done with coccinelle.

Reported-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Julia Lawall <Julia.Lawall@lip6.fr>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-gpio@vger.kernel.org
2015-07-17 21:56:15 +02:00
Grygorii Strashko
6417049f66 pinctrl: single: dra7: remove PCS_QUIRK_SHARED_IRQ
On DRA7 there is one pinctrl domain (dra7_pmx_core) and
PRCM wake-up IRQ is not shared, so remove quirk.

Cc: Nishanth Menon <nm@ti.com>
Fixes: 31320beaa3 ('pinctrl: single: Add DRA7 pinctrl compatibility')
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-16 14:35:13 +02:00
Masahiro Yamada
323de9efdf pinctrl: make pinctrl_register() return proper error code
Currently, pinctrl_register() just returns NULL on error, so the
callers can not know the exact reason of the failure.

Some of the pinctrl drivers return -EINVAL, some -ENODEV, and some
-ENOMEM on error of pinctrl_register(), although the error code
might be different from the real cause of the error.

This commit reworks pinctrl_register() to return the appropriate
error code and modifies all of the pinctrl drivers to use IS_ERR()
for the error checking and PTR_ERR() for getting the error code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Lee Jones <lee@kernel.org>
Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Ray Jui <rjui@broadcom.com>
Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Hongzhou Yang <hongzhou.yang@mediatek.com>
Acked-by: Wei Chen <Wei.Chen@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-10 14:49:52 +02:00
Krzysztof Kozlowski
e5b6095376 pinctrl: single: Constify irq_domain_ops
The irq_domain_ops are not modified by the driver and the irqdomain core
code accepts pointer to a const data.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-05-06 15:32:45 +02:00
Fabian Frederick
baa9946e32 pinctrl: constify of_device_id array
of_device_id is always used as const.
(See driver.of_match_table and open firmware functions)

Signed-off-by: Fabian Frederick <fabf@skynet.be>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Acked-by: Hongzhou Yang <hongzhou.yang@mediatek.com>
Acked-by: Lee Jones <lee@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-27 09:58:35 +01:00
Wolfram Sang
5c759d73b0 pinctrl: drop owner assignment from platform_drivers
A platform_driver does not need to set an owner, it will be populated by the
driver core.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-10-20 16:21:21 +02:00
Linus Walleij
9e3a979f03 pinctrl: single: fix freudian slip
commit 03e9f0cac5
"pinctrl: clean up after enable refactoring"
renamed the vtable callback .enable to .set_mux. The
renaming was done manually, and one of the alterations
contained a freudian slip. I confess, I am human.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-05 10:33:25 +02:00
Linus Walleij
03e9f0cac5 pinctrl: clean up after enable refactoring
commit 2243a87d90
"pinctrl: avoid duplicated calling enable_pinmux_setting for a pin"
removed the .disable callback from the struct pinmux_ops,
making the .enable() callback the only remaining callback.

However .enable() is a bad name as it seems to imply that a
muxing can also be disabled. Rename the callback to .set_mux()
and also take this opportunity to clean out any remaining
mentions of .disable() from the documentation.

Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Acked-by: Fan Wu <fwu@marvell.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-04 10:05:07 +02:00
Keerthy
aa2293d82c pinctrl: single: AM437x: Add pinctrl compatibility
AM437x pinctrl definitions now differ from traditional 16 bit OMAP pin
ctrl definitions, in that all 32 bits are used to describe a single pin

Also the location of wakeupenable and event bits have changed.

Signed-off-by: Keerthy <j-keerthy@ti.com>
[nm@ti.com: minor updates]
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-08-29 09:28:35 +02:00
Nishanth Menon
31320beaa3 pinctrl: single: Add DRA7 pinctrl compatibility
DRA7 pinctrl definitions now differ from traditional 16 bit OMAP pin
ctrl definitions, in that all 32 bits are used to describe a single pin

Also the location of wakeupenable and event bits have changed.

Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-08-29 09:27:44 +02:00