The NAND Ready/Busy# line is connected to GPMC_WAIT0 pin and
can't be used for wait state insertion for NAND I/O read/write.
So disable read/write wait monitoring as per Reference Manual's
suggestion [1].
[1] AM335x TRM: SPRUH73L: 7.1.3.3.12.2 NAND Device-Ready Pin
Cc: Teresa Remmet <t.remmet@phytec.de>
Cc: Ilya Ledvich <ilya@compulab.co.il>
Cc: Yegor Yefremov <yegorslists@googlemail.com>
Cc: Rostislav Lisovy <lisovy@gmail.com>
Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add compatible id, GPMC register resource and interrupt
resource to NAND controller nodes.
The GPMC node will provide an interrupt controller for the
NAND IRQs.
Cc: Teresa Remmet <t.remmet@phytec.de>
Cc: Ilya Ledvich <ilya@compulab.co.il>
Cc: Yegor Yefremov <yegorslists@googlemail.com>
Cc: Rostislav Lisovy <lisovy@gmail.com>
Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
remove tps65217.dtsi and adapt all boards, which
used it.
Signed-off-by: Heiko Schocher <hs@denx.de>
Tested-by: Keerthy <j-keerthy@ti.com>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Use the pinmux IOPAD macro to define the register absolute physical
address instead of the offset from the padconf base address. This
makes the DTS easier to read since matches the addresses listed in
the Technical Reference Manual.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Since this is a SOM (System on Module) that will be part
of another embedded board (and can't really exist on its own)
define it as a "dtsi" that will be included in the Device tree
describing the whole system later on.
Hardware specification:
* AM335x SoC
* up to 512 MB RAM
* NAND Flash (8x interface, cs0)
* UART0
* PMIC
* I2C0 (for PMIC)
* 1x Ethernet MAC
Signed-off-by: Rostislav Lisovy <lisovy@jablotron.cz>
[tony@atomide.com: updated nand io size to be just 4]
Signed-off-by: Tony Lindgren <tony@atomide.com>
