Move the VC instance struct from omap_vdd_info into struct voltagedomain.
While moving, perform some misc. renames for readability.
No functional changes.
Summary of renames:
- rename omap_vc_instance to omap_vc_channel, since there is only
one instance of the VC IP and this actually represents channels
using TRM terminology.
- rename 'vc_common' field of VC channel which led to:
s/vc->vc_common/vc->common/
- remove redundant '_data' suffix
- OMAP3: vc1 --> vc_mpu, vc2 --> vc_core
- omap_vc_bypass_scale_voltage() -> omap_vc_bypass_scale()
Signed-off-by: Kevin Hilman <khilman@ti.com>
merge
As part of the voltage layer cleanup, split out VC specific code into
a dedicated VC layer. This patch primarily just moves VC code from
voltage.c into vc.c, and adds prototypes to vc.h.
No functional changes.
For readability, each function was given a local 'vc' pointer:
struct omap_vc_instance_data *vc = voltdm->vdd->vc_data;
and a global replace of s/vdd->vc_data/vc/ was done.
Also vc_init was renamed to vc_init_channel to reflect that this is
per-VC channel initializtion.
Signed-off-by: Kevin Hilman <khilman@ti.com>
When a powerdomain is registered and it has an associated voltage domain,
add the powerdomain to the voltagedomain using voltdm_add_pwrdm().
Also add voltagedomain iterator helper functions to iterate over all
registered voltagedomains and all powerdomains associated with a
voltagedomain.
Modeled after a similar relationship between clockdomains and powerdomains.
Signed-off-by: Kevin Hilman <khilman@ti.com>
When a powerdomain is registered, lookup the voltage domain by name
and keep a pointer to the containing voltagedomain in the powerdomain
structure.
Modeled after similar method between powerdomain and clockdomain layers.
Signed-off-by: Kevin Hilman <khilman@ti.com>
Add voltage domain name to indicate which voltagedomain each
powerdomain is in.
The fixed voltage domain like ldo_wakeup for emu and wkup power
domain is added too.
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
[khilman@ti.com]: renamed wakeup domain: s/ldo_wakeup/wakeup/
Signed-off-by: Kevin Hilman <khilman@ti.com>
Create basic voltagedomains for OMAP2 and associate OMAP2 powerdomains
with the newly created voltage domains.
While here, update copyright on powerdomain data to 2011.
Signed-off-by: Kevin Hilman <khilman@ti.com>
Each powerdomain is associated with a voltage domain. Add an entry to
struct powerdomain where the enclosing voltagedomain can be
referenced.
Modeled after similar relationship between clockdomains and powerdomains.
Signed-off-by: Kevin Hilman <khilman@ti.com>
Add a 'bool scalable' flag to the struct powerdomain and set it for
the scalable domains on OMAP3 and OMAP4.
Signed-off-by: Kevin Hilman <khilman@ti.com>
Add wakeup voltage domain so that the wakeup powerdomain can have an
associated powerdomain. Note that the scalable flat is not set for
the this voltagedomain, so it will not be fully initialized like
scalable voltage domains.
Signed-off-by: Kevin Hilman <khilman@ti.com>
This voltage domain (a.k.a. VDD1) contains both the MPU and the IVA, so
rename appropriately.
Also fixup any users of the "mpu" name to use "mpu_iva"
Signed-off-by: Kevin Hilman <khilman@ti.com>
Start cleaning up the voltage layer to have a voltage domain layer
that resembles the structure of the existing clock and power domain
layers. To that end:
- move the 'struct voltagedomain' out of 'struct omap_vdd_info' to
become the primary data structure.
- convert any functions taking a pointer to struct omap_vdd_info into
functions taking a struct voltagedomain pointer.
- convert the register & initialize of voltage domains to look like
that of powerdomains
- convert omap_voltage_domain_lookup() to voltdm_lookup(), modeled
after the current powerdomain and clockdomain lookup functions.
- omap_voltage_late_init(): only configure VDD info when
the vdd_info struct is non-NULL
Signed-off-by: Kevin Hilman <khilman@ti.com>
Eliminate need for global variables for the various PRM module offsets by
making them part of the VP/VC common structures
Eventually, these will likely be moved again, or more likely removed
when VP/VC code is isolated, but for now just getting rid of them as
global variabes so that the voltage domain initialization can be
cleaned up.
Signed-off-by: Kevin Hilman <khilman@ti.com>
At Tony's request, remove the omap_chip bitmasks from the powerdomain
definitions. Instead, initialize powerdomains based on one or more
lists that are applicable to a particular SoC family, variant, and
silicon revision.
Gražvydas Ignotas <notasas@gmail.com> found and reported a bug in a
related patch that also applied to this patch - thanks Gražvydas.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Gražvydas Ignotas <notasas@gmail.com>
In preparation for OMAP_CHIP() removal, split pwrdm_init() into three
functions. This allows some of them to be called multiple times: for
example, pwrdm_register_pwrdms() can be called once to register
powerdomains that are common to a group of SoCs, and once to register
powerdomains that are specific to a single SoC.
The appropriate order to call these functions - which is enforced
by the code - is:
1. pwrdm_register_platform_funcs()
2. pwrdm_register_pwrdms() (can be called multiple times)
3. pwrdm_complete_init()
Convert the OMAP2, 3, and 4 powerdomain init code to use these new
functions.
While here, improve documentation, and increase CodingStyle
conformance by shortening some local variable names.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
At Tony's request, remove the omap_chip bitmasks from the clockdomain
and clockdomain dependency definitions. Instead, initialize
clockdomains based on one or more lists that are applicable to a
particular SoC family, variant, and silicon revision.
Tony Lindgren <tony@atomide.com> found a bug in a previous version of this
patch - thanks Tony.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
In preparation for OMAP_CHIP() removal, split clkdm_init() into four
functions. This allows some of them to be called multiple times: for
example, clkdm_register_clkdms() can be called once to register
clockdomains that are common to a group of SoCs, and once to register
clockdomains that are specific to a single SoC.
The appropriate order to call these functions - which is enforced
by the code - is:
1. clkdm_register_platform_funcs()
2. clkdm_register_clkdms() (can be called multiple times)
3. clkdm_register_autodeps() (optional; deprecated)
4. clkdm_complete_init()
Convert the OMAP2, 3, and 4 clockdomain init code to use these new
functions.
While here, improve documentation, and increase CodingStyle
conformance by shortening some local variable names.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
omap3_cpuinfo() contains essentially duplicated code from
omap3_check_revision(), just for the purpose of determining the chip ES level.
Set the cpu_rev char array pointer in omap3_check_revision() instead,
and drop the now-useless code from omap3_cpuinfo().
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Igor Grinberg <grinberg@compulab.co.il>
Tested-by: Abhilash Koyamangalath <abhilash.kv@ti.com>
Emit a warning to the console in omap3_check_revision() if that code
cannot determine what type of SoC the system is currently running on.
Remove some extra whitespace, remove some duplicate code, and
add an appropriate comment to a fallthrough case.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Hemant Pedanekar <hemantp@ti.com>
Tested-by: Igor Grinberg <grinberg@compulab.co.il>
Tested-by: Abhilash Koyamangalath <abhilash.kv@ti.com>
Use explicit revision codes for OMAP/AM 3505/3517 ES levels, as the rest
of the OMAP2+ SoCs do in mach-omap2/cpu.c.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Sanjeev Premi <premi@ti.com>
Tested-by: Igor Grinberg <grinberg@compulab.co.il>
Tested-by: Abhilash Koyamangalath <abhilash.kv@ti.com>
The OMAP3505/AM3505 appears to be based on the same silicon as the
OMAP3517/AM3517, with some features disabled via eFuse bits. Follow
the same practice as OMAP3430 and identify these devices internally as
part of the OMAP3517/AM3517 family.
The OMAP3503/3515/3525/3530 chips appear to be based on the same silicon
as the OMAP3430, with some features disabled via eFuse bits. Identify
these devices internally as part of the OMAP3430 family.
Remove the old OMAP35XX_CLASS, which actually covered two very different
chip families. The OMAP3503/3515/3525/3530 chips will now be covered by
OMAP343X_CLASS, since the silicon appears to be identical. For the
OMAP3517/AM3517 family, create a new class, OMAP3517_CLASS.
Thanks to Tony Lindgren <tony@atomide.com> for some help with the second
revision of this patch.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Sanjeev Premi <premi@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Tested-by: Igor Grinberg <grinberg@compulab.co.il>
Tested-by: Abhilash Koyamangalath <abhilash.kv@ti.com>
Add a missing array terminator to omap2430_usbhsotg_addrs[]. Without
this terminator, the omap_hwmod resource building code runs off the
end of the array, resulting in at least this error -- if not worse
behavior:
[ 0.578002] musb-omap2430: failed to claim resource 4
[ 0.583465] omap_device: musb-omap2430: build failed (-16)
[ 0.589294] Could not build omap_device for musb-omap2430 usb_otg_hs
This should have been part of commit
78183f3fdf ("omap_hwmod: use a null
structure record to terminate omap_hwmod_addr_space arrays") but was
evidently missed.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
The oscillator that supplies GPT12_FCLK and WDT1_FCLK exists in the
WKUP powerdomain[1]. This resolves at least one boot-time warning:
omap_hwmod: gpt12_fck: missing clockdomain for gpt12_fck.
1. _OMAP34xx Multimedia High Security (HS) Device Silicon Revision 3.1.x
Security Addendum Version K (SWPU119K)_ Figure 3-29. August 2010.
Fix the following compile warning:
arch/arm/mach-omap2/clock44xx_data.c: In function 'omap4xxx_clk_init':
arch/arm/mach-omap2/clock44xx_data.c:3371:6: warning: 'cpu_clkflg' may be used uninitialized in this function
The approach taken here is intended to work if omap4xxx_clk_init() is
converted into an initcall.
Thanks to Bjarne Steinsbo <bsteinsbo@gmail.com> for proposing another
approach.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Bjarne Steinsbo <bsteinsbo@gmail.com>
After commit 665d001338 ("OMAP2+: hwmod:
Follow the recommended PRCM module enable sequence"), device drivers
for OMAP IP blocks that do not use runtime PM can cause oopses or
kernel instability[1][2].
This is because those non-runtime PM drivers do not use the hwmod
code, which implements the correct IP block enable and disable
sequence.
Several options for dealing with this problem have been proposed:
1. Add a new field to the OMAP struct clk to mark clocks that are
currently used by non-runtime PM drivers. Modify the clock code to
use the old clockdomain sequence for these marked clocks. As
drivers are converted to use runtime PM, remove the annotation from
the clocks.
2. Similar to #1, but associate the flag with the struct omap_clk
instead.
3. Add IDLEST wait support to the OMAP4 clock code, similar to the way
it is implemented for OMAP2/3, and enable it in each struct clk
currently used by non-runtime PM drivers. As drivers are converted
to use runtime PM, remove the annotation from the clocks.
4. Do nothing; leave the problem to those responsible for the
unconverted drivers.
5. Re-enable clock-based clockdomain control in the OMAP4 clock code.
This would revert back to the behavior of Linux 3.0, simply with a
slightly longer module enable/disable latency.
Unfortunately, no approach seemed particularly good. Options 1
through 3 seemed unwise due to the following reasons:
A. The OMAP struct clks are intended primarily to describe hardware
clock nodes, and the intention is that no driver-specific data
should be stored there (applies to #1)
B. The resulting patch would have been quite large for the -rc series
(applies to #1, #2, #3)
C. The patch would have been a new, yet temporary hack; and similar fixes
have drawn negative comments in the recent past (see for example [3])
Option 4 is undesirable because commit
665d001338 ("OMAP2+: hwmod: Follow the
recommended PRCM module enable sequence") has resulted in a less
stable kernel; and kernel stability is more important than OMAP4 power
management.
Option 5 is the approach taken in this patch. This seemed to be the
least intrusive approach for 3.1-rc.
The approach in this patch was originally proposed by Ohad Ben-Cohen
<ohad@wizery.com>. I'm simply writing the commit message and passing
it along.
...
Thanks to Luciano Coelho <coelho@ti.com> for reporting the problem.
Thanks to Ohad Ben-Cohen <ohad@wizery.com> for tracking the problem
down, generating a temporary workaround, and proposing a patch to deal
with the problem. Thanks to Rajendra Nayak <rnayak@ti.com> for
proposing another patch to deal with the problem. Thanks to Felipe
Balbi <balbi@ti.com> for comments.
1. Coelho, Luciano <coelho@ti.com>. _Re: Oops on ehci_hcd when
booting 3.0.0-rc2 on panda_. Tue, 09 Aug 2011 14:26:08 +0300.
Posted to the <linux-omap@vger.kernel.org> mailing list. Available
from (among others)
http://www.spinics.net/linux/lists/linux-omap/msg55213.html
2. Munegowda, Keshava <keshava_mgowda@ti.com>. _Re: Oops on ehci_hcd
when booting 3.0.0-rc2 on panda_. Thu, 11 Aug 2011 13:51:05 +0530.
Posted to the <linux-omap@vger.kernel.org> mailing list. Available
from (among others)
http://www.spinics.net/linux/lists/linux-omap/msg55371.html
3. King, Russell <linux@arm.linux.org.uk>. _Re: [PATCH 5/8] OMAP4:
PM: TEMP: Prevent l3init from idling/force sleep_. Thu, 23 Jun
2011 16:22:49 +0100. Posted to the <linux-omap@vger.kernel.org>
mailing list. Available from (among others)
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg51392.html
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Luciano Coelho <coelho@ti.com>
Cc: Ohad Ben-Cohen <ohad@wizery.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
While using clockdomain force wakeup method, not waiting for powerdomain
to be effectively ON may end up locking the clockdomain FSM until a
next wakeup event occurs.
One such issue was seen on OMAP4430, where L4_PER was periodically
getting stuck in in-transition state when transitioning from from OSWR to ON.
This issue was reported and investigated by Patrick Titiano <p-titiano@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Reported-by: Patrick Titiano <p-titiano@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
[paul@pwsan.com: updated to apply; added transition wait on clkdm_deny_idle();
remove two superfluous pwrdm_wait_transition() calls]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Program all powerdomain target state as ON; this is to prevent domains
from hitting low power states (if bootloader has target states set to
something other than ON) and potentially even losing context while PM
is not fully initialized, which can cause the system to crash. The PM
late init code can then program the desired target state for all the
power domains.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
[paul@pwsan.com: dropped comment typo hunk; fixed comment indent and moved
to kerneldoc; moved code to pwrdm_init(); changed pwrdm_init() argument name
to prevent clash; cleaned up patch description]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
If CONFIG_OMAP_32K_TIMER is not selected and dmtimer is used as clocksource, the
timer stops counting once overflow occurs as it was not set in autoreload mode.
This results into timekeeping failure: for example, 'sleep 1' at the shell after
the timer counter overflow would hang.
This patch sets up autoreload when starting the clocksource timer which fixes
the above issue.
Signed-off-by: Hemant Pedanekar <hemantp@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Since 7203f8a48b (arm: mach-omap2: remove
NULL board_mux from board files) NULL board_mux is defined in mux.h.
Signed-off-by: Johan Hovold <jhovold@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Use kstrdup rather than duplicating its implementation
The semantic patch that makes this output is available
in scripts/coccinelle/api/kstrdup.cocci.
More information about semantic patching is available at
http://coccinelle.lip6.fr/
Signed-off-by: Thomas Meyer <thomas@m3y3r.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Builds for multi-OMAP2 (e.g., OMAP2420 with OMAP2430) with
CONFIG_ARCH_OMAP4=n fail with the following errors:
arch/arm/mach-omap2/built-in.o: In function `_enable_module':
arch/arm/mach-omap2/omap_hwmod.c:701: undefined reference to `omap4_cminst_module_enable'
arch/arm/mach-omap2/built-in.o: In function `_disable_module':
arch/arm/mach-omap2/omap_hwmod.c:726: undefined reference to `omap4_cminst_module_disable'
arch/arm/mach-omap2/built-in.o: In function `_wait_target_disable':
arch/arm/mach-omap2/omap_hwmod.c:1179: undefined reference to `omap4_cminst_wait_module_idle'
This is probably due to the preprocessor directives in
arch/arm/plat-omap/include/plat/cpu.h that convert some cpu_is_omap*()
expressions from preprocessor directives into something that is only
resolvable during runtime, if multiple OMAP2 build targets are
selected.
Thanks to Tony Lindgren <tony@atomide.com> for reporting.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Commit b22f954 (OMAP4: Move common twl6030 configuration to twl-common)
caused compile failures for code for OMAP arch which is not selected by
the config.
Fixes issues like:
With CONFIG_ARCH_OMAP3=y and CONFIG_ARCH_OMAP4=n, I'm getting this:
arch/arm/mach-omap2/built-in.o:(.data+0xf99c): undefined reference to `omap4430_phy_init'
arch/arm/mach-omap2/built-in.o:(.data+0xf9a0): undefined reference to `omap4430_phy_exit'
arch/arm/mach-omap2/built-in.o:(.data+0xf9a4): undefined reference to `omap4430_phy_power'
arch/arm/mach-omap2/built-in.o:(.data+0xf9a8): undefined reference to `omap4430_phy_set_clk'
arch/arm/mach-omap2/built-in.o:(.data+0xf9ac): undefined reference to `omap4430_phy_suspend'
Fix the problem by moving the code to ifdef sections for omap3 and omap4.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
[tony@atomide.com: updated comments]
Signed-off-by: Tony Lindgren <tony@atomide.com>
omap_sr_disable_reset_volt is called with irqs off in omapx_enter_sleep,
as part of idle sequence, this eventually calls sr_disable and
pm_runtime_put_sync. pm_runtime_put_sync calls rpm_idle, which will
enable interrupts in order to call the callback. In this short interval
when interrupts are enabled, scenarios such as the following can occur:
while interrupts are enabled, the timer interrupt that is supposed to
wake the device out of idle occurs and is acked, so when the CPU finally
goes to off, the timer is already gone, missing a wakeup event.
Further, as the documentation for runtime states:"
However, subsystems can use the pm_runtime_irq_safe() helper function
to tell the PM core that a device's ->runtime_suspend() and ->runtime_resume()
callbacks should be invoked in atomic context with interrupts disabled
(->runtime_idle() is still invoked the default way)."
Hence, replace pm_runtime_put_sync with pm_runtime_put_sync_suspend
to invoke the suspend handler and shut off the fclk for SmartReflex
module instead of using the idle handler in interrupt disabled context.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Colin Cross <ccross@google.com>
[khilman@ti.com: minor Subject edits]
Signed-off-by: Kevin Hilman <khilman@ti.com>
Board code should not touch omap_device internals. To get the MPU/IVA devices,
use existing APIs: omap2_get_mpu_device(), omap2_get_iva_device().
Signed-off-by: Kevin Hilman <khilman@ti.com>
SmartReflex should be disabled while entering low power mode due to
a) SmartReflex values are not defined for retention voltage, further
b) with SmartReflex enabled, if CPU enters lower c-states, FSM will try
to bump the voltage to current OPP's voltage for which it has entered c-state;
hence SmartReflex needs to be disabled for MPU, CORE and IVA voltage
domains in idle path before enabling auto retention voltage achievement
on the device.
However, since the current pm_runtime setup for SmartReflex devices are
setup to allow callbacks to be invoked with interrupts enabled, calling
SmartReflex enable/disable from other contexts such as idle paths
where preemption is disabled causes warnings such as the following
indicating of a potential race.
[ 82.023895] [<c04d079c>] (__irq_svc+0x3c/0x120) from [<c04d0484>] (_raw_spin_unlock_irq+0x28/0x2c)
[ 82.023895] [<c04d0484>] (_raw_spin_unlock_irq+0x28/0x2c) from [<c0323234>] (rpm_callback+0x4c/0x68)
[ 82.023956] [<c0323234>] (rpm_callback+0x4c/0x68) from [<c0323f7c>] (rpm_resume+0x338/0x53c)
[ 82.023956] [<c0323f7c>] (rpm_resume+0x338/0x53c) from [<c03243f4>] (__pm_runtime_resume+0x48/0x60)
[ 82.023986] [<c03243f4>] (__pm_runtime_resume+0x48/0x60) from [<c008aee0>] (sr_enable+0xa8/0x19c)
[ 82.023986] [<c008aee0>] (sr_enable+0xa8/0x19c) from [<c008b2fc>] (omap_sr_enable+0x50/0x90)
[ 82.024017] [<c008b2fc>] (omap_sr_enable+0x50/0x90) from [<c00888c0>] (omap4_enter_sleep+0x138/0x168)
Instead, we use pm_runtime_irq_safe to tell the PM core that callbacks can be
invoked in interrupt disabled contexts.
Acked-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
[khilman@ti.com: minor changelog edits]
Signed-off-by: Kevin Hilman <khilman@ti.com>
CONFIG_PM is no longer a user-selectable Kconfig option. Rather it is
automatically enabled if either CONFIG_SUSPEND or CONFIG_RUNTIME_PM is
enabled, so having a 'select PM' here is redunant when 'select
CONFIG_PM_RUNTIME' is present.
Signed-off-by: Kevin Hilman <khilman@ti.com>
* 'v4l_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-2.6: (430 commits)
[media] ir-mce_kbd-decoder: include module.h for its facilities
[media] ov5642: include module.h for its facilities
[media] em28xx: Fix DVB-C maxsize for em2884
[media] tda18271c2dd: Fix saw filter configuration for DVB-C @6MHz
[media] v4l: mt9v032: Fix Bayer pattern
[media] V4L: mt9m111: rewrite set_pixfmt
[media] V4L: mt9m111: fix missing return value check mt9m111_reg_clear
[media] V4L: initial driver for ov5642 CMOS sensor
[media] V4L: sh_mobile_ceu_camera: fix Oops when USERPTR mapping fails
[media] V4L: soc-camera: remove soc-camera bus and devices on it
[media] V4L: soc-camera: un-export the soc-camera bus
[media] V4L: sh_mobile_csi2: switch away from using the soc-camera bus notifier
[media] V4L: add media bus configuration subdev operations
[media] V4L: soc-camera: group struct field initialisations together
[media] V4L: soc-camera: remove now unused soc-camera specific PM hooks
[media] V4L: pxa-camera: switch to using standard PM hooks
[media] NetUP Dual DVB-T/C CI RF: force card hardware revision by module param
[media] Don't OOPS if videobuf_dvb_get_frontend return NULL
[media] NetUP Dual DVB-T/C CI RF: load firmware according card revision
[media] omap3isp: Support configurable HS/VS polarities
...
Fix up conflicts:
- arch/arm/mach-omap2/board-rx51-peripherals.c:
cleanup regulator supply definitions in mach-omap2
vs
OMAP3: RX-51: define vdds_csib regulator supply
- drivers/staging/tm6000/tm6000-alsa.c (trivial)
The RX-51 uses the CSIb IO complex for camera operation. The
board file is missing definition for the regulator supplying
the CSIb complex, so this is added for better power
management.
Signed-off-by: Kalle Jokiniemi <kalle.jokiniemi@nokia.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Sakari Ailus <sakari.ailus@iki.fi>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
* 'next/devel2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: (47 commits)
OMAP: Add debugfs node to show the summary of all clocks
OMAP2+: hwmod: Follow the recommended PRCM module enable sequence
OMAP2+: clock: allow per-SoC clock init code to prevent clockdomain calls from clock code
OMAP2+: clockdomain: Add per clkdm lock to prevent concurrent state programming
OMAP2+: PM: idle clkdms only if already in idle
OMAP2+: clockdomain: add clkdm_in_hwsup()
OMAP2+: clockdomain: Add 2 APIs to control clockdomain from hwmod framework
OMAP: clockdomain: Remove redundant call to pwrdm_wait_transition()
OMAP4: hwmod: Introduce the module control in hwmod control
OMAP4: cm: Add two new APIs for modulemode control
OMAP4: hwmod data: Add modulemode entry in omap_hwmod structure
OMAP4: hwmod data: Add PRM context register offset
OMAP4: prm: Remove deprecated functions
OMAP4: prm: Replace warm reset API with the offset based version
OMAP4: hwmod: Replace RSTCTRL absolute address with offset macros
OMAP: hwmod: Wait the idle status to be disabled
OMAP4: hwmod: Replace CLKCTRL absolute address with offset macros
OMAP2+: hwmod: Init clkdm field at boot time
OMAP4: hwmod data: Add clock domain attribute
OMAP4: clock data: Add missing divider selection for auxclks
...
* 'next/board' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc:
ARM: S3C64XX: Configure backup battery charger on Cragganmore
ARM: S3C64XX: Fix WM8915 IRQ polarity on Cragganmore
ARM: S3C64XX: Configure supplies for all Cragganmore regulators
ARM: S3C64XX: Refresh Cragganmore support
ARM: S3C64XX: Initial support for Wolfson/Simtec Cragganmore/Banff
OMAP4: Keyboard: Mux changes in the board file
omap: blaze: add mmc5/wl1283 device support
omap: 4430SDP: Register the card detect GPIO properly
arm: omap3: cm-t35: add support for cm-t3730
OMAP3: beagle: add support for beagleboard xM revision C
OMAP3: rx-51: Add full regulator definitions
omap: rx51: Platform support for lp5523 led chip
* 'next/cross-platform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc:
ARM: Consolidate the clkdev header files
ARM: set vga memory base at run-time
ARM: convert PCI defines to variables
ARM: pci: make pcibios_assign_all_busses use pci_has_flag
ARM: remove unnecessary mach/hardware.h includes
pci: move microblaze and powerpc pci flag functions into asm-generic
powerpc: rename ppc_pci_*_flags to pci_*_flags
Fix up conflicts in arch/microblaze/include/asm/pci-bridge.h
* 'next/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc:
MAINTAINERS: add maintainer of CSR SiRFprimaII machine
ARM: CSR: initializing L2 cache
ARM: CSR: mapping early DEBUG_LL uart
ARM: CSR: Adding CSR SiRFprimaII board support
OMAP4: clocks: Update the clock tree with 4460 clock nodes
OMAP4: PRCM: OMAP4460 specific PRM and CM register bitshifts
OMAP4: ID: add omap_has_feature for max freq supported
OMAP: ID: introduce chip detection for OMAP4460
ARM: Xilinx: merge board file into main platform code
ARM: Xilinx: Adding Xilinx board support
Fix up conflicts in arch/arm/mach-omap2/cm-regbits-44xx.h
* 'usb-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb-2.6: (115 commits)
EHCI: fix direction handling for interrupt data toggles
USB: serial: add IDs for WinChipHead USB->RS232 adapter
USB: OHCI: fix another regression for NVIDIA controllers
usb: gadget: m66592-udc: add pullup function
usb: gadget: m66592-udc: add function for external controller
usb: gadget: r8a66597-udc: add pullup function
usb: renesas_usbhs: support multi driver
usb: renesas_usbhs: inaccessible pipe is not an error
usb: renesas_usbhs: care buff alignment when dma handler
USB: PL2303: correctly handle baudrates above 115200
usb: r8a66597-hcd: fixup USB_PORT_STAT_C_SUSPEND shift
usb: renesas_usbhs: compile/config are rescued
usb: renesas_usbhs: fixup comment-out
usb: update email address in ohci-sh and r8a66597-hcd
usb: r8a66597-hcd: add function for external controller
EHCI: only power off port if over-current is active
USB: mon: Allow to use usbmon without debugfs
USB: EHCI: go back to using the system clock for QH unlinks
ehci: add pci quirk for Ordissimo and RM Slate 100 too
ehci: refactor pci quirk to use standard dmi_check_system method
...
Fix up trivial conflicts in Documentation/feature-removal-schedule.txt
* 'next/cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: (133 commits)
ARM: EXYNOS4: Change devname for FIMD clkdev
ARM: S3C64XX: Cleanup mach/regs-fb.h from mach-s3c64xx
ARM: S5PV210: Cleanup mach/regs-fb.h from mach-s5pv210
ARM: S5PC100: Cleanup mach/regs-fb.h from mach-s5pc100
ARM: S3C24XX: Use generic s3c_set_platdata for devices
ARM: S3C64XX: Use generic s3c_set_platdata for OneNAND
ARM: SAMSUNG: Use generic s3c_set_platdata for NAND
ARM: SAMSUNG: Use generic s3c_set_platdata for USB OHCI
ARM: SAMSUNG: Use generic s3c_set_platdata for HWMON
ARM: SAMSUNG: Use generic s3c_set_platdata for FB
ARM: SAMSUNG: Use generic s3c_set_platdata for TS
ARM: S3C64XX: Add PWM backlight support on SMDK6410
ARM: S5P64X0: Add PWM backlight support on SMDK6450
ARM: S5P64X0: Add PWM backlight support on SMDK6440
ARM: S5PC100: Add PWM backlight support on SMDKC100
ARM: S5PV210: Add PWM backlight support on SMDKV210
ARM: EXYNOS4: Add PWM backlight support on SMDKC210
ARM: EXYNOS4: Add PWM backlight support on SMDKV310
ARM: SAMSUNG: Create a common infrastructure for PWM backlight support
clocksource: convert 32-bit down counting clocksource on S5PV210/S5P64X0
...
Fix up trivial conflict in arch/arm/mach-imx/mach-scb9328.c
