Commit Graph

10 Commits

Author SHA1 Message Date
Colin Cross
421186e710 ARM: tegra: clock: Round rate before setting rate
Call the clock's round_rate op, if it exists, before calling
the set_rate op.  This will help later when dvfs is added,
dvfs needs to know what the final rate will be before the
frequency changes.

Also requires fixes to the round rate functions to ensure
calling round rate and then set rate will not cause the
frequency to be rounded down twice.  When picking clock
divider values, the clock framework picks the closest
frequency that is lower than the requested frequency.  If
the new frequency calculated from the divider value is
rounded down, and then passed to set_rate, it will get
rounded down again, possibly resulting in a frequency two
steps lower than the original requested frequency.

Fix the problem by rounding up when calculating the frequency
coming out of a clock divider, so if that frequency is
requested again, the same divider value will be picked.

Signed-off-by: Colin Cross <ccross@android.com>
Acked-by: Olof Johansson <olof@lixom.net>
2011-02-22 11:22:34 -08:00
Colin Cross
9743b38969 ARM: tegra: clock: Add function to set SDMMC tap delay
The SDMMC controllers have extra bits in the clock source
register that adjust the delay between the clock and data
to compenstate for delays on the PCB.  The values need to
be set from the clock code so the clock can be locked
during the read-modify-write on the clock source register.

Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Colin Cross <ccross@android.com>
2011-02-21 00:16:47 -08:00
Colin Cross
4db4afb4df ARM: tegra: clock: Minor cleanups
Remove unnecessary uses of #ifdef CONFIG_DEBUG_FS
Convert bool assignments from 1 to true

Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Colin Cross <ccross@android.com>
2011-02-21 00:10:46 -08:00
Colin Cross
4729fd7a7d ARM: tegra: clock: Convert global lock to a lock per clock
Give each clock its own lock, and remove all lock traversals from
parent to child clocks to prevent AB-BA deadlocks.

This brings the locking in line with the common struct clk
patches and should make conversion simple.

Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Colin Cross <ccross@android.com>
2011-02-21 00:10:43 -08:00
Colin Cross
41cfe3676d ARM: tegra: clock: Drop CPU dvfs
The existing version did not extend well to core dvfs, drop it
for now until the new clk api with clk_prepare and clk_unprepare
is ready and non-atomic clocks are possible.

Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Colin Cross <ccross@android.com>
2011-02-21 00:10:06 -08:00
Colin Cross
f035530b79 ARM: tegra: clock: Initialize clocks that have no enable
Assume that any clock that has no enable op is always on.

Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Colin Cross <ccross@android.com>
2011-02-21 00:09:12 -08:00
Colin Cross
bd41ef55e8 ARM: tegra: clock: Drop debugging
Drop the unnecessary pr_debug calls to avoid having to maintain them.

Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Colin Cross <ccross@android.com>
2011-02-20 23:36:50 -08:00
Jean-Christop PLAGNIOL-VILLARD
6d803ba736 ARM: 6483/1: arm & sh: factorised duplicated clkdev.c
factorise some generic infrastructure to assist looking up struct clks
for the ARM & SH architecture.

as the code is identical at 99%

put the arch specific code for allocation as example in asm/clkdev.h

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-11-26 10:51:04 +00:00
Colin Cross
71fc84cc35 [ARM] tegra: clock: Add dvfs support, bug fixes, and cleanups
- Add drivers to clock lookup table
- Add new pll_m entries
- Support I2C U16 divider
- Fix rate reporting on 32.768kHz clock
- Call propagate rate only if set_rate succeeds
- Add support for audio_sync clock
- Add 24MHz to PLLA frequency list
- Correct i2s1/2/spdifout mux
- Add suspend support
- Fix enable/disable parent clocks in set_parent
- Add max_rate parameter to all clocks
- DVFS support
- Add virtual cpu clock with dvfs
- Support clk_round_rate
- Fix requesting very high periph frequencies
- Add quirks for PLLU:
   PLLU is slightly different from the rest of the PLLs.  The
   lock enable bit is at bit 22 instead of 18 in the MISC
   register, and the post divider field is a single bit with
   reversed values from other PLLs.
- Simplify recalculating clock rates
- Fix UART divider flags
- Remove unused clock ops

Signed-off-by: Colin Cross <ccross@android.com>
2010-10-21 18:12:19 -07:00
Colin Cross
d861196163 [ARM] tegra: Add clock support
v2: fixes from Russell King:
	- include linux/io.h instead of asm/io.h
	- fix whitespace in Kconfig
	- Use spin_lock_init to initialize lock
	- Return -ENOSYS instead of BUG for unimplemented clock ops
	- Use proper return values in tegra2 clock ops
    additional changes:
	- Rename some clocks to match dev_ids
	- add rate propagation
	- add debugfs entries
	- add support for clock listed in clk_lookup under multiple dev_ids
v3:
	- Replace per-clock locking with global clock lock
	- Autodetect clock state on init
	- Let clock dividers pick next lower possible frequency
	- Add support for clock init tables
	- Minor bug fixes
	- Fix checkpatch issues

Signed-off-by: Colin Cross <ccross@android.com>
2010-08-05 14:51:42 -07:00