Commit Graph

9 Commits

Author SHA1 Message Date
Patrice Chotard
d6d854cc1c ARM: dts: STi: Fix bindings notation
Remove leading 0x and 0s from bindings notation
Add missing unit-address and remove some which are useless.

This allows to fix several warnings like :

Warning (unit_address_vs_reg): Node XXXX has a reg or ranges property, but no unit name
Warning (simple_bus_reg): Node XXXX simple-bus unit address format error, expected "123456"
Warning (unit_address_vs_reg): Node XXXX has a unit name, but no reg property

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-02-12 15:24:26 +01:00
Rob Herring
8dccafaa28 arm: dts: fix unit-address leading 0s
Fix dtc warnings for 'simple_bus_reg' due to leading 0s. Converted using
the following command:

perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find arch/arm/boot/dts -type -f -name '*.dts*'

Dropped changes to ARM, Ltd. boards LED nodes and manually fixed up some
occurrences of uppercase hex.

Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-10-20 00:37:54 +02:00
Peter Griffin
97a0b97f9e ARM: dts: stih410-clocks: Add PROC_STFE as a critical clock
Once the ST frontend demux HW IP has been enabled, the clock can't
be disabled otherwise the system will hang and the board will
be unserviceable.

To allow balanced clock enable/disable calls in the driver we use
the critical clock infrastructure to take an extra reference on the
clock so the clock will never actually be disabled.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2016-10-20 16:20:26 +02:00
Gabriel Fernandez
9bc4ec59ab ARM: dts: STiH410: Enable synchronous clock mode for video clocks
This patch enables the synchronous clock mode for video clocks
on STiH410 board.

Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
2016-09-16 09:42:11 +02:00
Gabriel Fernandez
66ac420ab3 ARM: dts: STiH410: Enable clock propagation for audio clocks
This patch is used in the clock driver to apply a clock propagation
flag on the audio clocks of STiH410

Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
2016-09-16 09:42:09 +02:00
Gabriel Fernandez
665c8ec122 ARM: dts: STiH4xx: Simplify clock binding of STiH4xx platforms
This patch simplifies the clock binding because we had too much detail.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
2016-09-16 09:41:59 +02:00
Lee Jones
f221d8100e ARM: sti: stih410-clocks: Identify critical clocks
Lots of platforms contain clocks which if turned off would prove fatal.
The only way to recover is to restart the board(s).  This driver takes
references to clocks which are required to be always-on.  The Common
Clk Framework will then take references to them.  This way they will
not be turned off during the clk_disabled_unused() procedure.

In this patch we are identifying clocks, which if gated would render
the STiH410 development board unserviceable.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
2016-07-12 13:22:51 +02:00
Gabriel Fernandez
5eb26c6059 ARM: STi: DT: Rename st_pll3200c32_407_c0_x into st_pll3200c32_cx_x
Use a generic name for this kind of PLL

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2015-07-22 11:41:33 +02:00
Peter Griffin
b16b77a5c1 ARM: STi: DT: STiH410: Add STiH410 SoC and b2120 board support.
The STiH410 is an advanced multi-HD AVC processor with 3D graphics acceleration
and 1.5-GHz ARM Cortex-A9 SMP CPU part of the stih407 family.

It has wide connectivity including USB 3.0, PCI-e, SATA and gigabit ethernet.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-11-18 12:54:56 +01:00