- Clock tree support
- Clock management support using PM core
- Keystone config update for EMDA with ack from Vinod
- Enable SPI and I2C drivers
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJSV0ACAAoJEHJsHOdBp5c/ExIP/1DYAcJoHnSx0MZwXIl0mmHu
klHWr1QDH+kqwlbxnylAJ8LgsPFDmhdW0TD1vuvSBYjH19Yrm4HwWNLJ1V26F0uq
kd3fVYTx8Zm5YNk6kI4SJDeWC3GPtB6QgSwenTv9LpRggM99vkw9iLLEouuVKK0C
AzDNg4CI+8pHRZIqWoGS5o0e14+x1zCcORL3J4mpsgbT88Lu0lbuKuPLhGquuWRP
FeCvL8CSc4iqP81eFm1vy5Gix6bOIPaXCkey8xeMCKUhx4po1kj5hdiPwDlm4w8R
M8iMotbaeZazo8tZGy2++XA4viAaIWbioDi/AhvfVuoSdtsHK6X/7+bnhK77R7wh
rpVyhlnHSewFHLMDd5IE+mVGpzBkp2neLFwY5xbS/Acqplwcdlpa9cbQk/lYXZ7k
0esShfBgMf42h+bWMXpgxV8To4Qisy0bQ723AKEZwgVVM8YkKNNwIHO70rEqWp5+
M7qtKJF6AfvH8IRWwTB9Ce99g6k3OAfidDEgC7BMLKv3zc6/bTR1N4xjobp109eq
sSgVfZERdnBriNvjZWxICpCqoMVN8hqkL4IeLR16s3cXuU8H4rxq5HqnH5/AEDa5
1agJYGnE0CzmurMCyMrsT9IQjd7C+zJftp7TrO2y48OzAQKW4wdbuK6xPH0chFR0
dtMA3wY/nB+FOb51bmnf
=d2uA
-----END PGP SIGNATURE-----
Merge tag 'keystone-soc-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/soc
From Santosh Shilimkar:
SOC updates for Keystone II devices:
- Clock tree support
- Clock management support using PM core
- Keystone config update for EMDA with ack from Vinod
- Enable SPI and I2C drivers
* tag 'keystone-soc-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone: (510 commits)
ARM: keystone: Enable I2C and SPI bus support
ARM: keystone: Select TI_EDMA to be able to enable SPI driver
dma: Allow TI_EDMA selectable for ARCH_KEYSTONE
ARM: dts: keystone: Add the SPI nodes
ARM: dts: keystone: Add i2c device nodes
ARM: keystone: add PM domain support for clock management
ARM: keystone: Enable clock drivers
ARM: dts: keystone: Add clock phandle to UART nodes
ARM: dts: keystone: Add clock tree data to devicetree
+Linux 3.12-rc4
Signed-off-by: Kevin Hilman <khilman@linaro.org>
This header file is no longer needed now that the ARM sched_clock
framework is generic and all users have moved to linux/sched_clock.h
instead of asm/sched_clock.h. Remove it.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
The sched_clock.h include is under include/linux now.
Cc: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Fengguang Wu, Oleg Nesterov and Peter Zijlstra tracked down
a kernel crash to a GCC bug: GCC miscompiles certain 'asm goto'
constructs, as outlined here:
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58670
Implement a workaround suggested by Jakub Jelinek.
Reported-and-tested-by: Fengguang Wu <fengguang.wu@intel.com>
Reported-by: Oleg Nesterov <oleg@redhat.com>
Reported-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Suggested-by: Jakub Jelinek <jakub@redhat.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: <stable@kernel.org>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Pull kbuild fix from Michal Marek:
"Here is an ARM Makefile fix that you even acked. After nobody wanted
to take it, it ended up in the kbuild tree"
* 'rc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild:
arm, kbuild: make "make install" not depend on vmlinux
Select the TI EDMA to be able to enable SPI driver on Keystone
SOCs. Keystone SOCs share the EDMA IP with other TI SOCs.
Note that EDMA support hasn't been added and tested yet for
Keystone SOC data(device tree), but building it, is harmless since
driver like SPI already takes care of supporting non-dma mode
in the absence of such data.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Keystone2 based SOCs supports 3 instances of SPI controllers. Add
the device nodes for them.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Keystone2 based SOCs supports 3 instances of i2c controllers. Add
the device nodes for them. The i2c0 child device AT24C1024 EEPROM node
is also added. When different board variants are added in future, it
can be moved to the supported boards from common SOC file.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Add runtime PM core support to Keystone SOCs by using the pm_clk
infrastructure of the PM core. Patch is based on Kevin's pm_domain
work on DaVinci SOCs.
Keystone SOC doesn't have depedency to enable clocks in early
in the boot and hence the clock and PM domain initialisation is done
at subsys_init() level.
Cc: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* Constify platform data and resources in lager board code
* Clean up registration of VIN and sh_eth in r8a7778 SoC and
bockw board code
* Make r8a7778_register_hspi() static in r8a7778 SoC code
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJSU5WFAAoJENfPZGlqN0++v5UP/26wi2e77h/7UMTmMq9HO0R3
L1LAyITkzFxvm1yiReoVT9ovs9XdxWG0SLhE/H/e8iqnWtNvPfPCVETPeegkCayA
ELFX+zc+c/dnGXOazY4rK1K+kPeR4aTBPNpkGLcpcxGlnSeBG2s8mpOHLeAMDWcW
A7iN8S/irWj0dtQ4b9QtrYzkU5mIa7E6vvYmAVWfJiOC5MN1cjMLEgGXm4EgVuwg
MkG33H8CnytO+QhC4EhAYOjROQ+t4Q0j9fFdq9AAJ5sL9VKm/83PQx198ikQY0yQ
rNbyn6dIzOp5cSJ1x3DzNegVtp6pCbiBvBjJmhLMX6YITRFEzXolxTSU6jU1+wZg
6wZ9d62tX8pGBxq/OV6harggZnjJ4jVDiJ72BTQ1R9c1SWcnQDd1/lFC/Xpxu7ku
dzzFxZnoB3tltkYI+AiJPhow8XsGaQFv22o3DyliHeHw/jBYho3v5/Y5Pzms0bCm
RwftNJx1FPa6j8MM8PYLnmklogSFSMquMAj8dtLE5w7pKaA1/s9n5KWB3UYagok2
cLWu7XOo0itw6+E/FMzJY1owvvHPka2F1W+Qad5GOlu8Qcc+Ys79UXd6JELOV8eX
yXHMqioTY5GWS0tnLAYjocEctHEYAORI7daoAtdGAHEhG93jLC8+Y7+U2h0Fx412
TdbcRFkrAeKD8T0zLJoy
=ZNhN
-----END PGP SIGNATURE-----
Merge tag 'renesas-cleanup2-for-v3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/cleanup
From Simon Horman:
Second round of Renesas ARM based SoC cleanups for v3.13
* Constify platform data and resources in lager board code
* Clean up registration of VIN and sh_eth in r8a7778 SoC and
bockw board code
* Make r8a7778_register_hspi() static in r8a7778 SoC code
* tag 'renesas-cleanup2-for-v3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: lager: Constify platform data and resources
ARM: shmobile: r8a7778: r8a7778_register_hspi() become static
ARM: shmobile: r8a7778: cleanup registration of sh_eth
ARM: shmobile: r8a7778: cleanup registration of vin
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Conflicts:
arch/arm/mach-shmobile/board-lager.c
* SMP support for r8a7791 SoC
* r8a7779_init_irq_extpin() for DT for r8a7779 and r8a7778 SoCs
* Add HPB-DMAC to r8a7779 and r8a7778 SoCs
* Add r7s72100 SoC
* Make use of ARCH timer workaround on r8a7791 SoC
* Add IRQC platform device support to r8a7791 SoC
* Add I2C clocks and aliases for the DT mode for r8a7790 SoC
* Add MAC platform device to r8a73a4 SoC
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJSVNx0AAoJENfPZGlqN0++8AgP/2lhZpPt2bClp73YdhOajNhA
Vd9N8b48L7J8ERVc8aoXaVJa3y4l3gt6eVpwjamic0lTzN3tiHex+GFmLwJb44fT
xZu3V2+D5YPwQ7mGbTNrRWDeg4dRE4z6CHw6mHmSr2Iq/dVPKxlb9JCfuQlKcgVx
iKA1yYhB30F165izsaG6jW3bxO+afG2nr07byE43Gy+j7VBaV+LUeKS2Nr7UQ8Is
3iNf1YIXGZTXsKlonKjXVwsdBFTOUcDqwwDPmdzzO0aLMSc8Fw+GaiznK8nYXff5
zSeeoXFCdBbhloiPbe9TX+qFWk15Oswctgt82GMO4kVp+WLWFc5uRYgtUvN96TTh
GL0WCIT74wNYc4voCdmuqU9FGNPHFUjb5MktN0x9AbFjz1ydE01eLDSrH7lwNHSW
XJSTzdk5rLWyKAHH8pP5dMfjebRr4sAOIfNuyfzf3Y+U1BzRe9WdmoGbrFE6rV3T
r2qC2jaxfKbHItbndKYeX8uhHboOD9Uid2xlFvAvGAK4qZKbuWREX/tSHSCE2RPg
9xZ4y6/M/qFxC/geAHOf/tWcoYafxrpTgOp5aBhfi70U8tSbfXPCfVsg/fR35Lbc
eyoIOkSZC4mQEi7MIlPs3Jelo72+FtlUUKHYzAHhPj6pW4SwaMO5El56EA7My6DA
T6Ow4Wqglujtt7J8fYs6
=4wdR
-----END PGP SIGNATURE-----
Merge tag 'renesas-soc2-for-v3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
From Simon Horman:
Second Round of Renesas ARM based SoC updates for v3.13
* SMP support for r8a7791 SoC
* r8a7779_init_irq_extpin() for DT for r8a7779 and r8a7778 SoCs
* Add HPB-DMAC to r8a7779 and r8a7778 SoCs
* Add r7s72100 SoC
* Make use of ARCH timer workaround on r8a7791 SoC
* Add IRQC platform device support to r8a7791 SoC
* Add I2C clocks and aliases for the DT mode for r8a7790 SoC
* Add MAC platform device to r8a73a4 SoC
* tag 'renesas-soc2-for-v3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7791 SMP support
ARM: shmobile: r8a7779: split r8a7779_init_irq_extpin() for DT
ARM: shmobile: r8a7778: split r8a7778_init_irq_extpin() for DT
ARM: shmobile: r7s72100 SCIF support
ARM: shmobile: Initial r7s72100 SoC support
ARM: shmobile: r8a7791 Arch timer workaround
ARM: shmobile: r8a7791 IRQC platform device support
ARM: shmobile: Introduce r8a7791_add_standard_devices()
ARM: shmobile: Break out R-Car Gen2 setup code
ARM: shmobile: r8a73a4: add a clock alias for the DMAC in DT mode
ARM: shmobile: r8a7790: add I2C clocks and aliases for the DT mode
ARM: shmobile: r8a7779: add HPB-DMAC support
ARM: shmobile: r8a7778: add HPB-DMAC support
ARM: shmobile: r8a73a4: add a DMAC platform device and clock for it
ARM: shmobile: Remove #gpio-ranges-cells DT property
gpio: rcar: Remove #gpio-range-cells DT property usage
ARM: shmobile: armadillo: fixup ether pinctrl naming
ARM: shmobile: Lager: add Micrel KSZ8041 PHY fixup
ARM: shmobile: update SDHI DT compatibility string to the <unit>-<soc> format
Signed-off-by: Kevin Hilman <khilman@linaro.org>
The realtime counter called master counter, produces the count
used by the private timer peripherals in the MPU_CLUSTER. The
CNTFRQ per cpu register is used to denote the frequency of the counter.
Currently the frequency value is passed from the
DT file, but this is not scalable when we have other non-DT guest
OS. This register must be set to the right value by the
secure rom code. Setting this register helps in propagating the right
frequency value across OSes.
More discussions and the reason for adding this in a non-DT
way can be seen from below.
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg93832.html
So configuring this secure register for all the cpus here.
Cc: Nishanth Menon <nm@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Tested-by: Nishanth Menon <nm@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Now that we have DT bindings to specify which devices should not
be reset and idled during init, make hwmod extract the information
(and store them in internal flags) from Device tree.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
[paul@pwsan.com: updated to apply]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
For modules/IPs/hwmods which do not have
-1- sys->class->reset()
and
-2- hardreset lines
and
-3- No way to do an ocp reset (no sysc control)
the flag 'HWMOD_INIT_NO_RESET' is not much useful.
Cleanup all such instances across various hwmod data files.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add the missing sysc configuration to the AM335 spinlock hwmod
data. This ensures that smart-idle is enabled whenever the module
is enabled by the driver.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add the hwmod data for the spinlock IP in OMAP5 SoC.
This is needed to be able to enable the OMAP spinlock
support for OMAP5.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add hwmod data for High Speed USB host and TLL modules
CC: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
This patch adds Synchronous Serial Interface (SSI) hwmod support for
OMAP34xx SoCs.
Signed-off-by: Sebastian Reichel <sre@debian.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
The hwmod init sequence involves initializing and idling all the
hwmods during bootup. If a module class has sysconfig, the init
sequence utilizes the module register base for performing any
sysc configuration.
The module address space is being removed from hwmod database and
retrieved from the <reg> property of the corresponding DT node.
If a hwmod does not have its corresponding DT node defined and the
memory address space is not defined in the corresponding
omap_hwmod_ocp_if, then the module register target address space
would be NULL and any sysc programming would result in a NULL
pointer dereference and a kernel boot hang.
Handle this scenario by checking for a valid module address space
during the _init of each hwmod, and leaving it in the registered
state if no module register address base is defined in either of
the hwmod data or the DT data.
Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
[paul@pwsan.com: use -ENXIO rather than -ENOMEM to indicate a missing address
space error; fixed checkpatch.pl problem]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
OMAP5 ES1.0 was intended as a test chip and has major register level
differences w.r.t ES2.0 revision of the chip. All register defines,
dts support has been solely added for ES2.0 version of the chip.
Further, all ES1.0 chips and platforms are supposed to have been
removed from circulation. Hence, there is no need to further retain
any resemblence of ES1.0 support in id detection code.
Remove the omap_revision handling and BUG() instead to prevent folks
who mistakenly try an older unsupported chip and report bogus errors.
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The real time counter also called master counter, is a free-running
counter. It produces the count used by the CPU local timer peripherals
in the MPU cluster. The timer counts at a rate of 6.144 MHz.
The ratio registers are missing for a sys-clk of 20MHZ which is used
by DRA7 socs. So because of this, the counter was getting wrongly
programmed for a sys-clk of 38.4Mhz(default). So adding the ratio
registers for 20MHZ sys-clk.
Tested-by: Nishanth Menon <nm@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Move omap_vout device creation inside the omap_display_init so that we can
correctly create the device based on the presence of omapdss within the
platform.
For example, on a kernel image supporting multiple platforms, omap_init_vout
will create a omapdrm platform device on a AM33xx platform even though it
doesn't have a DSS block.
Signed-off-by: Archit Taneja <archit@ti.com>
Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Move omapfb and omapvrfb device creation inside the omap_display_init so that
we can correctly create the device based on the presence of omapdss within the
platform.
For example, on a kernel image supporting multiple platforms, omap_init_vrfb and
omap_init_fb will create omapvrfb and omapfb platform devices respectively on a
AM33xx platform even though it doesn't have a VRFB or DSS block.
Signed-off-by: Archit Taneja <archit@ti.com>
Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Move omapdrm device creation inside the omap_display_init so that we can
correctly create the device based on the presence of omapdss within the
platform.
For example, on a kernel image supporting multiple platforms, omap_init_drm
will create a omapdrm platform device on a AM33xx platform even though it
doesn't have a DSS block.
Originally worked on by Andy Gross.
Cc: Andy Gross <andygro@gmail.com>
Signed-off-by: Archit Taneja <archit@ti.com>
Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
DMM exists on omap4+ platforms, these platforms are always expected to boot with
DT. Remove the current method of searching the dmm hwmod and building an
omap_device for dmm.
For OMAP4, the address and irq data for DMM hwmod(along with other blocks) were
removed, so the current method fails in the dmm driver's probe anyway.
The addition of DMM nodes in DT will ensure that a DMM device is built
correctly.
Cc: Andy Gross <andygro@gmail.com>
Signed-off-by: Archit Taneja <archit@ti.com>
Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
ARCH_TEGRA_124_SOC: Tegra124 SoC support.
CPU_FREQ_STAT_DETAILS: Enables various sysfs files that are useful when
testing cpufreq.
CONFIG_COMMON_CLK_DEBUG: Useful to look at the clock tree to verify that
clocks for the various devices have been properly set up.
PINCTRL_PALMAS: Used on Dalmore board.
NEON: Enables SIMD instruction support for Tegra30 and later SoCs.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Now since the clock tree is added, update UART dt nodes with clock data
and remove the hard coded clock frequency.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Adding this driver as platform device and only for RX-51 until somebody test if
it working also on other OMAP3 HS devices and until there will be generic ARM
way to deal with SMC calls.
Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
[tony@atomide.com: folded in the clock alias change]
Signed-off-by: Tony Lindgren <tony@atomide.com>
Closed and signed Nokia X-Loader bootloader stored in RX-51 nand does not set
IBE bit in ACTLR and starting kernel in non-secure mode. So direct write to
ACTLR by our kernel does not working and the code for ARM errata 430973 in
commit 7ce236fcd6 that sets IBE bit is a noop.
In order to have workaround for ARM errata 430973 from non-secure world on
RX-51 we needs Secure Monitor Call to set IBE BIT in ACTLR.
This patch adds RX-51 specific secure support code and sets IBE bit in ACTLR
during board init code for ARM errata 430973 workaround.
Note that new function rx51_secure_dispatcher() differs from existing
omap_secure_dispatcher(). It calling omap_smc3() and param[0] is nargs+1.
ARM errata 430973 workaround is needed for thumb-2 ISA compiled userspace
binaries. Without this workaround thumb-2 binaries crashing. So with this
patch it is possible to recompile and run applications/binaries with thumb-2
ISA on RX-51.
Signed-off-by: Ivaylo Dimitrov <freemangordon@abv.bg>
Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Here is new version (v4) of omap secure part patch:
Other secure functions omap_smc1() and omap_smc2() calling instruction smc #0
but Nokia RX-51 board needs to call smc #1 for PPA access.
Signed-off-by: Ivaylo Dimitrov <freemangordon@abv.bg>
Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
File drivers/leds/leds-lp55xx-common.c refuse to change led_current sysfs
attribute if value is higher than max_current specified in board file. By default
global C variables are zero, so changing always failed. This patch adding missing
max_current and setting it to max safe value 100 (10 mA).
It is unclear which commit exactly caused this regression as the lp5523
driver was broken and was hiding the platform data breakage. Now
the driver is fixed so this should be fixed as well.
Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
Signed-off-by: Joerg Reisenweber <joerg@openmoko.org>
[tony@atomide.com: updated comments to describe regression]
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch adds a omap1510_fpga_init_irq() inline dummy implementations
in arch/arm/mach-omap1/common.h. Without this patch,build system can
lead to issues. This was discovered during randconfig testing,in which
other than CONFIG_ARCH_OMAP15XX was enabled the leading to the following
error:
CC arch/arm/mach-omap1/board-innovator.o
arch/arm/mach-omap1/board-innovator.c: In function ‘innovator_init’:
arch/arm/mach-omap1/board-innovator.c:377:3: error: implicit declaration of
function ‘omap1510_fpga_init_irq’ [-Werror=implicit-function-declaration]
cc1: some warnings being treated as errors
make[1]: *** [arch/arm/mach-omap1/board-innovator.o] Error 1
make: *** [arch/arm/mach-omap1] Error 2
Signed-off-by: Manjunath Goudar <csmanjuvijay@gmail.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-omap@vger.kernel.org
Signed-off-by: Tony Lindgren <tony@atomide.com>
Since dra7 reuses the function 'omap5_realtime_timer_init' in
arch/arm/mach-omap2/board-generic.c as timer init function, it has to be
built for this SoC as well.
Signed-off-by: Simon Barth <Simon.Pe.Barth@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The wake-up interrupt bit is available on omap3/4/5 processors
unlike what we claim. Without fixing it we cannot use it on
omap3 and the system configured for wake-up events will just
hang on wake-up.
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Benoît Cousson <bcousson@baylibre.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: Tony Lindgren <tony@atomide.com>
SoC family definitions at the moment are reactive to board needs
as a result, beagle-xm would matchup with ti,omap3 which invokes
omap3430_init_early instead of omap3630_init_early. Obviously, this is
the wrong behavior.
With clock node dts conversion, we get the following warnings before
system hangs as a result and 3630 based platforms fails to boot
(uart4 clocks are only present in OMAP3630 and not present in
OMAP3430):
...
omap_hwmod: uart4: cannot clk_get main_clk uart4_fck
omap_hwmod: uart4: cannot _init_clocks
WARNING: CPU: 0 PID: 1 at arch/arm/mach-omap2/omap_hwmod.c:2434
_init+0x6c/0x80()
omap_hwmod: uart4: couldn't init clocks
...
WARNING: CPU: 0 PID: 1 at arch/arm/mach-omap2/omap_hwmod.c:2126
_enable+0x254/0x280()
omap_hwmod: timer12: enabled state can only be entered from
initialized, idle, or disabled state
...
WARNING: CPU: 0 PID: 46 at arch/arm/mach-omap2/omap_hwmod.c:2224
_idle+0xd4/0xf8()
omap_hwmod: timer12: idle state can only be entered from enabled state
WARNING: CPU: 0 PID: 1 at arch/arm/mach-omap2/omap_hwmod.c:2126
_enable+0x254/0x280()
omap_hwmod: uart4: enabled state can only be entered from
initialized, idle, or disabled state
So, add specific compatiblity for 3630 to allow match for Beagle-XM
platform.
Signed-off-by: Nishanth Menon <nm@ti.com>
[tony@atomide.com: left out ti,omap343x, updated comments]
Signed-off-by: Tony Lindgren <tony@atomide.com>
Ethernet IP on Kirkwood SoCs loose their MAC address register content
if clock gated. To allow modular ethernet driver setups and gated clocks
also on non-DT capable bootloaders, we fixup port device nodes with no
valid MAC address property. This patch copies MAC address register
contents set up by bootloaders early, notably before ethernet clocks
are gated. While at it, also reorder call sequence in _dt_init.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Reviewed-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Reviewed-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Reviewed-by: Mike Turquette <mturquette@linaro.org>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Since the PCIe devices is properly initialized from the DT, the clocks
are now referenced in the device tree nodes, and it's not needed
to have this hack to add them explicitly.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Tested-by: Arnaud Ebalard <arno@natisbad.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Since the MBus is initialized from the DT, it's not necessary to
call the legacy initialization.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Implements standby support for Kirkwood SoC. When the SoC enters
standby state the memory PM units are disabled, the DDR is set
in self-refresh mode, and the CPU is set in WFI.
At this point there's no clock gating, as that is considered each
driver's task.
Signed-off-by: Simon Guinot <sguinot@lacie.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
So far, the Allwinner SoCs were only supported using the
multi_v7_defconfig. Add a defconfig of our own to have one a bit more
tailor-made.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This patch adds missing INTC IRQ settings
which is required from SMSC.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable r8a7791 SMP support code on the Koelsch board.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Now when the legacy DTS file emev2-kzm9d.dts can be
used with board-kzm9d.c and board-kzm9d-reference.c
proceed with removing emev-kzm9d-reference.dts.
Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Let the multiplatform KZM9D support boot with the
legacy DTS for KZM9D as well as the KZM9D reference DTS.
Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Now when CCF is supported remove the legacy KZM9D reference
Kconfig bits CONFIG_MACH_KZM9D_REFERENCE for the non-multiplatform
case.
Starting from this commit KZM9D board support is always enabled
via CONFIG_MACH_KZM9D, and CONFIG_ARCH_MULTIPLATFORM is used
to select between board-kzm9d.c and board-kzm9d-reference.c
The file board-kzm9d-reference.c can no longer be used together
with the legacy sh-clk clock framework, instead CCF is used.
Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Change the multiplatform kconfig bits for KZM9D from
CONFIG_MACH_KZM9D_REFERENCE into CONFIG_MACH_KZM9D
to match the non-multiplatform case.
Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Copy the device nodes from KZM9D reference into the KZM9D
device tree file. This will allow us to use a single DTS
file regarless of kernel configuration. In case of legacy
C board code the device nodes may or may not be used, but
in the multiplatform case all the DT device nodes are used.
Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Make use of the R-Car Gen2 arch timer workaround on Koelsch.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Use r8a7791_add_standard_devices() on Koelsch to let
the C version of the board code add on-chip devices.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Genmai base board support making use of 128 MiB of memory,
the r7s7211 SoC with the SCIF2 serial port and CA9 core.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Pass HPB-DMA slave IDs in the SDHI0 platform data to enable DMA in the SDHI
driver.
Signed-off-by: Max Filippov <max.filippov@cogentembedded.com>
[Sergei: removed #include <mach/dma.h>]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Pass HPB-DMA slave IDs in the SDHI0 platform data to enable DMA in the SDHI
driver.
Signed-off-by: Max Filippov <max.filippov@cogentembedded.com>
[Sergei: removed #include <mach/dma.h>]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add DMA support for MMCIF on APE6EVM, using the shdma dmaengine driver.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Tie in the APMU SMP code on r8a7791. When used together
with the secondary CPU device node and smp_ops in the
board specific code then this will allow use of the
two Cortex-A15 cores in the r8a7791 SoC.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
r8a7779 INTC needs IRL pin mode settings to determine
behavior of IRQ0 - IRQ3, and r8a7779_init_irq_extpin()
is controlling it via irlm parameter.
But this function registers renesas_intc_irqpin driver
if irlm was set, and this value depends on platform.
This is not good for DT.
This patch splits r8a7779_init_irq_extpin() function
into "mode settings" and "funtion register" parts
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
r8a7778 INTC needs IRL pin mode settings to determine
behavior of IRQ0 - IRQ3, and r8a7778_init_irq_extpin()
is controlling it via irlm parameter.
But this function registers renesas_intc_irqpin driver
if irlm was set, and this value depends on platform.
This is not good for DT.
This patch splits r8a7778_init_irq_extpin() function
into "mode settings" and "funtion register" parts.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add SCIF serial port support to the r7s72100 SoC by
adding platform devices for SCIF0 -> SCIF7 together with
clock bindings. DT device description is excluded at
this point since such bindings are still under
development.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add initial support for the r7272100 SoC including:
- Single Cortex-A9 CPU Core
- GIC
No static virtual mappings are used, all the components
make use of ioremap(). DT_MACHINE_START is still wrapped
in CONFIG_USE_OF to match other mach-shmobile code.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Make use of the R-Car Gen2 arch timer workaround on r8a7791.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a platform device for the r8a7791 IRQC hardware
driving IRQ pins IRQ0 to IRQ9. The Linux interrupt
number is statically assigned to allow board code
written in C to make use of static interrupt numbers.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Introduce the function r8a7791_add_standard_devices() that
follows the same style as other mach-shmobile SoC code and
allows C version of board code to add on-chip devices.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Move arch timer workaround code and boot mode pin
handling from setup-r8a7790.c to setup-rcar-gen2.c.
With this in place the same code can be used on
other R-Car Generation 2 devices such as r8a7791.
Signed-off-by: Magnus Damm <damm@opensource.se>
[horms+renesas@verge.net.au trivial rebase of board-lager.c
for introduction of lager_add_standard_devices()]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Devices, initialised from the Device Tree and from platform code usually
have different names. This patch adds a clock alias for DMAC on r8a73a4
in DT mode.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds clock definitions for the 4 I2C interfaces on r8a7790 and
clock aliases, suitable for the DT mode.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add HPB-DMAC platform device on R8A7779 SoC along with its slave and channel
configurations (only for SDHI0 so far).
Signed-off-by: Max Filippov <max.filippov@cogentembedded.com>
[Sergei: moved *enum* declaring HPB-DMAC slave IDs from now removed <mach/dma.h>
to <mach/r8a7779.h>, removed #include <mach/dma.h> from setup-r8a7779.c, removed
SSI-related *enum* values and SSI-related data from hpb_dmae_slaves[] and
hpb_dmae_channels[], added ASYNCMDR.ASBTMD{20|24|43} and ASYNCMDR.ASMD{20|24|43}
fields/values, fixed comments to ASYNCMDR.ASBTMD2[123] and ASYNCMDR.ASMD2[123]
fields/values, renamed all the bit/field/value #define's to include 'HBP_DMAE_'
prefix to match the driver, moved comments after the element initializers of
hpb_dmae_channels[].]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add HPB-DMAC platform device on R8A7778 SoC along with its slave and channel
configurations (only for SDHI0 so far).
Signed-off-by: Max Filippov <max.filippov@cogentembedded.com>
[Sergei: moved *enum* declaring HPB-DMAC slave IDs from now removed <mach/dma.h>
to <mach/r8a7778.h>, removed #include <mach/dma.h> from setup-r8a7778.c, removed
SSI-related *enum* values and SSI-related data from hpb_dmae_slaves[] and
hpb_dmae_channels[], moved the comments after the element initializers of
hpb_dmae_channels[].]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a DMAC platform device and clock definitions for it on r8a73a4.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* Remove unused #gpio-ranges-cells DT property
* Remove usage of deprecated #gpio-range-cells DT property
from GPIO R-Car
Property was deprecated in v3.11-rc2
* Correct ether pinctl naming for armadillo800eva board
Regression introduced in v3.10-rc5
* Add Micrel KSZ8041 PHY fixup to lager board
This resolves a problem that has been present since 3.11-rc2
* Update SDHI DT compatibility string to the <unit>-<soc> format
This makes compatibility strings consistent across all renesas
hardware which currently supports DT.
The bindings which are being updated where intorodiced on
a per-SoC basis starting in v3.8-rc7. They may have
been internally consistent when originally added.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJSSPX/AAoJENfPZGlqN0++OYkP/28MR5D2vqT/8zQ91o0AGAXg
CNS0CCekccTM+t7gTRQhgp9khrPmFlFOWrd+S35+eagOIfhCGfABxzCZijSKbai6
HFYuhkTg3UCg1pMaPMCP1H7iV63kZHHocyPOBnb9titplJ0w5GoDh8R2oslDf/62
vYM7XeZO9K99j1YxHH4+jMUws353XBgyQ87nHaQvT9Jhb45ZCXrXADw7sUOaUeEa
Zw3O6mfCb1bOOQqTMcouvPh6va+RNL/G/dREj8FDdrDXOz5KdTekHKON8fluq+LM
nWSUebzBJEMunHAnkncXxDJ229tu2x1j05ex+XwLYKcBx5gJ5omh0ugMOeYnnB8U
wMUpEhnXLGBuNdNS0qR6Ql4wiS+2kKPXDn4sSKOW1ORbHeklFbtfnyZDu+rJfu6n
+lc+KbZFd63ct9IIB2W7D3ZELEgWP3Z82eAXcj6yNcBXIgUYjEihZeFf51EB5EaF
2oIpiAQXbPdnzkUPNSR46h2Kg5w1alJgs5Elu/WO7RF+GT0lBZOrhP8Yxav30h1j
w6JJnG9Oq96TJ4FrzZbX8/Szmhheu8DrAo3JslxT+hjSJv2CweM+8Dbwcp5it+Vw
0rh/efDa84RPDS4YiwSXJQd6/DuskPE04qnry09WS5g67ediBLf1NNX4r26R68l5
plIISkrqCxYxUhNjbOJa
=WVMt
-----END PGP SIGNATURE-----
Merge tag 'renesas-fixes4-for-v3.12' into soc2-base
Fourth Round of Renesas ARM based SoC fixes for v3.12
* Remove unused #gpio-ranges-cells DT property
* Remove usage of deprecated #gpio-range-cells DT property
from GPIO R-Car
Property was deprecated in v3.11-rc2
* Correct ether pinctl naming for armadillo800eva board
Regression introduced in v3.10-rc5
* Add Micrel KSZ8041 PHY fixup to lager board
This resolves a problem that has been present since 3.11-rc2
* Update SDHI DT compatibility string to the <unit>-<soc> format
This makes compatibility strings consistent across all renesas
hardware which currently supports DT.
The bindings which are being updated where intorodiced on
a per-SoC basis starting in v3.8-rc7. They may have
been internally consistent when originally added.
Tie in the APMU SMP code on r8a7791. When used together
with the secondary CPU device node and smp_ops in the
board specific code then this will allow use of the
two Cortex-A15 cores in the r8a7791 SoC.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
r8a7779 INTC needs IRL pin mode settings to determine
behavior of IRQ0 - IRQ3, and r8a7779_init_irq_extpin()
is controlling it via irlm parameter.
But this function registers renesas_intc_irqpin driver
if irlm was set, and this value depends on platform.
This is not good for DT.
This patch splits r8a7779_init_irq_extpin() function
into "mode settings" and "funtion register" parts
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
r8a7778 INTC needs IRL pin mode settings to determine
behavior of IRQ0 - IRQ3, and r8a7778_init_irq_extpin()
is controlling it via irlm parameter.
But this function registers renesas_intc_irqpin driver
if irlm was set, and this value depends on platform.
This is not good for DT.
This patch splits r8a7778_init_irq_extpin() function
into "mode settings" and "funtion register" parts.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add SCIF serial port support to the r7s72100 SoC by
adding platform devices for SCIF0 -> SCIF7 together with
clock bindings. DT device description is excluded at
this point since such bindings are still under
development.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add initial support for the r7272100 SoC including:
- Single Cortex-A9 CPU Core
- GIC
No static virtual mappings are used, all the components
make use of ioremap(). DT_MACHINE_START is still wrapped
in CONFIG_USE_OF to match other mach-shmobile code.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Make use of the R-Car Gen2 arch timer workaround on r8a7791.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a platform device for the r8a7791 IRQC hardware
driving IRQ pins IRQ0 to IRQ9. The Linux interrupt
number is statically assigned to allow board code
written in C to make use of static interrupt numbers.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Introduce the function r8a7791_add_standard_devices() that
follows the same style as other mach-shmobile SoC code and
allows C version of board code to add on-chip devices.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Move arch timer workaround code and boot mode pin
handling from setup-r8a7790.c to setup-rcar-gen2.c.
With this in place the same code can be used on
other R-Car Generation 2 devices such as r8a7791.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Devices, initialised from the Device Tree and from platform code usually
have different names. This patch adds a clock alias for DMAC on r8a73a4
in DT mode.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds clock definitions for the 4 I2C interfaces on r8a7790 and
clock aliases, suitable for the DT mode.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add HPB-DMAC platform device on R8A7779 SoC along with its slave and channel
configurations (only for SDHI0 so far).
Signed-off-by: Max Filippov <max.filippov@cogentembedded.com>
[Sergei: moved *enum* declaring HPB-DMAC slave IDs from now removed <mach/dma.h>
to <mach/r8a7779.h>, removed #include <mach/dma.h> from setup-r8a7779.c, removed
SSI-related *enum* values and SSI-related data from hpb_dmae_slaves[] and
hpb_dmae_channels[], added ASYNCMDR.ASBTMD{20|24|43} and ASYNCMDR.ASMD{20|24|43}
fields/values, fixed comments to ASYNCMDR.ASBTMD2[123] and ASYNCMDR.ASMD2[123]
fields/values, renamed all the bit/field/value #define's to include 'HBP_DMAE_'
prefix to match the driver, moved comments after the element initializers of
hpb_dmae_channels[].]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add HPB-DMAC platform device on R8A7778 SoC along with its slave and channel
configurations (only for SDHI0 so far).
Signed-off-by: Max Filippov <max.filippov@cogentembedded.com>
[Sergei: moved *enum* declaring HPB-DMAC slave IDs from now removed <mach/dma.h>
to <mach/r8a7778.h>, removed #include <mach/dma.h> from setup-r8a7778.c, removed
SSI-related *enum* values and SSI-related data from hpb_dmae_slaves[] and
hpb_dmae_channels[], moved the comments after the element initializers of
hpb_dmae_channels[].]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a DMAC platform device and clock definitions for it on r8a73a4.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* Add CPU notifier based SCU boot vector code
- Use on emev2, r8a7779 and sh73a0 SoCs
- Remove now unused shmobile_smp_scu_boot_secondary()
* Add shared APMU SMP support code
- Use to add SMP support for r8a7790 SoC
* Introduce shmobile_boot_size
* Expose shmobile_invalidate_start()
* Introduce shmobile_smp_cpu_disable()
- Use on sh73a0 SoC
- Remove now unused shmobile_smp_init_cpus()
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJSST7gAAoJENfPZGlqN0++XFoP/0RsM7u+sD0gzoNDQzhK0GHp
BKi46te3Wo5A0uuYKW+QxMNXKvIvRFtc/IAmIGEtm+WpNA4W/n6r0WVQWcsl9W1V
f83qXVUFkdQ6B+UOy8jass+cNPYG34AjPuUkbEyY8pakvMEu81NfkIrJTdN4Yooz
Al9nHRQxGz7G7zjYxPvUalu5fHnPw+gTN4gh5xkSyFup6MBq8LNbJh7xY+YGezuy
xr+8EJYIlFXNO7regCp2fhRj8yRgmEjvf1At8iUl9f3HoIfYGNc2gUsPIqYdHTpX
0EppCVtiMUMl2M0ujI9p+yN7m6qMLkT6vGfPvUHwly3A+L5hYGJCKowS6Y9EMgKB
1NMco0azKzcoEnZOmgAHbi1ubJsEzLY7Bpbj3W6J+1khTdP1qOu7u2Db1MwZ08Gx
ofwtNvFgE9EmiDaAeqMoyani8qJjvVu/+s/vickcZ1EzhcYY1qPi4IpBjBymlGnI
oTioQ20czOvU11WT90mw/jlTTdO9FqNOv9owyTCQveWH5n2PVI+hj26oNgUWLaB8
w6YYMzHiTPwjGfIIub10MZRdMSp1nb3+HtWZW+Wd523CuzQsk5akOgrs9iqYE3rW
4PBrniBwHX+7pJnlC47RQJoh6QI4RhML/xthQfIoze/I3eDZi0x5p2LiG59u7opA
kusLdSS609D4iYrBkBxt
=Tn0W
-----END PGP SIGNATURE-----
Merge tag 'renesas-smp-for-v3.13' into soc2-base
Renesas ARM based SoC SMP updates for v3.13
* Add CPU notifier based SCU boot vector code
- Use on emev2, r8a7779 and sh73a0 SoCs
- Remove now unused shmobile_smp_scu_boot_secondary()
* Add shared APMU SMP support code
- Use to add SMP support for r8a7790 SoC
* Introduce shmobile_boot_size
* Expose shmobile_invalidate_start()
* Introduce shmobile_smp_cpu_disable()
- Use on sh73a0 SoC
- Remove now unused shmobile_smp_init_cpus()
mach-exynos{4,5}-dt.c include several header files that are not
really used.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* Add defconfig for koelsch board
* Enable sound in defconfig for bockw board
* Enable R-Car DU DRM in defconfig for lager and marzen boards
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJSSRtLAAoJENfPZGlqN0++Y84P/0dPggc0BgtfMTiL1gnKZezW
FHuu0gkeWO7W29V39FUQXjh13DXhoxZdM97cvZ1tDc2kq6hcsn8QDlKfmc6dTQUc
mW1S5UTQjPOCCKJAovF72tRCDxQ5wYm8u+Xiv/eFFlvsWklPEO9A4cKIdX9RqSgs
9ee9xzP6M9OVejRaEwx4GMpqgYYPg0Lic/h9cT8Zs2ubie0ngZOKlAECsIr4FgEJ
iLwDMZGLdf6WhyTc3XAFVcru7yA1SI/gVmdS9yTpseUxBYE0pg+STbk4E0O+YwnC
TuuBlWBjTjDbP5+b2m9p0oumf4mMsqNYR7glOILK+S2AUheKD2J3foaQMrjnl5jm
yAfBkRmm2ZD9t0AS16sR2im7q+dOr9BZmVJcksAgbIvMGgWs9J2/kXL0GjqFSCyX
6DP1EbuXu+lWQCLxJ68dDBD834FcPzbl88V3kXSuCHpLghpNQ4k9xb3PowMelyAr
tLiptTIQKJVZD48i8ZWhvoJSN5wfy4hMGfL5xKBm26vjYtFxSCI1ovYzrXWy2GkT
a7L3adPqI0dYVNkthVxdkjSd8mlyn+mRhGzEZAEGAqMjQenPX6re/VV4xESDNHVS
p+s8rrnWyPVG14omXBexqpgbmEdntPlp5r5g+P4VxEwFRTEWkv68mClgLObLcAO6
vZubuSK8Uwi/ZFYeBh8+
=oHig
-----END PGP SIGNATURE-----
Merge tag 'renesas-defconfig-for-v3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/boards
From Simon Horman:
Renesas ARM based SoC defconfig updates for v3.13
* Add defconfig for koelsch board
* Enable sound in defconfig for bockw board
* Enable R-Car DU DRM in defconfig for lager and marzen boards
* tag 'renesas-defconfig-for-v3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: Add koelsch defconfig
ARM: shmobile: bockw defconfig: add Sound support
ARM: shmobile: lager: Select DRM_RCAR_DU in defconfig
ARM: shmobile: marzen: Select DRM_RCAR_DU in defconfig
Signed-off-by: Olof Johansson <olof@lixom.net>
* Display Unit support for lager and marzen boards
* Update regulators for MMC0, SDHI0 and SDHI1 on ape6evm board
* Enable use of FPGA on bockw board
* Add sounds support to bockw board
* Add USB function support to bockw board
* Add Koelsch board
* Disable MMCIF command completion signal on ape6evm, armadillo800eva,
kzm9g and lager boards.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJSSToaAAoJENfPZGlqN0++XoUP/ikkPHbam+wNdKuR/IBCp+Wr
wvUChdfFw78UuYrYZgIC9C8jIwRO7L6j/5BmnxSOIppGa9t/HeyY2dXu3t8/D0Ye
T6GUzbciN/2/eX6e1rdLnK8ZAvw7HBqGig2VKEtsuI1enJBi7kWot2h/ITw60Y9L
nTNjwLpxTZ+WE7TK9B8KdYmxEU5X/EfI88Uu9ImXsEfUIUwxyH+c7BzQ/JNf1HVh
avTk9cJd/BCXJ2+S1axX0/PvQ6G81CgVn5fxVyMonzEl0boxLv72N8j81VTTHVSS
Yrvm63jivXsGR5woUvP1putNwz0VJkQ+m30m/7olZw673QD6D7dsBS8URJDliyHC
0yX3L0KVC0810IDo1gXx7Xr4CpF/jkwUNFGbmN2mayQOiWaxq+Jhrd8RQKTTNDDk
5J1uZQQE1+MuSc9vZuUUv+ElUhKYrzCXHFy9zztesnZ3HuRjI+3po/5+Ui7eNTlD
YUQuETcQhfuwFyRDjMnpomw5Hb78IWOSDwXAlxQ5V2LGaaroQMxX+0+3xHdgo1Nh
f+kMuqYJTNv1K6ymigoMtiKyXhI7+FW3ZDW76a9Mi3eKgJHQr0XqeGZ6DXGBUhq0
96ZD6631+KS9Zsl2hfuqo5iyrROQHBHl0IDfOSGZ4bRKb0SzqXnnFyLb9lOyY3uu
wTfQ65kFlJR/UAhs4xtf
=KUsf
-----END PGP SIGNATURE-----
Merge tag 'renesas-boards-for-v3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/boards
From Simon Horman:
Renesas ARM based SoC board updates for v3.13
* Display Unit support for lager and marzen boards
* Update regulators for MMC0, SDHI0 and SDHI1 on ape6evm board
* Enable use of FPGA on bockw board
* Add sounds support to bockw board
* Add USB function support to bockw board
* Add Koelsch board
* Disable MMCIF command completion signal on ape6evm, armadillo800eva,
kzm9g and lager boards.
* tag 'renesas-boards-for-v3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: lager: disable MMCIF Command Completion Signal, add CLK_CTRL2
ARM: shmobile: kzm9g: disable MMCIF Command Completion Signal
ARM: shmobile: armadillo800eva: disable MMCIF Command Completion Signal
ARM: shmobile: ape6evm: disable MMCIF Command Completion Signal
ARM: shmobile: bockw: add USB Function support
ARM: shmobile: Koelsch support
ARM: shmobile: bockw: add R-Car sound support (PIO)
ARM: shmobile: bockw: enable global use of FPGA
ARM: shmobile: lager: Fix Display Unit platform data
ARM: shmobile: ape6evm: update MMC0, SDHI0 and SDHI1 with correct regulators
ARM: shmobile: lager: Add Display Unit support
ARM: shmobile: marzen: Add Display Unit support
ARM: shmobile: r8a7778: add usb phy power control function
ARM: shmobile: r8a7778: add USBHS clock
ARM: shmobile: r8a7791 CMT support
ARM: shmobile: r8a7791 SCIF support
ARM: shmobile: Initial r8a7791 SoC support
ARM: shmobile: r8a7778: add SSI/SRU clock support
ARM: shmobile: r8a7790: Add DU and LVDS clocks
ARM: shmobile: r8a7779: Rename DU device in clock lookups list
Signed-off-by: Olof Johansson <olof@lixom.net>
* Add CPU notifier based SCU boot vector code
- Use on emev2, r8a7779 and sh73a0 SoCs
- Remove now unused shmobile_smp_scu_boot_secondary()
* Add shared APMU SMP support code
- Use to add SMP support for r8a7790 SoC
* Introduce shmobile_boot_size
* Expose shmobile_invalidate_start()
* Introduce shmobile_smp_cpu_disable()
- Use on sh73a0 SoC
- Remove now unused shmobile_smp_init_cpus()
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJSST7gAAoJENfPZGlqN0++XFoP/0RsM7u+sD0gzoNDQzhK0GHp
BKi46te3Wo5A0uuYKW+QxMNXKvIvRFtc/IAmIGEtm+WpNA4W/n6r0WVQWcsl9W1V
f83qXVUFkdQ6B+UOy8jass+cNPYG34AjPuUkbEyY8pakvMEu81NfkIrJTdN4Yooz
Al9nHRQxGz7G7zjYxPvUalu5fHnPw+gTN4gh5xkSyFup6MBq8LNbJh7xY+YGezuy
xr+8EJYIlFXNO7regCp2fhRj8yRgmEjvf1At8iUl9f3HoIfYGNc2gUsPIqYdHTpX
0EppCVtiMUMl2M0ujI9p+yN7m6qMLkT6vGfPvUHwly3A+L5hYGJCKowS6Y9EMgKB
1NMco0azKzcoEnZOmgAHbi1ubJsEzLY7Bpbj3W6J+1khTdP1qOu7u2Db1MwZ08Gx
ofwtNvFgE9EmiDaAeqMoyani8qJjvVu/+s/vickcZ1EzhcYY1qPi4IpBjBymlGnI
oTioQ20czOvU11WT90mw/jlTTdO9FqNOv9owyTCQveWH5n2PVI+hj26oNgUWLaB8
w6YYMzHiTPwjGfIIub10MZRdMSp1nb3+HtWZW+Wd523CuzQsk5akOgrs9iqYE3rW
4PBrniBwHX+7pJnlC47RQJoh6QI4RhML/xthQfIoze/I3eDZi0x5p2LiG59u7opA
kusLdSS609D4iYrBkBxt
=Tn0W
-----END PGP SIGNATURE-----
Merge tag 'renesas-smp-for-v3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
From Simon Horman:
Renesas ARM based SoC SMP updates for v3.13
* Add CPU notifier based SCU boot vector code
- Use on emev2, r8a7779 and sh73a0 SoCs
- Remove now unused shmobile_smp_scu_boot_secondary()
* Add shared APMU SMP support code
- Use to add SMP support for r8a7790 SoC
* Introduce shmobile_boot_size
* Expose shmobile_invalidate_start()
* Introduce shmobile_smp_cpu_disable()
- Use on sh73a0 SoC
- Remove now unused shmobile_smp_init_cpus()
* tag 'renesas-smp-for-v3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: Include CA7 cores in APMU table
ARM: shmobile: Extend APMU code to allow single cluster only
ARM: shmobile: Remove shmobile_smp_scu_boot_secondary()
ARM: shmobile: Let r8a7779 rely on SCU CPU notifier
ARM: shmobile: Let EMEV2 rely on SCU CPU notifier
ARM: shmobile: Let sh73a0 rely on SCU CPU notifier
ARM: shmobile: Add CPU notifier based SCU boot vector code
ARM: shmobile: Add r8a7790 SMP support using APMU code
ARM: shmobile: Shared APMU SMP support code without DT
ARM: shmobile: Introduce shmobile_boot_size
ARM: shmobile: Expose shmobile_invalidate_start()
ARM: shmobile: Remove unused shmobile_smp_init_cpus()
ARM: shmobile: Use shmobile_smp_cpu_disable() on sh73a0
ARM: shmobile: Introduce shmobile_smp_cpu_disable()
ARM: shmobile: r8a7790: Constify platform data and resources
ARM: shmobile: Rename to r8a7790_init_early()
ARM: shmobile: Rename to r8a73a4_init_early()
Signed-off-by: Olof Johansson <olof@lixom.net>
* Add support for r8a7791 SoC
* Rename DU device in clock lookups list of r8a7779 SoC
* USB and SSI/SRU clock support for r8a7778 SoC
* USB phy power control function support for r8a7778 SoC
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJSSSgvAAoJENfPZGlqN0++QqkP/2qVDvTbeSNq0KpG6nLekj9J
lNl5A5H78q1KxNWMXjxuxU/sTTnEHug0dFXpXTawk4AuunD4hELSaFcqDQc/UKTx
yeSX296yhDDTQo/ZlwwSTLTXI696rYX+WliQ4GgaYEY+Ssl2WtzjML9YI4G+BuO2
DwuBIvbo8V0JLxdoMLFqHAkQiqHFVJlWrnYa4Yp+re5IUzUIbUheHHn2Wu5XjwoJ
BzN+Scsm1uGxSvMXzQ1AwJNBGJpjUQFK353Hp7g54L1kZ/0d9yP9oO5+/7b8r3ev
O2diXHzfwdE9/rTONeLs/B/KpEB6KhIMTqwsdDWijfhIbofRJ8mLj074Abh4zqra
NQTMRX4HfI9qmQrVZFRatKvcR/PgRofSNNaoiIz2Flp0uh8bAgDxTjGegDQUSkyo
l6vTA+Bfrw2LNlvhZLPB8VrlHNJAoP5XgdObUjswFMtwP0E1upx1YW50naVp3Ear
otz700svMBRXqAs6mPsXkgLk/ueqbuPANc26+AHr2q8psOFpcZQKROrHRrxyPxVl
4ZqgEssDB9534A6nct1B0u0eB9pCb95ZcZjuOtdEApXH7hkwp+N40u2orWkSvjhO
cQBdclyk1f9SDVlRVbl5p/iXSUxa3za6dObDKKHSb8OWAOKINIKRcmHEaXtWJycs
yobGmXG8yyAyImBTKxHg
=GB2b
-----END PGP SIGNATURE-----
Merge tag 'renesas-soc-for-v3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
From Simon Horman:
Renesas ARM based SoC updates for v3.13
* Add support for r8a7791 SoC
* Rename DU device in clock lookups list of r8a7779 SoC
* USB and SSI/SRU clock support for r8a7778 SoC
* USB phy power control function support for r8a7778 SoC
* tag 'renesas-soc-for-v3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7778: add usb phy power control function
ARM: shmobile: r8a7778: add USBHS clock
ARM: shmobile: r8a7791 CMT support
ARM: shmobile: r8a7791 SCIF support
ARM: shmobile: Initial r8a7791 SoC support
ARM: shmobile: r8a7778: add SSI/SRU clock support
ARM: shmobile: r8a7790: Add DU and LVDS clocks
ARM: shmobile: r8a7779: Rename DU device in clock lookups list
Signed-off-by: Olof Johansson <olof@lixom.net>
* Constify platform data and resources of r8a7790 SoC
* Rename to r8a7790_init_delay() as r8a7790_init_early()
- This is in preparation for doing more than just initialising the delay
* Rename r8a73a4_init_delay() as r8a73a4_init_early()
- This is in preparation for doing more than just initialising the delay
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJSSRy5AAoJENfPZGlqN0++sdUP/3b6wColkyIX0lVbenSQxyeL
5seUv0QsZY2wswIRlphFU8eZ/Oi5GF/7oXCx2tgjfZh1HaFpjV/Ocn+8bDL+7mOz
KeLV/togLZwZTAYohuXIsZnLhR13x3y+adCyEtOn3VVNz/CbXTEAJuSG9iA+M+o2
9Btmsvff6i6GVbv1ksf0kIsFA5NZXoykE3qay7b/GnImCNpMj9SgmIZt7hXl35IS
QdiRnmMJY2dl9WcTTIK2zHw+wxO29hMdpSsrEUOfQOcj8bPL09H35e2t5t+mx/bd
Z7dowu82e0CzZhzir0NbFvWZWjSF0Q0cYHpWWL89tU4Y+2vbICM0okwEc7UiO1b/
KlcyrApnQvTMsazbR1kBrZ3cwHi+xRdDw27njtVkYIh1AGCkYplezlmUl+ALNOKn
bCDh6XJOEDDuw7cuoKKwtsGUcVR+QCRNVUtbuUXwG1naCL06BUUpSvCrmCzsoUSW
VPbMZWURaE4X7LNL2Q63Kl6JzFzC8iGfzH/tST7/Zvhw/7uN2Ppsuz7K6Crkhi8a
zyITxIyiy+OKURFEUt8Fhy5mdkw9UUnAVjmAM6HPFGaxAfmsCV2Wvoks3I7/EBJl
ks8Y5L8SSRQLLY6j3yGABavTvgj3k9TnUxxzUJMYnMX1/D++ohHxTwS3Dj0TpXtb
p1D+V3Pz5mcfThlGRFg8
=1rby
-----END PGP SIGNATURE-----
Merge tag 'renesas-cleanup-for-v3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/cleanup
From Simon Horman:
Renesas ARM based SoC cleanups for v3.13
* Constify platform data and resources of r8a7790 SoC
* Rename to r8a7790_init_delay() as r8a7790_init_early()
- This is in preparation for doing more than just initialising the delay
* Rename r8a73a4_init_delay() as r8a73a4_init_early()
- This is in preparation for doing more than just initialising the delay
* tag 'renesas-cleanup-for-v3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7790: Constify platform data and resources
ARM: shmobile: Rename to r8a7790_init_early()
ARM: shmobile: Rename to r8a73a4_init_early()
Signed-off-by: Olof Johansson <olof@lixom.net>
* Correct incorrect placement of __initdata tag in ape6evm board code
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJSTnhAAAoJENfPZGlqN0++oEEP/iO0a7Ofs/womZij1p05MIYH
Xb+LrQD5GHRtST9K4S+gwOzklignX7ri6I8P2+298YhKs7DuAjcmdn6J/3yEL/zB
irzRjBOnZ4AxtCbO424uUG0YNL2ahsG8/IbBL05XWXJLJLUacgu5Jexq7Yr+pndB
4ftqZxoFmrmEteirCp0N2jQGi5M4SQRUUGVvmpp3zaE3omavAmKUwqdZ0EQm/zim
iUhZ90lPrb53nfV5ryoNE6mEXWnUwZCXIY7TzKJm/FhNEp2Op+h/ai99pjnSdsjE
3DcNcR3IVmwVHD6rbkUrOXQfL9/ZhQgLTHGGqEJViCUgDEtqeIU1GFq7p69PLvFa
pimNM6zcRU9/cKoZLtiLP+huPgkNttdmESmPyXn4zjJrnM0fF0Guu363/v3HI6nk
6nP+KyVhqM/CJKLXIBLG3KWXwOhdVp3hkpVNHAJeCf6Hz3dEIXW6puUy7F2qreuX
akTw+ZFHeyI9pV32GSYtIFABE9hB+UrNTSM5K4eRuQkWBF+2XnlphFXsPJdJm6Du
XfkcowR/efdwVe/9xWOy8zGuxceIfzyLXWZtahFaEnmLPrvMJCaRqFlDjfs5D8eV
9Roz2iqAyZ/6vBNNqvZzSDwdgGuXu7/7kU1bB0zqSiS9DRekWXSCp5qqqsw4X2Aa
hujoEunX2uV9zEOCIUXt
=nVyt
-----END PGP SIGNATURE-----
Merge tag 'renesas-fixes5-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/cleanup
From Simon Horman:
* Correct incorrect placement of __initdata tag in ape6evm board code
* tag 'renesas-fixes5-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: ape6evm: fix incorrect placement of __initdata tag
(+ other patches already present in v3.12-rc4)
Signed-off-by: Olof Johansson <olof@lixom.net>
CLKDEV_LOOKUP selects HAVE_CLK and COMMON_CLK selects CLKDEV_LOOKUP. So
all symbols that select at least two of these symbols can be simplified.
For imx, omap2 and ux500 some rearrangements were necessary before the
simplification.
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Pawel Moll <pawel.moll@arm.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
From Sebastian Hasselbarth:
This is a patch set based on an RFC [1][2] sent earlier to provide
a common arch/arm init for DT clock providers. Currently, the call to
of_clk_init(NULL) to initialize DT clock providers is spread among several
mach-dirs. Since most machs require DT clocks initialized before timers,
no initcall can be used.
By adding of_clk_init(NULL) to arch/arm time_init(), we can remove all
mach-specific .init_time hooks that basically called of_clk_init and
clocksource_of_init.
In contrast to the RFC version, of_clk_init(NULL) is now only called if
no custom .init_time callback is set. This allows some machs to still
call clock init themselves, as not all can be converted now. Therefore,
this patch sets drops conversion of mach-mvebu and mach-zynq. New machs
that were introduced with v3.12-rc1 are also converted, except mach-u300
that requires clocks before irqs.
* 'clk-of-init-v2_for-3.13' of https://github.com/shesselba/linux-dove: (29 commits)
ARM: vt8500: remove custom .init_time hook
ARM: vexpress: remove custom .init_time hook
ARM: tegra: remove custom .init_time hook
ARM: sunxi: remove custom .init_time hook
ARM: sti: remove custom .init_time hook
ARM: socfpga: remove custom .init_time hook
ARM: rockchip: remove custom .init_time hook
ARM: prima2: remove custom .init_time hook
ARM: nspire: remove custom .init_time hook
ARM: nomadik: remove custom .init_time hook
ARM: mxs: remove custom .init_time hook
ARM: kirkwood: remove custom .init_time hook
ARM: imx: remove custom .init_time hook
ARM: highbank: remove custom .init_time hook
ARM: exynos: remove custom .init_time hook
ARM: dove: remove custom .init_time hook
ARM: bcm2835: remove custom .init_time hook
ARM: bcm: provide common arch init for DT clocks
ARM: call of_clk_init from default time_init handler
ARM: vt8500: prepare for arch-wide .init_time callback
...
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch proposes to remove the IRQF_DISABLED flag from Davinci code ;)
It's a NOOP since 2.6.35, and will be removed one day
Signed-off-by: Michael Opdenacker <michael.opdenacker@free-electrons.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
CONFIG_PLAT_S3C64XX has been kept in place way too long since it was
marked as temporary in commit
110d85a ARM: S3C64XX: Eliminate plat-s3c64xx
After fixing all users of it in previous patches, this patch finally
kills this temporary Kconfig entry.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
All other platforms have this condition checked inside their own Kconfig
files, so for consistency this patch makes it this way for mach-s3c64xx
as well.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The USB phy-nop nop driver expects the RESET line information
to be sent as a GPIO number via platform data. Adapt to that.
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
The platform data bits can be inferred from the other members of
struct usbhs_phy_data. So get rid of the platform_data member.
Build the platform data for the PHY device in usbhs_init_phys() instead.
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Split USB2 PHY and USB3 PHY into separate omap-control-usb
nodes. Get rid of "ti,type" property.
CC: Benoit Cousson <bcousson@baylibre.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Split otghs_ctrl and USB2 PHY power-down into separate
omap-control-usb nodes. Get rid of "ti,type" property.
Also get rid of "ti,has-mailbox" property from usb_otg_hs
node and provide the ctrl-module phandle.
CC: Benoit Cousson <bcousson@baylibre.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
__initdata tag should be placed between the variable name and equal
sign for the variable to be placed in the intended .init.data section.
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch proposes to remove the IRQF_DISABLED flag from OMAP code
It's a NOOP since 2.6.35, and will be removed one day.
Signed-off-by: Michael Opdenacker <michael.opdenacker@free-electrons.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
At least eight bytes of this number are totally unique for the device
it seems, so this is a perfect candidate for feeding the entropy
pool. One byte more or less of constants does not matter so feed in
the entire OID struct.
This fixes the issue of similar devices initializing to the
same state initially.
Further registers could be added too, such as OMAP4
CONTROL_STD_FUSE_OPP* and CONTROL_DPLL_NWELL_TRIM* registers,
but those vary based on the SoC generation.
Cc: Theodore Ts'o <tytso@mit.edu>
Cc: Paul Walmsley <paul@pwsan.com>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
[tony@atomide.com: updated comments per mailing list discussion]
Signed-off-by: Tony Lindgren <tony@atomide.com>
The generic code is well equipped to differentiate between
SMP and UP configurations.However, there are some devices which
use Cortex-A9 MP core IP with 1 CPU as configuration. To let
these SOCs to co-exist in a CONFIG_SMP=y build by leveraging
the SMP_ON_UP support, we need to additionally check the
number the cores in Cortex-A9 MPCore configuration. Without
such a check in place, the startup code tries to execute
ALT_SMP() set of instructions which lead to CPU faults.
The issue was spotted on TI's Aegis device and this patch
makes now the device work with omap2plus_defconfig which
enables SMP by default. The change is kept limited to only
Cortex-A9 MPCore detection code.
Note that if any future SoC *does* use 0x0 as the PERIPH_BASE, then
the SCU address check code needs to be #ifdef'd for for the Aegis
platform.
Acked-by: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This fixes a regression for kernels after v3.2
After commit 72662e0108
ARM: head.S: only include __turn_mmu_on in the initial identity mapping
Zaurus PXA devices call sharpsl_save_param() during fixup and hang on
boot because memcpy refers to physical addresses no longer valid if the
MMU is setup.
Zaurus collie (SA1100) is unaffected (function is called in init_machine).
The code was making assumptions and for PXA the virtual address
should have been used before.
Signed-off-by: Marko Katic <dromede@gmail.com>
Signed-off-by: Andrea Adami <andrea.adami@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Commit 09096f6 (ARM: 7822/1: add workaround for ambiguous C99 stdint.h
types) introduced an ARM specific 'asm/types.h' to work around some
ambiguities in the definitions of 32 bit types. Hence, we will not be
needing the generic version anymore.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Currently mcpm_cpu_power_down() and mcpm_cpu_suspend() trigger BUG()
if mcpm_platform_register() is not called beforehand. This may occur
for many reasons such as some incomplete device tree passed to the kernel
or the like.
Let's be nicer to users and avoid killing the kernel if that happens by
logging a warning and returning to the caller. The mcpm_cpu_suspend()
user is already set to deal with this situation, and so is cpu_die()
invoking mcpm_cpu_die().
The problematic case would have been the B.L switcher's usage of
mcpm_cpu_power_down(), however it has to call mcpm_cpu_power_up() first
which is already set to catch an error resulting from a missing
mcpm_platform_register() call.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
We have a fairly large batch of fixes this time around, mostly just due to
various platforms all having a fix or two more than usual.
Worth pointing out are:
- A fix for EDMA on Davinci/OMAP where channel allocation broke with
the DT conversion. Due to some miscommunication we didn't
understand the impact of the breakage, so we were pushing back on it
for 3.12, but it sounds like it's actually breaking quite a few people
out there.
- A bunch of fixes for Marvell platforms, some straggling fixes for
merge window fallout and some fixes for a couple of the platforms
(Netgear RN102 in particular).
- A fix for a race between multi-cluster power management and cpu hotplug
on Versatile Express.
And a bunch of other smaller fixes that all add up.
We'll be switching over into stricter regressions-only mode from here
on out.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJSTO8aAAoJEIwa5zzehBx3t/4P/jVzo0/Yvs0GtlD9tyC5uHgc
aDvz7cjP+/w8Is2amSBr+QR/bslT7gYjyBB9cBZluH/v1juohl16jRZMxHOmoV80
f3OfdJ7gXbKRRgrZNw9sBGWEfKrqb/Zr86CMOm51RpLizhHGXv+88DR/Rc63GgTl
P+NBbhyL9DiL3ox7OLM7UlMafovTR0HegeypMkWghBGaIwsgjheNz1xL0/oi+6tW
i74ehXBqoxpuHXm7UzdVD0VcQ+/GCXFo+yC0BrnGoNZG77Etq9CjpNRV3YFVZhCt
qD9RIznRDX2bA1Mcn74bFB9H+eL4c866p/gAH8tgbwdym9KtTcqNgYTR2nL5aAHa
OfD23lsaiy7yftPQX4bnD53bzeXJCJ+246SECK06fphS6PihYPK6iubxVL4yA5e/
iwzqCPQ3+f9NmC4+tLoydA2xzSHtgeCQc+smYVQlyyDMtEUaCzj58GDKebUpm62X
uMIQ8wrDRSJXURZl708UUixEvzQ6OLVgp1B3ASbedbh542qTQIpC2W8FIkYOUb6u
S7uErba0u/UC+bxBlAYNWnBM1npT//bZgCC8LRAJ+S3HIv8OGhHStsCZfGQxbeND
NxgPbHJPgSQu6RzaHcYSweuO38cfl6zkNcor8gf6ts3UOYnJuD+l8PLfqN13Erjm
NUL6gyQIF4uekR4GOTdI
=DLem
-----END PGP SIGNATURE-----
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"We have a fairly large batch of fixes this time around, mostly just
due to various platforms all having a fix or two more than usual.
Worth pointing out are:
- A fix for EDMA on Davinci/OMAP where channel allocation broke with
the DT conversion. Due to some miscommunication we didn't
understand the impact of the breakage, so we were pushing back on
it for 3.12, but it sounds like it's actually breaking quite a few
people out there.
- A bunch of fixes for Marvell platforms, some straggling fixes for
merge window fallout and some fixes for a couple of the platforms
(Netgear RN102 in particular).
- A fix for a race between multi-cluster power management and cpu
hotplug on Versatile Express.
And a bunch of other smaller fixes that all add up.
We'll be switching over into stricter regressions-only mode from here
on out"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (31 commits)
ARM: multi_v7_defconfig: add SDHCI for i.MX
bus: mvebu-mbus: Fix optional pcie-mem/io-aperture properties
ARM: mvebu: add missing DT Mbus ranges and relocate PCIe DT nodes for RN102
ARM: at91: sam9g45: shutdown ddr1 too when rebooting
MAINTAINERS: ARM: SIRF: use kernel.org mail box
MAINTAINERS: ARM: SIRF: add missed drivers into maintain list
ARM: edma: Fix clearing of unused list for DT DMA resources
ARM: vexpress: tc2: fix hotplug/idle/kexec race on cluster power down
ARM: dts: sirf: fix interrupt and dma prop of VIP for prima2 and atlas6
ARM: dts: sirf: fix the ranges of peri-iobrg of prima2
ARM: dts: makefile: build atlas6-evb.dtb for ARCH_ATLAS6
ARM: dts: sirf: fix fifosize, clks, dma channels for UART
ARM: mvebu: Add DT entry for ReadyNAS 102 to use gpio-poweroff driver
ARM: mvebu: fix ReadyNAS 102 Power button GPIO to make it active high
ARM: mach-integrator: Add stub for pci_v3_early_init() for !CONFIG_PCI
ARM: shmobile: Remove #gpio-ranges-cells DT property
gpio: rcar: Remove #gpio-range-cells DT property usage
ARM: shmobile: armadillo: fixup ether pinctrl naming
ARM: shmobile: Lager: add Micrel KSZ8041 PHY fixup
ARM: shmobile: update SDHI DT compatibility string to the <unit>-<soc> format
...
- mvebu
- fix ReadyNAS 102 power button (needs to be active high)
- fix ReadyNAS 102 automated rebooting (prevent hang) by add gpio-poweroff
node
- fix booting ReadyNAS 102 by adding MBus ranges and PCIe DT nodes
- mvebu-mbus: prevent PCIe driver from continuing with corrupted resource
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.20 (GNU/Linux)
iQEcBAABAgAGBQJSTERhAAoJEAi3KVZQDZAeFaQH/jmhAZwvSrB7MeTTY7J9eAcl
n4cFHImBiSb6IdDaocKB+yOmEgq/X2LS/DjK71sa0+CQsTq9B5nHxMHioogdUrG7
S8ofIjqu90CBOZ1I5IMSPmA3uOc1B2+wYi9uLxmajMTzYVDDBEZh9LuMy/GjwzU2
/g09RedQ3XkWDVv3pdPdEiC6KZ/gg7gejxOLv0nv9ydxr0DB8/VwmBHWFC0ghawB
3EchoagJ3M+mAbUaxtY6cauV2nnAJOO5mV6ZHl2tIOj4/Mhn8Le/C1t+Zcdf+U82
iAvqWmiRc3Vk96g8xXZWwZoPL7vhidLcE7dpOIZ2ymq5+g3esTaailqRxRqS9+c=
=uNPR
-----END PGP SIGNATURE-----
Merge tag 'fixes-3.12-2' of git://git.infradead.org/linux-mvebu into fixes
From Jason Cooper:
mvebu fixes for v3.12 (round 2)
- mvebu
- fix ReadyNAS 102 power button (needs to be active high)
- fix ReadyNAS 102 automated rebooting (prevent hang) by add gpio-poweroff
node
- fix booting ReadyNAS 102 by adding MBus ranges and PCIe DT nodes
- mvebu-mbus: prevent PCIe driver from continuing with corrupted resource
* tag 'fixes-3.12-2' of git://git.infradead.org/linux-mvebu:
bus: mvebu-mbus: Fix optional pcie-mem/io-aperture properties
ARM: mvebu: add missing DT Mbus ranges and relocate PCIe DT nodes for RN102
ARM: mvebu: Add DT entry for ReadyNAS 102 to use gpio-poweroff driver
ARM: mvebu: fix ReadyNAS 102 Power button GPIO to make it active high
Signed-off-by: Olof Johansson <olof@lixom.net>
Turn on SDHCI for i.MX support so machines can boot with local rootfs
on SD. Tested on a Wandboard Quad.
Signed-off-by: Olof Johansson <olof@lixom.net>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Install targets (install, zinstall, uinstall) on arm have a dependency
to vmlinux. This may cause parts of the kernel to be rebuilt during
installation. We must avoid this since this may run as root. Install
targets "ABSOLUTELY MUST NOT MODIFY THE SOURCE TREE." as Linus
emphasized this in:
http://lkml.org/lkml/2013/7/10/600
So on arm and maybe other archs we need the same as for x86:
1648e4f8 x86, kbuild: make "make install" not depend on vmlinux
This patch fixes this for arm. Dependencies are removed and instead a
check to install.sh is added for the files that are needed.
This issue was uncovered by this build error where the -j option is
used in conjunction with install targets:
$ make <makeflags>
$ make <makeflags> zinstall
...
DEPMOD
Usage: .../scripts/depmod.sh /sbin/depmod <kernelrelease>
(INSTALL_MOD_PATH and INSTALL_PATH variables set, so no root perms
required in this case.)
The problem is that zinstall on arm due to its dependency to vmlinux
does a prepare/prepare3 and finally does a forced rewrite of
kernel.release even if it exists already.
Rebuilding kernel.release removes it first and then recreates it. This
might race with another parallel make job running depmod.
So this patch should fix this one too.
Also quoting $(KERNELRELEASE) arg for install.sh as this messes
argument order in case it is empty (which is the case if the kernel
was not built yet).
Signed-off-by: Robert Richter <robert.richter@linaro.org>
Signed-off-by: Robert Richter <rric@kernel.org>
Acked-by: Michal Marek <mmarek@suse.cz>.
Acked-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Signed-off-by: Michal Marek <mmarek@suse.cz>
... otherwise it is impossible for the low level iommu driver to
figure out which pte flags should be used.
In __map_sg_chunk we can derive the flags from dma_data_direction.
In __iommu_create_mapping we should treat the memory like
DMA_BIDIRECTIONAL and pass both IOMMU_READ and IOMMU_WRITE to
iommu_map.
__iommu_create_mapping is used during dma_alloc_coherent (via
arm_iommu_alloc_attrs). AFAIK dma_alloc_coherent is responsible for
allocation _and_ mapping. I think this implies that access to the
mapped pages should be allowed.
Cc: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Andreas Herrmann <andreas.herrmann@calxeda.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Add SoC model to DT_MACHINE_START string.
Signed-off-by: Christian Daudt <bcm@fixthebug.org>
Reviewed-by: Markus Mayer <mmayer@broadcom.com>
Reviewed-by: Mark Hambleton <mahamble@broadcom.com>
Reviewed-by: James King <jamesk@broadcom.com>
Turn on the bcm281xx GPIO driver in the kernel configuration.
Signed-off-by: Markus Mayer <markus.mayer@linaro.org>
Reviewed-by: Christian Daudt <csd@broadcom.com>
Add the PSCI binding node for Calxeda SOCs. Only claiming "arm,psci"
support since there is no agreement on 0.2 binding definition.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: devicetree@vger.kernel.org
Now that gic_secondary_init is no longer needed to be called by SMP init
functions, the header is not needed.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
This updates the Calxeda cpuidle driver to use PSCI calls to powergate
cores. This also enables cpuidle for the ECX-2000.
This could possibly become a generic PSCI driver, but there are no other
PSCI users in the kernel other than mach-virt.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: "Rafael J. Wysocki" <rjw@sisk.pl>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: linux-pm@vger.kernel.org
As the ux500 and the kirkwood driver, make the calxeda driver a platform driver
[Compiled only]
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Pull two KVM fixes from Gleb Natapov.
* git://git.kernel.org/pub/scm/virt/kvm/kvm:
KVM: VMX: do not check bit 12 of EPT violation exit qualification when undefined
ARM: kvm: rename cpu_reset to avoid name clash
This is an RFC for the new touchscreen properties.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Tested-by: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Tested-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
CC: linux-arm-kernel@lists.infradead.org
CC: linux-input@vger.kernel.org
CC: devel@driverdev.osuosl.org
CC: Marek Vasut <marex@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
CC: devicetree@vger.kernel.org
The delay units inside the LRADC depend on the presence of a 2 kHz clock.
This change enables the clock to be able to use the delay unit for the
touchscreen part of the driver.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Tested-by: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Tested-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
__initdata tag should be placed between the variable name and equal
sign for the variable to be placed in the intended .init.data section.
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
When 5e12a613 and 0cd3754a were introduced, Netgear ReadyNAS 102 .dts
file was queued for inclusion and missed the update to have Mbus (and
then BootROM) ranges properties declared. It also missed the relocation
of Armada 370/XP PCIe DT nodes introduced by 14fd8ed0 after de1af8d4.
This patch fixes that which makes 3.12-rc3 bootable on the NAS.
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Like we are doing on DDR0 we need to cleanly shutdown DDR1 if it is
used before rebooting.
If DDR1 is not initialized, we check it and avoid dereferencing its address.
Even by adding two more instructions, we are able to complete the procedure
within a single cache line.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
HWMOD removal for MMC is breaking edma_start as the events are being manually
triggered due to unused channel list not being clear.
The above issue is fixed by reading the "dmas" property from the DT node if it
exists and clearing the bits in the unused channel list if the dma controller
used by any device is EDMA. For this purpose we use the of_* helpers to parse
the arguments in the dmas phandle list.
Also introduced is a minor clean up of a checkpatch error in old code.
Reviewed-by: Sekhar Nori <nsekhar@ti.com>
Reported-by: Balaji T K <balajitk@ti.com>
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Olof Johansson <olof@lixom.net>
Cc: Nishanth Menon <nm@ti.com>
Cc: Pantel Antoniou <panto@antoniou-consulting.com>
Cc: Jason Kridner <jkridner@beagleboard.org>
Cc: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Joel Fernandes <joelf@ti.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
On the TC2 testchip, when all CPUs in a cluster enter standbywfi
and commit a power down request, the power controller will wait
for standbywfil2 coming from L2 cache controller to shut the
cluster down.
By the time all CPUs in a cluster commit a power down request
and enter wfi, the power controller cannot backtrack, or put it
another way, a CPU must not be allowed to complete execution
independently of the power controller, the only way for it to
resume properly must be upon wake-up IRQ pending and subsequent
reset triggered from the power controller.
Current MCPM back-end for TC2 disables the GIC CPU IF only when
power down is committed through the tc2_pm_suspend() method, that
makes sense since a suspended CPU is still online and can receive
interrupts whereas a hotplugged CPU, since it is offline,
migrated all IRQs and shutdown the per-CPU peripherals, hence
their PPIs.
The flaw with this reasoning is the following. If all CPUs in
a clusters are entering a power down state either through CPU
idle or CPU hotplug, when the last man successfully completes
the MCPM power down sequence (and executes wfi), power controller
waits for L2 wfi signal to quiesce the cluster and shut it down.
If, when all CPUs are sitting in wfi, an online CPU hotplugs back
in one of the CPUs in the cluster being shutdown, that CPU
receives an IPI that causes wfi to complete (since tc2_pm_down()
method does not disable the GIC CPU IF in that case - CPU being
hotplugged out, not idle) and the power controller will never see
the stanbywfil2 signal coming from L2 that is required for
shutdown to happen and the system deadlocks.
Further to this issue, kexec hotplugs secondary CPUs out during
kernel reload/restart.
Because kexec may (deliberately) trash the old kernel text, it is
not OK for CPUs to follow the MCPM soft reboot path, since
instructions after the WFI may have been replaced by kexec.
If tc2_pm_down() does not disable the GIC cpu interface, there is a
race between CPU powerdown in the old kernel and the IPI from the
new kernel that triggers secondary boot, particularly if the
powerdown is slow (due to L2 cache cleaning for example). If the
new kernel wins the race, the affected CPU(s) will not really be
reset and may execute garbage after the WFI.
The only solution to this problem consists in disabling the GIC
CPU IF on a CPU committed to power down regardless of the power
down entry method (CPU hotplug or CPU idle). This way, CPU wake-up
is under power controller control, which prevents unexpected wfi
exit caused by a pending IRQ.
This patch moves the GIC CPU IF disable call in the TC2 MCPM
implementation from the tc2_pm_suspend() method to the
tc2_pm_down() method to fix the mentioned race condition(s).
Reviewed-by: Dave Martin <Dave.Martin@arm.com>
Tested-by: Dave Martin <Dave.Martin@arm.com> (for kexec)
Signed-off-by: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
* Remove unused #gpio-ranges-cells DT property
* Remove usage of deprecated #gpio-range-cells DT property
from GPIO R-Car
Property was deprecated in v3.11-rc2
* Correct ether pinctl naming for armadillo800eva board
Regression introduced in v3.10-rc5
* Add Micrel KSZ8041 PHY fixup to lager board
This resolves a problem that has been present since 3.11-rc2
* Update SDHI DT compatibility string to the <unit>-<soc> format
This makes compatibility strings consistent across all renesas
hardware which currently supports DT.
The bindings which are being updated where intorodiced on
a per-SoC basis starting in v3.8-rc7. They may have
been internally consistent when originally added.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJSSPX/AAoJENfPZGlqN0++OYkP/28MR5D2vqT/8zQ91o0AGAXg
CNS0CCekccTM+t7gTRQhgp9khrPmFlFOWrd+S35+eagOIfhCGfABxzCZijSKbai6
HFYuhkTg3UCg1pMaPMCP1H7iV63kZHHocyPOBnb9titplJ0w5GoDh8R2oslDf/62
vYM7XeZO9K99j1YxHH4+jMUws353XBgyQ87nHaQvT9Jhb45ZCXrXADw7sUOaUeEa
Zw3O6mfCb1bOOQqTMcouvPh6va+RNL/G/dREj8FDdrDXOz5KdTekHKON8fluq+LM
nWSUebzBJEMunHAnkncXxDJ229tu2x1j05ex+XwLYKcBx5gJ5omh0ugMOeYnnB8U
wMUpEhnXLGBuNdNS0qR6Ql4wiS+2kKPXDn4sSKOW1ORbHeklFbtfnyZDu+rJfu6n
+lc+KbZFd63ct9IIB2W7D3ZELEgWP3Z82eAXcj6yNcBXIgUYjEihZeFf51EB5EaF
2oIpiAQXbPdnzkUPNSR46h2Kg5w1alJgs5Elu/WO7RF+GT0lBZOrhP8Yxav30h1j
w6JJnG9Oq96TJ4FrzZbX8/Szmhheu8DrAo3JslxT+hjSJv2CweM+8Dbwcp5it+Vw
0rh/efDa84RPDS4YiwSXJQd6/DuskPE04qnry09WS5g67ediBLf1NNX4r26R68l5
plIISkrqCxYxUhNjbOJa
=WVMt
-----END PGP SIGNATURE-----
Merge tag 'renesas-fixes4-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes
From Simon Horman:
Fourth Round of Renesas ARM based SoC fixes for v3.12
* Remove unused #gpio-ranges-cells DT property
* Remove usage of deprecated #gpio-range-cells DT property
from GPIO R-Car
Property was deprecated in v3.11-rc2
* Correct ether pinctl naming for armadillo800eva board
Regression introduced in v3.10-rc5
* Add Micrel KSZ8041 PHY fixup to lager board
This resolves a problem that has been present since 3.11-rc2
* Update SDHI DT compatibility string to the <unit>-<soc> format
This makes compatibility strings consistent across all renesas
hardware which currently supports DT.
The bindings which are being updated where intorodiced on
a per-SoC basis starting in v3.8-rc7. They may have
been internally consistent when originally added.
* tag 'renesas-fixes4-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: Remove #gpio-ranges-cells DT property
gpio: rcar: Remove #gpio-range-cells DT property usage
ARM: shmobile: armadillo: fixup ether pinctrl naming
ARM: shmobile: Lager: add Micrel KSZ8041 PHY fixup
ARM: shmobile: update SDHI DT compatibility string to the <unit>-<soc> format
Signed-off-by: Olof Johansson <olof@lixom.net>
the current dts is lacking interrupt and dma prop for video input
processor of prima2 and atlas6, this patch fixes it.
Signed-off-by: Renwei Wu <Renwei.Wu@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
we lost an address range <0x56000000 0x56000000 0x1b00000> for peri-iobg
of prima2.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Makefile missed to include atlas6-evb.dtb for ARCH_ATLAS6.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
sirf uart and usp-based uart driver with full dma support has
hit 3.12, here we fix the fifosize, dma channels for some HW
prop.
Signed-off-by: Qipan Li <Qipan.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
__initdata tag should be placed between the variable name and equal
sign for the variable to be placed in the intended .init.data section.
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Without that fix, at the end of the shutdown process, the board is
still powered (led glowing, fan running, ...).
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
NETGEAR ReadyNAS 102 Power button definition in .dts file flags
associated GPIO active low instead of active high. This results
in reversed events reported by input subsystem (0 returned when
the button is pressed, 1 when released). This patch makes
associated GPIO active high to recover correct behaviour.
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Add information to the shared APMU code regarding
the APMU instance used to control the CA7 cores.
This can be used on r8a7790 and r8a73a4, but should
most likely be converted to DT in the future.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Extend the APMU code with a check to only allow boot
of CPU cores that sit in the same cluster as CPU0.
This makes it possible for people to use the r8a790
CA7 boot mode with CA7-cores only. The default CA15
boot mode will enable CA15 cores only. This is an
intentional software limitation to cope with lacking
scheduler support.
By removing this patch it is possible to run all 8 cores
in parallel, but this is not recommended without out of tree
scheduler modfications or custom user space code to control
the CPU affinitiy.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Remove shmobile_smp_scu_boot_secondary() since
it is no longer used. CPU boot vector setup is
instead handled by CPU notifiers.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Now when CPU notifiers are used for SCU boot vector
setup shmobile_smp_scu_boot_secondary() is no longer
needed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Now when CPU notifiers are used for SCU boot vector
setup shmobile_smp_scu_boot_secondary() is no longer
needed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Now when CPU notifiers are used for SCU boot vector
setup shmobile_smp_scu_boot_secondary() is no longer
needed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add CPU notifiers for the shared mach-shmobile SCU code
to allow removal of the shared SCU boot_secondary code.
Regarding notifiers, at CPU_UP_PREPARE time the SMP boot
vector is initialized so secondary CPU cores can boot.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add r8a7790 SMP support using the shared APMU code. To enable
SMP the r8a7790 specific DTS needs to be updated to include
CPU cores, and this is happening in a separate patch.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Introduce shared APMU SMP code for mach-shmobile. Both SMP boot up
and CPU Hotplug is supported. This version does not use DT but
if needed this will be added as an incremental feature patch.
The code is designed around CONFIG_NR_CPUS and should in theory support
any number of APMUs, however due to the current DT-less static design
only a single APMU is supported.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
MMCIF on r8a7790 doesn't support Command Completion Signal, but it does
implement a CE_CLK_CTRL2 register. Platform parameters have to be added to
account for these features on lager.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
MMCIF on sh73a0 doesn't support Command Completion Signal, a platform
parameter has to be added to disable it on kzm9g.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
MMCIF on r8a7740 doesn't support Command Completion Signal, a platform
parameter has to be added to disable it on armadillo800eva.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
MMCIF on r8a73a4 doesn't support Command Completion Signal, a platform
parameter has to be added to disable it on ape6evm.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Bock-W USB1 (CN29) can be USB Host/Func by SW98/SW99 settings.
USB Func will be enabled if CONFIG_USB_RENESAS_USBHS_UDC[_MODULE]
was selected on this patch
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Koelsch base board support making use of 2 GiB of memory,
the r8a7791 SoC with the SCIF0 serial port and CA15 with
CMT timer.
Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com>
[damm@opensource.se: Forward ported to upstream, dropped not-yet-ready SMP/PFC]
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch enables R-Car sound,
AK4643 (CN19) and AK4554 (CN20/CN21) codec chip
on Bock-W.
But, it supports PIO transfer only at this point.
User can check sound settings (Dip-switch/PFC etc)
via this patch, but will get under/over flow error
when playback/capture.
Because PIO transfer via SSI will be interrupted
"sampling rate" times per 1 second.
DMA transfer will be supported when HPB-DMAC was
enabled on r8a7778.
You will notice strange ALSA sound card HW
numbering on Bock-W board.
This came from AK4554 strange format on playback/capture.
The format on playback/capture is same on "normal" codec chip,
but AK4554 was different.
Because of that, AK4554 playback/capture are
registered as a different sound card.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
[horms+renesas@verge.net.au: squashed cleanup of SND_SOC_xxx in
Kconfig by Kuninori Morimoto]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch enables global use of FPGA,
since it will be used from many devices.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The DU device erroneously receives the DU resources array as platform
data instead of the DU platform data structure. Fix it.
This problem was introduced by f631fa0 ("ARM: shmobile: lager: Add Display
Unit support").
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Currently a dummy fixed always-on regulator is used for all 3 SD/MMC
interfaces on ape6evm. This patch updates the board to use correct supplies
for MMC0, SDHI0 and SDHI1 VDD. SDHI0 VccQ supply regulator should be
implemented in a separate patch.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Only the VGA output is currently supported.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Platform data and resources for Lager devices are kmemdup()ed when the
corresponding devices are registered and can thus be declared as const.
Do so.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Support the DU0 VGA and DU1 LVDS outputs. DU1 is connected to a
Mitsubishi AA104XD12 panel (10.4" XGA).
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
USB phy initialisation function is needed from not only
USB Host but also USB Function too.
This patch adds usb phy common control function.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add r8a7791 CMT support via channel 0 of CMT0. At this
point the CMT is used for clock event operation, but in
the future the arch timer will be the main timer and the
CMT will be used for deep sleep wake up only.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit a7663b88280d00359715817620798e99d54d401c)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add SCIF serial port support to the r8a7791 SoC by
adding platform devices for SCIFA0 -> SCIFA5 as well
as SCIFB0 -> SCIFB2 and SCIF0 -> SCIF5 together with
clock bindings. DT device description is excluded at
this point since such bindings are still under
development.
Signed-off-by: Yoshikazu Fujikawa <yoshikazu.fujikawa.ue@renesas.com>
Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com>
[damm@opensource.se: Forward ported to upstream, dropped holes in enum]
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add initial support for the r8a7791 SoC including:
- Single Cortex-A15 CPU Core
- GIC
No static virtual mappings are used, all the components
make use of ioremap(). DT_MACHINE_START is still wrapped
in CONFIG_USE_OF to match other mach-shmobile code.
Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com>
[damm@opensource.se: Forward ported to upstream, dropped not-yet-ready code]
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
With arch/arm calling of_clk_init(NULL) from time_init(), we can now
remove custom .init_time hooks.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Tony Prisk <linux@prisktech.co.nz>
With arch/arm calling of_clk_init(NULL) from time_init(), we can now
remove custom .init_time hooks. The call to versatile_sched_clock_init
is moved to .init_early instead, were it is also for non-DT boards.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Jon Medhurst (Tixy) <tixy@linaro.org>
Acked-by: Pawel Moll <pawel.moll@arm.com>
With arch/arm calling of_clk_init(NULL) from time_init(), we can now
remove custom .init_time hooks.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
With arch/arm calling of_clk_init(NULL) from time_init(), we can now
remove custom .init_time hooks.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
With arch/arm calling of_clk_init(NULL) from time_init(), we can now
remove custom .init_time hooks. To get rid of it, move l2cc init to
.init_machine hook instead.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
With arch/arm calling of_clk_init(NULL) from time_init(), we can now
remove custom .init_time hooks.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Dinh Nguyen <dinguyen@altera.com>
With arch/arm calling of_clk_init(NULL) from time_init(), we can now
remove custom .init_time hooks.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
With arch/arm calling of_clk_init(NULL) from time_init(), we can now
remove custom .init_time hooks.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Barry Song <baohua.song@csr.com>
With arch/arm calling of_clk_init(NULL) from time_init(), we can now
remove custom .init_time hooks.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
With arch/arm calling of_clk_init(NULL) from time_init(), we can now
remove custom .init_time hooks.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
This patch converts clk-imx2[38] clocksource_of_init compatible init
associated with fsl,imx2[38]-clkctrl. With arch/arm calling
of_clk_init(NULL) from time_init(), we can now also remove custom
.init_time hooks.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
With arch/arm calling of_clk_init(NULL) from time_init(), we can now
remove custom .init_time hooks.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Jason Cooper <jason@lakedaemon.net>
With arch/arm calling of_clk_init(NULL) from time_init(), we can now
remove custom .init_time hooks.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
With arch/arm calling of_clk_init(NULL) from time_init(), we can now
remove custom .init_time hooks. Highbank clock provider need a reference
to system registers, as a workaround current clk driver maps those
independent of arch code now.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
With arch/arm calling of_clk_init(NULL) from time_init(), we can now
remove custom .init_time hooks. While at it, also remove some now
redundant includes.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
With arch/arm calling of_clk_init(NULL) from time_init(), we can now
remove custom .init_time hooks. While at it, also remove some obsolete
includes.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Jason Cooper <jason@lakedaemon.net>
With arch/arm calling of_clk_init(NULL) from time_init(), we can now
remove custom .init_time hooks. Also remove call to of_clk_init from
clk-bcm2835 with core fixed_clock match, as this has already been
registered now.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
With arch/arm calling of_clk_init(NULL) and clocksource_of_init()
this is no longer needed. The former is useful because we can make
use of dummy fixed clocks for drivers until the bcm281xx common
clock driver is ready.
Signed-off-by: Matt Porter <matt.porter@linaro.org>
Reviewed-by: Markus Mayer <markus.mayer@linaro.org>
Acked-by: Christian Daudt <csd@broadcom.com>
Most DT ARM machs require common clock providers initialized before timers.
Currently, arch/arm machs use .init_time to call of_clk_init right before
clocksource_of_init. This prevents to remove that callback and use the default
one instead.
This patch adds a call to of_clk_init() to the default .init_time callback
for COMMON_CLK enabled machs to allow to remove custom callbacks where applicable.
While at it, also reorder includes alphabetically.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Current vt8500 board init calls of_clk_init() from vtwm_clk_init. To allow
consolidation of DT driven .time_init, move of_clock_init() to a temporary
.time_init callback that will be removed when arch-wide callback is available.
With previous pmc_base parsing helper for vt8500 clock providers, we can also
safely remove the call to vtwm_clk_init() and get rid of some includes.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Tony Prisk <linux@prisktech.co.nz>
Acked-by: Mike Turquette <mturquette@linaro.org>
Common clock framework allows to register clock providers to get called
on of_clk_init() by using CLK_OF_DECLARE. This converts sunxi clock
providers to make use of it and get rid of the mach specific clk init
call. As sunxi has a bunch of independent clk provider nodes, we hook
current clock init to board compatible to make it called once.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Current socfpga board init calls of_clk_init() from .machine_init. To
allow consolidation of DT driven .time_init, move of_clock_init() to
a temporary .time_init that will be removed when arch-wide callback is
available.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Dinh Nguyen <dinguyen@altera.com>
Common clock framework allows to register clock providers to get called
on of_clk_init() by using CLK_OF_DECLARE. This converts prima2 clock
provider to make use of it and get rid of the mach specific clk init
call.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Barry Song <baohua.song@csr.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Common clock framework allows to register clock providers to get called
on of_clk_init() by using CLK_OF_DECLARE. This converts nomadik clock
provider to make use of it and get rid of the mach specific clk init
call. As clocks require system reset controller base address to be
initialized each clock driver checks src_base and calls new
nomadik_src_init if required.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Nomadik clock initialization is properly done in clk-nomadik since
patch "clk: nomadik: set all timers to use 2.4 MHz TIMCLK".
Therefore, this patch removes now redundant mtu initialization from
.init_time callback.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
