Adds initial support for the P2972-0000 development board based on
Tegra194 and enables the AHCI controller on Jetson TX1.
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Merge tag 'tegra-for-4.17-arm64-dt' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
Pull "arm64: tegra: Device tree changes for v4.17-rc1" from Thierry Reding:
Adds initial support for the P2972-0000 development board based on
Tegra194 and enables the AHCI controller on Jetson TX1.
* tag 'tegra-for-4.17-arm64-dt' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Enable AHCI on Jetson TX1
arm64: tegra: Add SATA node for Tegra210
arm64: tegra: Add device tree for the Tegra194 P2972-0000 board
arm64: tegra: Add Tegra194 chip device tree
Pull "Freescale arm64 device tree updates for 4.17" from Shawn Guo:
- Move cpu_thermal device out of bus node to fix DTC simple_bus_reg
warning seen with W=1 switch.
- Fix IFC child nodes' unit-address to eliminate DTC simple_bus_reg
warnings.
- Add a dummy size memory 'reg' property for LS1046A device tree to
avoid unit_address_vs_reg DTC warning, and the real size will be
filled by bootloader.
- Update ls208xa-qds board device tree to fix unit_address_vs_reg
warnings with DSPI device.
- Add idle-states for LS1012A and LS1043A, and correct
arm,psci-suspend-param setting for already added idle-states.
- DPAA QBMan portal and watchdog device addition.
* tag 'imx-dt64-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
dt-bindings: ifc: Fix the unit address format in the examples
arm64: dts: ls1046a: add a dummy memory 'reg' property
arm64: dts: fsl: fix ifc simple-bus unit address format warnings
arm64: dts: fsl: update the cpu idle node
arm64: dts: ls1043a: add cpu idle support
arm64: dts: ls1012a: add cpu idle support
arm64: dts: ls208xa-qds: Fix the 'reg' property
arm64: dts: ls208xa-qds: Pass unit name to dspi child nodes
arm64: dts: ls208xa: Move cpu_thermal out of bus node
arm64: dts: ls1088a: Move cpu_thermal out of bus node
arm64: dts: ls1046a: Move cpu_thermal out of bus node
arm64: dts: ls1043a: Move cpu_thermal out of bus node
arm64: dts: ls1012a: Move cpu_thermal out of bus node
arm64: dts: Add DPAA QBMan portal 9
arm64: dts: ls1088a: add DT node of watchdog
According to Documentation/process/license-rules.rst, move the SPDX
License Identifier to the very top of the file. I used C++ comment
style not only for the SPDX line but for the entire block because
this seems Linus' preference [1]. I also dropped the parentheses to
follow the examples in that document.
[1] https://lkml.org/lkml/2017/11/25/133
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This patch adds regulators that have fixed voltage for audio codec
on UniPhier LD11/20 Global boards. This patch fixes warnings about
TAS57xx audio codec such as "tas571x 0-001b: 0-001b supply AVDD
not found, using dummy regulator".
Signed-off-by: Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Add nodes of the AVE ethernet controller for LD11 and LD20 SoCs
and the boards.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This patch adds compress audio node for S/PDIF on UniPhier LD11/20
global boards. And adds settings of AIO for it.
Signed-off-by: Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This patch adds codec node for TI TAS571x on UniPhier LD11/20
global boards. And adds settings of AIO for speaker out.
Signed-off-by: Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Enable AHCI on Jetson TX1 and add sata phy node.
Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
- convert to the SPDX-License-Identifier
- add missing clocks (for the registers) on some of the peripherals
- use the new nand driver
- add more uart for Armada 7K/8K SoCs
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Merge tag 'mvebu-dt64-4.17-1' of git://git.infradead.org/linux-mvebu into next/dt
Pull "mvebu dt64 for 4.17 (part 1)" from Gregory CLEMENT:
- convert to the SPDX-License-Identifier
- add missing clocks (for the registers) on some of the peripherals
- use the new nand driver
- add more uart for Armada 7K/8K SoCs
* tag 'mvebu-dt64-4.17-1' of git://git.infradead.org/linux-mvebu:
ARM64: dts: marvell: armada-cp110: Add apb_pclk clock for the uart nodes
arm64: dts: marvell: use reworked NAND controller driver on Armada 8K
arm64: dts: marvell: use reworked NAND controller driver on Armada 7K
ARM64: dts: marvell: armada-cp110: Add registers clock for sata node
arm64: dts: marvell: armada-8080-db: use SPDX-License-Identifier
arm64: dts: marvell: armada-8040-mcbin: use SPDX-License-Identifier
arm64: dts: marvell: armada-8040-db: use SPDX-License-Identifier
arm64: dts: marvell: armada-7040-db: use SPDX-License-Identifier
arm64: dts: marvell: armada-3720-espressobin: use SPDX-License-Identifier
arm64: dts: marvell: armada-3720-db: use SPDX-License-Identifier
arm64: dts: marvell: use SPDX-License-Identifier for Armada SoCs
arm64: dts: marvell: mcbin: fix board name typo
arm64: dts: marvell: mcbin: enable uart headers
arm64: dts: marvell: add CP110 uart peripherals
ARM64: dts: marvell: armada-cp110: Add registers clock for I2C nodes
ARM64: dts: marvell: armada-cp110: Add registers clock for SPI nodes
- Add XGE CPLD control support for hip07 SoC
- Disable the SMMU on hip06 and hip07 SoCs becuase of
the hardware limitation
- Enable HS200 mode for the MMC controller on hi6220 hikey board
- Remove "cooling-{min|max}-level" this kind unused properties
for hi6220 SoC
- Add watchdog node for hi6220 SoC
- Remove "CPU_NAP" idle state on hikey960 board since it is
not stable and useless with the updated firmware
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Merge tag 'hisi-arm64-dt-for-4.17' of git://github.com/hisilicon/linux-hisi into next/dt
Pull "ARM64: DT: Hisilicon SoC DT updates for 4.17" from Wei Xu:
- Add XGE CPLD control support for hip07 SoC
- Disable the SMMU on hip06 and hip07 SoCs becuase of
the hardware limitation
- Enable HS200 mode for the MMC controller on hi6220 hikey board
- Remove "cooling-{min|max}-level" this kind unused properties
for hi6220 SoC
- Add watchdog node for hi6220 SoC
- Remove "CPU_NAP" idle state on hikey960 board since it is
not stable and useless with the updated firmware
* tag 'hisi-arm64-dt-for-4.17' of git://github.com/hisilicon/linux-hisi:
arm64: dts: Hi3660: Remove 'CPU_NAP' idle state
arm64: dts: hi6220: enable watchdog
ARM64: dts: hi6220: Remove "cooling-{min|max}-level" for CPU nodes
arm64: dts: hikey: Enable HS200 mode on eMMC
arm64: dts: hisi: Disable hisilicon smmu node on hip06/hip07
arm64: dts: hisi: add hns-dsaf cpld control for the hip07 SoC
This extra clock is needed to access the registers of the UARTs used on
CP110 component of the Armada 7K/8K SoCs.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Add device tree files for the Tegra194 P2972-0000 development board.
The board consists of the P2888 compute module and the P2822 baseboard.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add the chip-level device tree, including binding headers, for the
NVIDIA Tegra194 "Xavier" system-on-chip. Only a small subset of devices
are initially available, enough to boot to UART console.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Xilinx zc1751 boards is used for silicon validation. Board can be
extended with 5 FMCs/DCs cards to connect various IPs. Describe all
these combinations.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
These 3 boards requires minimal support to get Linux up and running.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Xilinx zcu111 is a customer board. It is reusing some parts from zcu102.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Xilinx zcu106 is a customer board. It is reusing some parts from zcu102.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Xilinx zcu104 is another customer board. It is sort of zcu102 clone
with some differences.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
This patch is adding revA, revB and rev1.0. There are also other
revisions between which should be backward compatible with previous
versions. Unfortunately all revs are still in use.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
This board has 2GB of memory, i2c, sd, wifi sdio, spis, uarts, display
port and usbs.
Board is using fixed clocks because clock driver hasn't been merged yet.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
This patch add 8-bit bus width property to eMMC node.
Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds the sata port phy OOB timing values in the sata
device-tree node.
Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
1. Add support for HDMI audio on Exynos 5433 TM2/TM2E boards.
2. Add support for USB-MHL connector on Exynos 5433 TM2/TM2E boards.
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Merge tag 'samsung-dt64-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Pull "Samsung DTS ARM64 changes for v4.17" from Krzysztof Kozłowski:
1. Add support for HDMI audio on Exynos 5433 TM2/TM2E boards.
2. Add support for USB-MHL connector on Exynos 5433 TM2/TM2E boards.
* tag 'samsung-dt64-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: add OF graph between MHL and USB connector
arm64: dts: exynos: add micro-USB connector node to TM2 platforms
ARM: dts: exynos: Add support for HDMI audio on Exynos 5433 TM2 board
ARM: dts: exynos: Update I2S0 device node in exynos5433
ARM: dts: exynos: Add I2S1 device node to exynos5433
'linux,stdout-path' has been deprecated for some time in favor of
'stdout-path'. Now dtc will warn on occurrences of 'linux,stdout-path'.
Search and replace the one occurrence with 'stdout-path'.
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The Spreadtrum SC9860 platform has one SC2731 PMIC, and the SC2731
PMIC integrates all mobile handset power management, audio codec,
battery management and user interface support function in a single
chip.
This patch adds the SC2731 dts file, as well as adding the RTC and
regulator device node for this PMIC.
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The Spreadtrum SC9860 platform has two DMA controllers, one is located
on the ap-ahb system, and another one is located on the agcp system.
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add the watchdog device node for Spreadtrum SC9860 platform to
watch the system's stability.
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
We will use one always-on timer to be the broadcast device, thus add
the timer device node for Spreadtrum SC9860 platform.
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch adds the pin controller device node for Spreadtrum
SC9860 platform.
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
We will access the PMIC through ADI controller, thus this patch adds
the ADI device node for Spreadtrum SC9860 platform.
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The Spreadtrum SC9860 platform only has one hardware spinlock device,
which is located on AON system of Spreadtrum SC9860 platform.
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
OF graph describes MHL data lanes between MHL and respective USB
connector.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Since USB connector bindings are available we can describe it on TM2(e).
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Thanks a lot for Vincent Guittot careful work to find bug for 'CPU_NAP'
idle state. At early time, the CPU CA73 CPU_NAP idle state has been
supported on Hikey960. Later we found the system has the hang issue
and for resolving this issue Hisilicon released new MCU firmware, but
unfortunately the new MCU firmware has side effect and results in the
CA73 CPU cannot really enter CPU_NAP state and roll back to WFI state.
After discussion we cannot see the possibility to enable CA73 CPU_NAP
state anymore on Hikey960, based on this conclusion we should remove
this state from DT binding.
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Kevin Wang <jean.wangtao@linaro.org>
Cc: Vincent Guittot <vincent.guittot@linaro.org>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Tested-by: Vincent Guittot <vincent.guittot@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
This patch is to add watchdog binding for Hi6220 on Hikey board.
Signed-off-by: Dmitry Shmidt <dimitrysh@google.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
The "cooling-min-level" and "cooling-max-level" properties are not
parsed by any part of the kernel currently and the max cooling state of
a CPU cooling device is found by referring to the cpufreq table instead.
Moreover, the entries are incorrect here as min level is 4 and the max
level is 0.
Remove the unused properties from the CPU nodes.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
According to the hi6220 datasheet, the MMC controller is JEDEC eMMC 4.5
compliant, in addition to supporting a clock of up to 150MHz. The Hikey
schematic also indicates the device utilizes 1.8v signaling. Define these
parameters in the device tree to enable HS200 mode.
Signed-off-by: Ryan Grachek <ryan@edited.us>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
The HiSilicon erratum 161010801 describes the limitation of
HiSilicon platforms hip06/hip07 to support the SMMUv3 mappings
for MSI transactions.
PCIe controller on these platforms has to differentiate the
MSI payload against other DMA payload and has to modify the
MSI payload. This makes it difficult for these platforms to
have SMMU translation for MSI. In order to workaround this,
ARM SMMUv3 driver requires a quirk to treat the MSI regions
separately. Such a quirk is currently missing for DT based
systems and therefore we need to explicitly disable the
hip06/hip07 smmu entries in dts.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Add cpld-syscon node to support the cpld control for hns-dsaf
on the hip07 SoC.
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
The memory node in fsl-ls1046a.dtsi has no 'reg' property, and causes
the dtc warning below.
Warning (unit_address_vs_reg): Node /memory@80000000 has a unit name, but no reg property
Let's add a 'reg' property with dummy memory size, since bootloader will
need to fill the correct one per board memory configuration anyway.
Cc: Mingkai Hu <Mingkai.Hu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Acked-by: Li Yang <leoyang.li@nxp.com>
This is the first set of bugfixes for ARM SoCs, fixing a couple
of stability problems, mostly on TI OMAP and Rockchips platforms:
- OMAP2 hwmod clocks must be enabled in the correct order
- OMAP3 Wakeup from resume through PRM IRQ was unreliable
- One regression on OMAP5 caused by a kexec fix
- Rockchip ethernet needs some settings for stable operation on Rock64
- Rockchip based Chrombook Plus needs another clock setting for
stable display suspend/resume
- Rockchip based phyCORE-RK3288 was able to run at an invalid
CPU clock frequency
- Rockchip MMC link was sometimes unreliable
- Multiple fixes to avoid crashes in the Broadcom STB DPFE driver
Other minor changes include:
- Devicetree fixes for incorrect hardware description (rockchip,
omap, Gemini, amlogic)
- Some MAINTAINER file updates to correct email and git addresses
- Some fixes addressing 'make W=1' dtc warnings (broadcom, amlogic,
cavium, qualcomm, hisilicon, zx)
- Fixes for LTO-compilation (orion, davinci, clps711x)
- One fix for an incorrect Kconfig errata selection
- A memory leak in the OMAP timer driver
- A kernel data leak in OMAP1 debugfs files
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Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Arnd Bergmann:
"This is the first set of bugfixes for ARM SoCs, fixing a couple of
stability problems, mostly on TI OMAP and Rockchips platforms:
- OMAP2 hwmod clocks must be enabled in the correct order
- OMAP3 Wakeup from resume through PRM IRQ was unreliable
- one regression on OMAP5 caused by a kexec fix
- Rockchip ethernet needs some settings for stable operation on
Rock64
- Rockchip based Chrombook Plus needs another clock setting for
stable display suspend/resume
- Rockchip based phyCORE-RK3288 was able to run at an invalid CPU
clock frequency
- Rockchip MMC link was sometimes unreliable
- multiple fixes to avoid crashes in the Broadcom STB DPFE driver
Other minor changes include:
- Devicetree fixes for incorrect hardware description (rockchip,
omap, Gemini, amlogic)
- some MAINTAINER file updates to correct email and git addresses
- some fixes addressing 'make W=1' dtc warnings (broadcom, amlogic,
cavium, qualcomm, hisilicon, zx)
- fixes for LTO-compilation (orion, davinci, clps711x)
- one fix for an incorrect Kconfig errata selection
- a memory leak in the OMAP timer driver
- a kernel data leak in OMAP1 debugfs files"
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (38 commits)
MAINTAINERS: update entries for ARM/STM32
ARM: dts: bcm283x: Move arm-pmu out of soc node
ARM: dts: bcm283x: Fix unit address of local_intc
ARM: dts: NSP: Fix amount of RAM on BCM958625HR
ARM: dts: Set D-Link DNS-313 SATA to muxmode 0
ARM: omap2: set CONFIG_LIRC=y in defconfig
ARM: dts: imx6dl: Include correct dtsi file for Engicam i.CoreM6 DualLite/Solo RQS
memory: brcmstb: dpfe: support new way of passing data from the DCPU
memory: brcmstb: dpfe: fix type declaration of variable "ret"
memory: brcmstb: dpfe: properly mask vendor error bits
ARM: BCM: dts: Remove leading 0x and 0s from bindings notation
ARM: orion: fix orion_ge00_switch_board_info initialization
ARM: davinci: mark spi_board_info arrays as const
ARM: clps711x: mark clps711x_compat as const
arm: zx: dts: Remove leading 0x and 0s from bindings notation
arm64: dts: Remove leading 0x and 0s from bindings notation
arm64: dts: cavium: fix PCI bus dtc warnings
MAINTAINERS: ARM: at91: update my email address
soc: imx: gpc: de-register power domains only if initialized
ARM: dts: rockchip: Fix DWMMC clocks
...
Currently the size of GICv2m MSI frames are listed as 4kB while the
Juno TRM specifies 64kB for each of these MSI frames.
Though the devices connected themselves might just use the first 4kB,
to be consistent with the general practice of 64kB boundary alignment
to all the devices, let's keep the size as 64kB. This might also help
in avoiding any surprise when passing the device to a VM.
This patch increases the size of each GICv2m MSI frames from 4kB to 64kB
as per the specification.
Cc: Liviu Dudau <liviu.dudau@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
It fixes LS family SoCs device tree dtc warning in IFC child nodes.
Warning (simple_bus_reg): Node /soc/ifc@1530000/nor@0,0 simple-bus unit address format error, expected "0"
Warning (simple_bus_reg): Node /soc/ifc@1530000/nand@1,0 simple-bus unit address format error, expected "100000000"
Warning (simple_bus_reg): Node /soc/ifc@1530000/board-control@2,0 simple-bus unit address format error, expected "200000000"
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Use the new bindings of the reworked Marvell NAND controller driver.
Also adapt the nand controller node organization to distinguish which
property is relevant for the controller, and which one is NAND chip
specific. Expose the partitions as a subnode of the NAND chip.
Remove the 'marvell,nand-enable-arbiter' property, not needed anymore as
the driver activates the arbiter by default for all boards (either
needed or harmless).
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Use the new bindings of the reworked Marvell NAND controller driver.
Also adapt the nand controller node organization to distinguish which
property is relevant for the controller, and which one is NAND chip
specific. Expose the partitions as a subnode of the NAND chip.
Remove the 'marvell,nand-enable-arbiter' property, not needed anymore as
the driver activates the arbiter by default for all boards (either
needed or harmless).
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
