Commit Graph

4760 Commits

Author SHA1 Message Date
Christian König
485fc361d3 drm/amdgpu: use the AGP aperture for system memory access v2
Start to use the old AGP aperture for system memory access.

v2: Move that to amdgpu_ttm_alloc_gart

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-10 22:41:39 -05:00
Christian König
d76364fc7f drm/amdgpu: add amdgpu_gmc_agp_location v3
Helper to figure out the location of the AGP BAR.

v2: fix a couple of bugs
v3: correctly add one to vram_end

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-10 22:41:32 -05:00
Christian König
ad9a5b78f5 drm/amdgpu: correctly sign extend 48bit addresses v3
Correct sign extend the GMC addresses to 48bit.

v2: sign extending turned out easier than thought.
v3: clean up the defines and move them into amdgpu_gmc.h as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-10 22:41:24 -05:00
Christian König
bcdc9fd634 drm/amdgpu: improve VM state machine documentation v2
Since we have a lot of FAQ on the VM state machine try to improve the
documentation by adding functions for each state move.

v2: fix typo in amdgpu_vm_bo_invalidated, use amdgpu_vm_bo_relocated in
    one more place as well.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-10 22:41:03 -05:00
Christian König
0a53b69cce drm/amdgpu: fix amdgpu_mn_unlock() in the CS error path
Avoid unlocking a lock we never locked.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-10 22:40:24 -05:00
Christian König
c12a2ee5d0 drm/amdgpu: separate per VM BOs from normal in the moved state
Allows us to avoid taking the spinlock in more places.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-10 22:40:16 -05:00
Christian König
c460f8a6f5 drm/amdgpu: move size calculations to the front of the file again
amdgpu_vm_bo_* functions should come much later.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-10 22:40:09 -05:00
Evan Quan
d5bf265394 drm/amd/powerplay: added vega20 overdrive support V3
Added vega20 overdrive support based on existing OD sysfs
APIs. However, the OD logics are simplified on vega20. So,
the behavior will be a little different and works only on
some limited levels.

V2: fix typo
    fix commit description
    revise error logs
    add support for clock OD

V3: separate clock from voltage OD settings

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-10 22:39:30 -05:00
Dave Airlie
f5169a17af drm-misc-next for 4.20:
UAPI Changes:
 - Add userspace dma-buf device to turn memfd regions into dma-bufs (Gerd)
 
 Cross-subsystem Changes:
 - None
 
 Core Changes:
 - Remove user logspam and useless lock in vma_offset_mgr destroy (Chris)
 
 Driver Changes:
 - various: fbdev: Wrap remove_conflicting_framebuffers with resource_len
                   accessors to remove a bunch of cargo-cult (Michał)
 - rockchip: Add rgb output iface support + fixes (Sandy/Heiko)
 - nouveau/amdgpu: Add cec-over-aux support (Hans)
 - sun4i: Add support for Allwinner A64 (Jagan)
 
 Cc: Gerd Hoffmann <kraxel@redhat.com>
 Cc: Chris Wilson <chris@chris-wilson.co.uk>
 Cc: Michał Mirosław <mirq-linux@rere.qmqm.pl>
 Cc: Heiko Stuebner <heiko@sntech.de>
 Cc: Sandy Huang <hjc@rock-chips.com>
 Cc: Hans Verkuil <hans.verkuil@cisco.com>
 Cc: Jagan Teki <jagan@amarulasolutions.com>
 -----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCgAdFiEEfxcpfMSgdnQMs+QqlvcN/ahKBwoFAluQOdQACgkQlvcN/ahK
 BwpmLAf/cZeOlBegXiXvU9MK6yB3dj4JN9mtkXelxtv69Gjs7k3MeSeduAn5PNcC
 NIDiM6x/nFWgDHWtUgXeJKlYNqb00MI/kS5yb9MUHNE+wR+NTqc8mHdgdbXkaOXd
 n+Ox9HPAXiZ7djqe+dmoqt+C2kAfCltLGC+//1OJBIr604kgUl/aQcacoup8WJIB
 +W9Qb/JT/0mfS+lgKIp+SUKZnMUXKjL+Qb4SBrz5uv6DN1EEaqdO9J+UBbTbhpVO
 lBIMnpdB8fjACaiThRg59i9MthVq0a7ac8xqJZ7smGl+Y03c7tsK2n86DebAyymp
 WYCk+8LUyRTgrf9yrIleBq/uG2Dlbg==
 =rlAr
 -----END PGP SIGNATURE-----

Merge tag 'drm-misc-next-2018-09-05' of git://anongit.freedesktop.org/drm/drm-misc into drm-next

drm-misc-next for 4.20:

UAPI Changes:
- Add userspace dma-buf device to turn memfd regions into dma-bufs (Gerd)
- Add per-plane blend mode property (Lowry)
- Change in drm_fourcc.h is documentation only (Brian)

Cross-subsystem Changes:
- None

Core Changes:
- Remove user logspam and useless lock in vma_offset_mgr destroy (Chris)
- Add get/verify_crc_source for improved crc source selection (Mahesh)
- Add __drm_atomic_helper_plane_reset to reduce copypasta (Alexandru)

Driver Changes:
- various: Replance ref/unref calls with drm_dev_get/put (Thomas)
- bridge: Add driver for TI SN65DSI86 chip (Sandeep)
- rockchip: Add PX30 support (Sandy)
- sun4i: Add support for R40 TCON (Jernej)
- vkms: Continued building out vkms, added gem support (Haneen)Driver Changes:
- various: fbdev: Wrap remove_conflicting_framebuffers with resource_len
                  accessors to remove a bunch of cargo-cult (Michał)
- rockchip: Add rgb output iface support + fixes (Sandy/Heiko)
- nouveau/amdgpu: Add cec-over-aux support (Hans)
- sun4i: Add support for Allwinner A64 (Jagan)

Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Sandy Huang <hjc@rock-chips.com>
Cc: Hans Verkuil <hans.verkuil@cisco.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Sean Paul <sean@poorly.run>
Link: https://patchwork.freedesktop.org/patch/msgid/20180905202210.GA95199@art_vandelay
2018-09-07 10:44:35 +10:00
Chunming Zhou
9a09a42369 drm: expand replace_fence to support timeline point v2
we can place a fence to a timeline point after expanded.
v2: change func parameter order

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Link: https://patchwork.freedesktop.org/patch/246543/
2018-09-06 11:09:31 +02:00
Chunming Zhou
0a6730ea27 drm: expand drm_syncobj_find_fence to support timeline point v2
we can fetch timeline point fence after expanded.
v2: The parameter fence is the result of the function and should come last.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Link: https://patchwork.freedesktop.org/patch/246541/
2018-09-06 11:09:19 +02:00
Michał Mirosław
a62dfac0ff drm/amdgpu: use simpler remove_conflicting_pci_framebuffers()
Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/fe59ab587ef4ef799b525fcc03d87800c5dc26d9.1535810304.git.mirq-linux@rere.qmqm.pl
2018-09-03 18:16:36 +02:00
Alex Deucher
6abc0c8f8c drm/amdgpu/gmc9: don't keep stolen memory on vega20
Vega20 does not appear to be affected by the same issue
as vega10.  Enable the full stolen memory handling on
vega20.  Reserve the appropriate size at init time to avoid
display artifacts and then free it at the end of init once
the new FB is up and running.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-02 10:16:52 -05:00
Alex Deucher
95010ba79b drm/amdgpu/gmc9: don't keep stolen memory on vega12
vega12 does not appear to be affected by the same issue
as vega10.  Enable the full stolen memory handling on
vega12.  Reserve the appropriate size at init time to avoid
display artifacts and then free it at the end of init once
the new FB is up and running.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-02 10:16:51 -05:00
Alex Deucher
6fb81375db drm/amdgpu/gmc9: don't keep stolen memory on Raven
Raven does not appear to be affected by the same issue
as vega10.  Enable the full stolen memory handling on
Raven.  Reserve the appropriate size at init time to avoid
display artifacts and then free it at the end of init once
the new FB is up and running.

Bug: https://bugs.freedesktop.org/show_bug.cgi?id=106639
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-02 10:16:51 -05:00
Alex Deucher
cd2b56238e drm/amdgpu/gmc9: rework stolen vga memory handling
No functional change, just rework it in order to adjust the
behavior on a per asic level.  The problem is that on vega10,
something corrupts the lower 8 MB of vram on the second
resume from S3.  This does not seem to affect Raven, other
gmc9 based asics need testing.

Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-02 10:16:51 -05:00
Christian König
5d35ed4832 drm/amdgpu: fix idle state and bulk_moveable flag
Add BOs to the idle state again and correctly clear the flag when
new BOs are added.

Signed-off-by: Christian König <christian.koenig@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-02 10:16:44 -05:00
Christian König
b995795bf0 drm/amdgpu: fix "use bulk moves for efficient VM LRU handling" v2
First step to fix the LRU corruption, we accidentially tried to move things
on the LRU after dropping the lock.

Signed-off-by: Christian König <christian.koenig@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-02 10:16:38 -05:00
Andrey Grodzovsky
88b35d83a7 drm/amdgpu: Use drm_dev_unplug in PCI .remove
This at least allows to fail any subsequent IOCTLs with -ENODEV
after the device is gone.
Still this operation is not supported yet in graphic mode
and will lead at least to page faults and other issues.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-02 10:16:16 -05:00
Christian König
17cc525206 drm/amdgpu: Revert "kmap PDs/PTs in amdgpu_vm_update_directories"
This reverts commit a7f91061c6.

Felix pointed out that we need to have the BOs mapped even before
amdgpu_vm_update_directories is called.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-30 09:03:45 -05:00
Christian König
ec210e3226 drm/amdgpu: put GART away from VRAM v2
Always try to put the GART away from where VRAM is.

v2: correctly handle the 4GB limitation

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-30 09:03:37 -05:00
Dave Airlie
185c3cfaca Merge branch 'drm-fixes-4.19' of git://people.freedesktop.org/~agd5f/linux into drm-fixes
Fixes for 4.19:
- SR-IOV fixes
- Kasan and page fault fix on device removal
- S3 stability fix for CZ/ST
- VCE regression fixes for CIK parts
- Avoid holding the mn_lock when allocating memory
- DC memory leak fix
- BO eviction fix

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180829202555.2653-1-alexander.deucher@amd.com
2018-08-30 11:34:14 +10:00
Alex Deucher
d9997b64c5 drm/amdgpu: add missing CHIP_HAINAN in amdgpu_ucode_get_load_type
This caused a confusing error message, but there is functionally
no problem since the default method is DIRECT.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2018-08-29 12:41:51 -05:00
Amber Lin
2690262ec9 drm/amdgpu: Relocate some definitions v2
Move some KFD-related (but used in amdgpu_drv.c) definitions from
kfd_priv.h to kgd_kfd_interface.h so we don't need to include kfd_priv.h
in amdgpu_drv.c. This fixes a build failure when AMDGPU is enabled but
MMU_NOTIFIER is not.
This patch also disables KFD-related module options when HSA_AMD is not
enabled.

v2: rebase (Alex)

Signed-off-by: Amber Lin <Amber.Lin@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-29 12:41:50 -05:00
Philip Yang
dcaaff4eed drm/amdgpu: remove redundant memset
kvmalloc_array uses __GFP_ZERO flag ensures that the returned address
is zeroed already, memset it to zero again afterwards is unnecessary,
and in this case buggy because we only clear the first entry.

Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-29 12:36:06 -05:00
Christian König
5f232bd79b drm/amdgpu: use the smaller hole for GART
Instead of the larger one use the smaller hole in the MC address
space for the GART mappings.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-29 12:35:52 -05:00
Michel Dänzer
d78c1fa0c9 Revert "drm/amdgpu: move PD/PT bos on LRU again"
This reverts commit 31625ccae4464b61ec8cdb9740df848bbc857a5b.

It triggered various badness on my development machine when running the
piglit gpu profile with radeonsi on Bonaire, looks like memory
corruption due to insufficiently protected list manipulations.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-29 12:35:43 -05:00
Christian König
0e33495d49 drm/amdgpu: distinct between allocated GART space and GMC addr
Most of the time we only need to know if the BO has a valid GMC addr.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-29 12:35:37 -05:00
Christian König
22d8bfafcc drm/amdgpu: stop using gart_start as offset for the GTT domain
Further separate GART and GTT domain.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-29 12:35:30 -05:00
Christian König
0be655d1c6 drm/amdgpu: fix amdgpu_gmc_gart_location a little bit
Improve the VCE limitation handling.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-29 12:35:24 -05:00
Christian König
961c75cf20 drm/amdgpu: move amdgpu_device_(vram|gtt)_location
Move that into amdgpu_gmc.c since we are really deadling with GMC
address space here.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-29 12:35:18 -05:00
Christian König
efa9a5ef10 drm/amdgpu: remove amdgpu_bo_gpu_accessible
Not used any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-29 12:35:12 -05:00
Oak Zeng
bf47afbabf drm/amdkfd: Release an acquired process vm
For compute vm acquired from amdgpu, vm.pasid is managed
by kfd. Decouple pasid from such vm on process destroy
to avoid duplicate pasid release.

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-29 12:35:00 -05:00
Oak Zeng
1685b01a85 drm/amdgpu: Set pasid for compute vm (v2)
To make a amdgpu vm to a compute vm, the old pasid will be freed and
replaced with a pasid managed by kfd. Kfd can't reuse original pasid
allocated by amdgpu because kfd uses different pasid policy with amdgpu.
For example, all graphic devices share one same pasid in a process.

v2: rebase (Alex)

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-29 12:34:49 -05:00
Emily Deng
6ddd9769db drm/amdgpu: Need to set moved to true when evict bo
Fix the VMC page fault when the running sequence is as below:
1.amdgpu_gem_create_ioctl
2.ttm_bo_swapout->amdgpu_vm_bo_invalidate, as not called
amdgpu_vm_bo_base_init, so won't called
list_add_tail(&base->bo_list, &bo->va). Even the bo was evicted,
it won't set the bo_base->moved.
3.drm_gem_open_ioctl->amdgpu_vm_bo_base_init, here only called
list_move_tail(&base->vm_status, &vm->evicted), but not set the
bo_base->moved.
4.amdgpu_vm_bo_map->amdgpu_vm_bo_insert_map, as the bo_base->moved is
not set true, the function amdgpu_vm_bo_insert_map will call
list_move(&bo_va->base.vm_status, &vm->moved)
5.amdgpu_cs_ioctl won't validate the swapout bo, as it is only in the
moved list, not in the evict list. So VMC page fault occurs.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-28 12:42:48 -05:00
Michel Dänzer
bdb1922abd drm/amdgpu: Only retrieve GPU address of GART table after pinning it
Doing it earlier hits a WARN_ON_ONCE in amdgpu_bo_gpu_offset.

Fixes: "drm/amdgpu: remove gart.table_addr"

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-28 11:55:47 -05:00
Emily Deng
7ef0b43545 drm/amdgpu: Need to set moved to true when evict bo
Fix the VMC page fault when the running sequence is as below:
1.amdgpu_gem_create_ioctl
2.ttm_bo_swapout->amdgpu_vm_bo_invalidate, as not called
amdgpu_vm_bo_base_init, so won't called
list_add_tail(&base->bo_list, &bo->va). Even the bo was evicted,
it won't set the bo_base->moved.
3.drm_gem_open_ioctl->amdgpu_vm_bo_base_init, here only called
list_move_tail(&base->vm_status, &vm->evicted), but not set the
bo_base->moved.
4.amdgpu_vm_bo_map->amdgpu_vm_bo_insert_map, as the bo_base->moved is
not set true, the function amdgpu_vm_bo_insert_map will call
list_move(&bo_va->base.vm_status, &vm->moved)
5.amdgpu_cs_ioctl won't validate the swapout bo, as it is only in the
moved list, not in the evict list. So VMC page fault occurs.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-28 11:55:38 -05:00
Yintian Tao
e78196444b drm/amdgpu: move full access into amdgpu_device_ip_suspend
It will be more safe to make full-acess include both phase1 and phase2.
Then accessing special registeris wherever at phase1 or phase2 will not
block any shutdown and suspend process under virtualization.

Signed-off-by: Yintian Tao <yttao@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-28 11:55:20 -05:00
Christian König
0c79c0bb87 drm/amdgpu: remove extra newline when printing VM faults
Looks like a copy&paste error to me.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-28 11:54:58 -05:00
Amber Lin
521fb7d021 drm/amdgpu: Move KFD parameters to amdgpu (v3)
After merging KFD into amdgpu, move module parameters defined in KFD to
amdgpu_drv.c, where other module parameters are declared.

v2: add kernel-doc comments
v3: rebase and fix parameter variable name (Alex)

Signed-off-by: Amber Lin <Amber.Lin@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-28 11:51:11 -05:00
Amber Lin
82b7b619c4 drm/amdgpu: Remove CONFIG_HSA_AMD_MODULE
After amdkfd is merged to amdgpu, CONFIG_HSA_AMD_MODULE no longer exists.

Signed-off-by: Amber Lin <Amber.Lin@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-28 11:24:56 -05:00
Amber Lin
04d5e27658 drm/amdgpu: Merge amdkfd into amdgpu
Since KFD is only supported by single GPU driver, it makes sense to merge
amdgpu and amdkfd into one module. This patch is the initial step: merge
Kconfig and Makefile.

v2: also remove kfd from drm Kconfig

Signed-off-by: Amber Lin <Amber.Lin@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-28 11:22:42 -05:00
Andrey Grodzovsky
7d0aa3765f drm/amdgpu: Refine gmc9 VM fault print.
The fault reports the page number where the fault happend and not
the exact faulty address. Update the print message to reflect that.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 15:21:20 -05:00
Christian König
284dec4317 drm/amdgpu: enable GTT PD/PT for raven v3
Should work on Vega10 as well, but with an obvious performance hit.

Older APUs can be enabled as well, but will probably be more work.

v2: fix error checking
v3: use more general check

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 15:19:49 -05:00
Christian König
24a8d289d5 drm/amdgpu: add amdgpu_gmc_get_pde_for_bo helper v2
Helper to get the PDE for a PD/PT.

v2: improve documentation

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 15:19:42 -05:00
Christian König
bbc9fb10e5 drm/amdgpu: add GMC9 support for PDs/PTs in system memory
Add the necessary handling.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 15:19:27 -05:00
Christian König
e21eb2613d drm/amdgpu: add helper for VM PD/PT allocation parameters v3
Add a helper function to figure them out only once.

v2: fix typo with memset
v3: rebase on kfd changes (Alex)

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 15:19:12 -05:00
Christian König
248f2b8ef2 drm/amdgpu: remove extra root PD alignment
Just another leftover from radeon.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 15:12:23 -05:00
Christian König
4f9ea1d0d1 drm/amdgpu: fix holding mn_lock while allocating memory
We can't hold the mn_lock while allocating memory.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 15:12:17 -05:00
Christian König
85eff20020 drm/amdgpu: amdgpu_ctx_add_fence can't fail
No more waiting for a fence done here.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 15:12:10 -05:00
Rex Zhu
a9a8a788e5 drm/amdgpu: Change kiq ring initialize sequence on gfx9
1. initialize kiq before initialize gfx ring.
2. set kiq ring ready immediately when kiq initialize
   successfully.
3. split function gfx_v9_0_kiq_resume into two functions.
     gfx_v9_0_kiq_resume is for kiq initialize.
     gfx_v9_0_kcq_resume is for kcq initialize.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 15:12:03 -05:00
Rex Zhu
36859cd535 drm/amdgpu: Change kiq initialize/reset sequence on gfx8
1. initialize kiq before initialize gfx ring.
2. set kiq ring ready immediately when kiq initialize
   successfully.
3. split function gfx_v8_0_kiq_resume into two functions.
   gfx_v8_0_kiq_resume is for kiq initialize.
   gfx_v8_0_kcq_resume is for kcq initialize.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 15:11:56 -05:00
Rex Zhu
ffabea84c5 drm/amdgpu: Refine gfx_v9_0_kcq_disable function
Send all kcq unmap_queue packets and then wait for
complete.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 15:11:49 -05:00
Rex Zhu
841cf911fb drm/amdgpu: Remove duplicate code in gfx_v9_0.c
There are no any logical changes here.

1. if kcq can be enabled via kiq, we don't need to
   do kiq ring test.
2. amdgpu_ring_test_ring function can be used to
   sync the ring complete, remove the duplicate code.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 15:11:42 -05:00
Rex Zhu
a62a49e5b9 drm/amdgpu: Refine gfx_v8_0_kcq_disable function
Send all kcq unmap_queue packets and then wait for
complete.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 15:11:36 -05:00
Rex Zhu
6c10b5cc4e drm/amdgpu: Remove duplicate code in gfx_v8_0.c
There are no any logical changes here.

1. if kcq can be enabled via kiq, we don't need to
   do kiq ring test.
2. amdgpu_ring_test_ring function can be used to
   sync the ring complete, remove the duplicate code.

v2: alloc 6 (not 7) dws for unmap_queues

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 15:11:28 -05:00
Rex Zhu
f1df06d0f9 drm/amdgpu: Remove dead code in amdgpu_pm.c
As we have unify powergate_uvd/vce/mmhub to set_powergating_by_smu,
and set_powergating_by_smu was supported by both dpm and powerplay.
so remove the else case.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 15:11:22 -05:00
Rex Zhu
e851abd830 drm/amdgpu: Power on uvd block when hw_fini
when hw_fini/suspend, smu only need to power on uvd block
if uvd pg is supported, don't need to call uvd to do hw_init.

v2: fix typo in patch descriptions and comments.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 15:11:15 -05:00
Rex Zhu
3442516d14 drm/amdgpu: Update power state at the end of smu hw_init.
For SI/Kv, the power state is managed by function
amdgpu_pm_compute_clocks.

when dpm enabled, we should call amdgpu_pm_compute_clocks
to update current power state instand of set boot state.

this change can fix the oops when kfd driver was enabled on Kv.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 15:11:09 -05:00
Rex Zhu
3510bafe56 drm/amdgpu: Fix vce initialize failed on Kaveri/Mullins
Forgot to add vce pg support via smu for Kaveri/Mullins.

Fixes: 561a5c83eadd ("drm/amd/pp: Unify powergate_uvd/vce/mmhub
                       to set_powergating_by_smu")

v2: refine patch descriptions suggested by Michel

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 15:11:01 -05:00
Rex Zhu
d3200a536c drm/amdgpu: Remove duplicated power source update
when ac/dc switch, driver will be notified by acpi event.
then the power source will be updated. so don't need to
get power source when set power state.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 15:10:55 -05:00
Rex Zhu
1f06dee8f7 drm/amdgpu: Enable/disable gfx PG feature in rlc safe mode
This is required by gfx hw and can fix the rlc hang when
do s3 stree test on Cz/St.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Hang Zhou <hang.zhou@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 15:10:49 -05:00
Felix Kuehling
43370c4ce5 drm/amdgpu: Adjust the VM size based on system memory size v2
Set the VM size based on system memory size between the ASIC-specific
limits given by min_vm_size and max_bits. GFXv9 GPUs will keep their
default VM size of 256TB (48 bit). Only older GPUs will adjust VM size
depending on system memory size.

This makes more VM space available for ROCm applications on GFXv8 GPUs
that want to map all available VRAM and system memory in their SVM
address space.

v2:
* Clarify comment
* Round up memory size before >> 30
* Round up automatic vm_size to power of two

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 15:10:42 -05:00
Christian König
80dbea4720 drm/amdgpu: implement soft_recovery for GFX9
Try to kill waves on the SQ.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 15:10:36 -05:00
Christian König
f5d850331e drm/amdgpu: implement soft_recovery for GFX8 v2
Try to kill waves on the SQ.

v2: only for the GFX ring for now.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 15:10:29 -05:00
Christian König
efb6706405 drm/amdgpu: implement soft_recovery for GFX7
Try to kill waves on the SQ.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 15:10:08 -05:00
Christian König
7876fa4f55 drm/amdgpu: add ring soft recovery v4
Instead of hammering hard on the GPU try a soft recovery first.

v2: reorder code a bit
v3: increase timeout to 10ms, increment GPU reset counter
v4: squash in compile fix (Christian)

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
2018-08-27 15:10:07 -05:00
Rex Zhu
2f4e7db0f7 drm/amdgpu: Remove duplicated power source update
when ac/dc switch, driver will be notified by acpi event.
then the power source will be updated. so don't need to
get power source when set power state.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 14:55:00 -05:00
Christian König
4a2de54dc1 drm/amdgpu: fix holding mn_lock while allocating memory
We can't hold the mn_lock while allocating memory.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 14:50:56 -05:00
Rex Zhu
72ef23de20 drm/amdgpu: Power on uvd block when hw_fini
when hw_fini/suspend, smu only need to power on uvd block
if uvd pg is supported, don't need to call uvd to do hw_init.

v2: fix typo in patch descriptions and comments.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 14:49:48 -05:00
Rex Zhu
2ab4d0e742 drm/amdgpu: Update power state at the end of smu hw_init.
For SI/Kv, the power state is managed by function
amdgpu_pm_compute_clocks.

when dpm enabled, we should call amdgpu_pm_compute_clocks
to update current power state instand of set boot state.

this change can fix the oops when kfd driver was enabled on Kv.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 14:49:33 -05:00
Rex Zhu
6d39df146f drm/amdgpu: Fix vce initialize failed on Kaveri/Mullins
Forgot to add vce pg support via smu for Kaveri/Mullins.

Fixes: 561a5c83eadd ("drm/amd/pp: Unify powergate_uvd/vce/mmhub
                       to set_powergating_by_smu")

v2: refine patch descriptions suggested by Michel

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 14:49:15 -05:00
Rex Zhu
8ef23364b6 drm/amdgpu: Enable/disable gfx PG feature in rlc safe mode
This is required by gfx hw and can fix the rlc hang when
do s3 stree test on Cz/St.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Hang Zhou <hang.zhou@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 14:48:55 -05:00
Felix Kuehling
fca5d95997 drm/amdgpu: Adjust the VM size based on system memory size v2
Set the VM size based on system memory size between the ASIC-specific
limits given by min_vm_size and max_bits. GFXv9 GPUs will keep their
default VM size of 256TB (48 bit). Only older GPUs will adjust VM size
depending on system memory size.

This makes more VM space available for ROCm applications on GFXv8 GPUs
that want to map all available VRAM and system memory in their SVM
address space.

v2:
* Clarify comment
* Round up memory size before >> 30
* Round up automatic vm_size to power of two

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 14:48:25 -05:00
Huang Rui
07e6d3f03b drm/amdgpu: move PD/PT bos on LRU again
The new bulk moving functionality is ready, the overhead of moving PD/PT bos to
LRU is fixed. So move them on LRU again.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Tested-by: Mike Lothian <mike@fireburn.co.uk>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:11:22 -05:00
Huang Rui
f921661bd4 drm/amdgpu: use bulk moves for efficient VM LRU handling (v6)
I continue to work for bulk moving that based on the proposal by Christian.

Background:
amdgpu driver will move all PD/PT and PerVM BOs into idle list. Then move all of
them on the end of LRU list one by one. Thus, that cause so many BOs moved to
the end of the LRU, and impact performance seriously.

Then Christian provided a workaround to not move PD/PT BOs on LRU with below
patch:
Commit 0bbf32026cf5ba41e9922b30e26e1bed1ecd38ae ("drm/amdgpu: band aid
validating VM PTs")

However, the final solution should bulk move all PD/PT and PerVM BOs on the LRU
instead of one by one.

Whenever amdgpu_vm_validate_pt_bos() is called and we have BOs which need to be
validated we move all BOs together to the end of the LRU without dropping the
lock for the LRU.

While doing so we note the beginning and end of this block in the LRU list.

Now when amdgpu_vm_validate_pt_bos() is called and we don't have anything to do,
we don't move every BO one by one, but instead cut the LRU list into pieces so
that we bulk move everything to the end in just one operation.

Test data:
+--------------+-----------------+-----------+---------------------------------------+
|              |The Talos        |Clpeak(OCL)|BusSpeedReadback(OCL)                  |
|              |Principle(Vulkan)|           |                                       |
+------------------------------------------------------------------------------------+
|              |                 |           |0.319 ms(1k) 0.314 ms(2K) 0.308 ms(4K) |
| Original     |  147.7 FPS      |  76.86 us |0.307 ms(8K) 0.310 ms(16K)             |
+------------------------------------------------------------------------------------+
| Orignial + WA|                 |           |0.254 ms(1K) 0.241 ms(2K)              |
|(don't move   |  162.1 FPS      |  42.15 us |0.230 ms(4K) 0.223 ms(8K) 0.204 ms(16K)|
|PT BOs on LRU)|                 |           |                                       |
+------------------------------------------------------------------------------------+
| Bulk move    |  163.1 FPS      |  40.52 us |0.244 ms(1K) 0.252 ms(2K) 0.213 ms(4K) |
|              |                 |           |0.214 ms(8K) 0.225 ms(16K)             |
+--------------+-----------------+-----------+---------------------------------------+

After test them with above three benchmarks include vulkan and opencl. We can
see the visible improvement than original, and even better than original with
workaround.

v2: move all BOs include idle, relocated, and moved list to the end of LRU and
put them together.
v3: remove unused parameter and use list_for_each_entry instead of the one with
save entry.
v4: move the amdgpu_vm_move_to_lru_tail after command submission, at that time,
all bo will be back on idle list.
v5: remove amdgpu_vm_move_to_lru_tail_by_list(), use bulk_moveable instread of
validated, and move ttm_bo_bulk_move_lru_tail() also into
amdgpu_vm_move_to_lru_tail().
v6: clean up and fix return value.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Tested-by: Mike Lothian <mike@fireburn.co.uk>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:11:22 -05:00
Christian König
9a2779528e drm/ttm: revise ttm_bo_move_to_lru_tail to support bulk moves
When move a BO to the end of LRU, it need remember the BO positions.
Make sure all moved bo in between "first" and "last". And they will be bulk
moving together.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Tested-by: Mike Lothian <mike@fireburn.co.uk>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:11:21 -05:00
Christian König
11c3a249ff drm/amdgpu: add amdgpu_gmc_pd_addr helper
Add a helper to get the root PD address and remove the workarounds from
the GMC9 code for that.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:11:19 -05:00
Christian König
4e830fb1b5 drm/amdgpu: remove gart.table_addr
We can easily figure out the address on the fly.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:11:19 -05:00
Christian König
1123b989c5 drm/amdgpu: rename gart.robj into gart.bo
sed -i "s/gart.robj/gart.bo/" drivers/gpu/drm/amd/amdgpu/*.c
sed -i "s/gart.robj/gart.bo/" drivers/gpu/drm/amd/amdgpu/*.h

Just cleaning up radeon leftovers.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:11:18 -05:00
Christian König
cbd5285142 drm/amdgpu: move setting the GART addr into TTM
Move setting the GART addr for window based copies into the TTM code who
uses it.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:11:18 -05:00
Christian König
9a02ece43e drm/amdgpu: cleanup VM handling in the CS a bit
Add a helper function for getting the root PD addr and cleanup join the
two VM related functions and cleanup the function name.

No functional change.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:11:17 -05:00
Christian König
262b9c392e drm/amdgpu: validate the VM root PD from the VM code
Preparation for following changes. This validates the root PD twice,
but the overhead of that should be minimal.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:11:17 -05:00
Christian König
12938fad23 drm/amdgpu: cleanup GPU recovery check a bit (v2)
Check if we should call the function instead of providing the forced
flag.

v2: rebase on KFD changes (Alex)

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:11:16 -05:00
kbuild test robot
1849e73748 drm/amdgpu: amdgpu_kiq_reg_write_reg_wait() can be static
Fixes: d790449835e6 ("drm/amdgpu: use kiq to do invalidate tlb")
Reviewed-by: Emily Deng <Emily.Deng@amd.com>
Signed-off-by: kbuild test robot <fengguang.wu@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:11:16 -05:00
Emily Deng
ae74da3e14 drm/amdgpu: Don't use kiq in gpu reset
When in gpu reset, don't use kiq, it will generate more TDR.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:11:14 -05:00
Emily Deng
fc0faf0440 drm/amdgpu/sriov: Only sriov runtime support use kiq
For sriov, don't use kiq in exclusive mode, as don't know how long time
it will take, some times it will occur exclusive timeout.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:11:12 -05:00
Evan Quan
52de2ea74f drm/amdgpu: fix sdma doorbell range setting
Use the old doorbell range setting until the driver is
able to support more sdma queues.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:11:12 -05:00
Rex Zhu
a00ead2b39 drm/amdgpu: Fix compile warning
In function ‘gfx_v9_0_check_fw_write_wait’:
warning: enumeration value ‘CHIP_TAHITI’ not handled in switch [-Wswitch]

Always add default case in case there is no match

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:11:11 -05:00
Christian König
1b1f2fecb6 drm/amdgpu: rework ctx entity creation
Use a fixed number of entities for each hardware IP.

The number of compute entities is reduced to four, SDMA keeps it two
entities and all other engines just expose one entity.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:11:11 -05:00
Christian König
a245daf3d7 drm/amdgpu: cleanup HW_IP query
Move the code into a separate function.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:11:10 -05:00
Yintian Tao
9c70d10ae7 drm/amdgpu: remove fulll access for suspend phase1
There is no need for gpu full access for suspend phase1
because under virtualization there is no hw register access
for dce block.

Signed-off-by: Yintian Tao <yttao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:11:09 -05:00
Emily Deng
3890d11153 drm/amdgpu: use kiq to do invalidate tlb
To avoid the tlb flush not interrupted by world switch, use kiq and one
command to do tlb invalidate.

v2:
Refine the invalidate lock position.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-and-Tested-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:11:08 -05:00
Emily Deng
39b62541aa drm/amdgpu: Remove the sriov checking and add firmware checking
Unify bare metal and sriov, and add firmware checking for
reg write and reg wait unify command.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-and-Tested-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:11:08 -05:00
Paul Menzel
2c1e9bca44 drm/amdgpu: Do not evict VRAM on APUs with disabled HIBERNATE
Improve commit d796d844 (drm/radeon/kms: make hibernate work on IGPs) to
only migrate VRAM objects if the Linux kernel is actually built with
support for hibernation (suspend to disk).

The better solution is to get the information, if this is suspend or
hibernate, from `amdgpu_device_suspend()`, but that’s more involved, so
apply the simple solution first.

Link: https://bugs.freedesktop.org/show_bug.cgi?id=107277
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:11:03 -05:00
Huang Rui
28a160277a drm/amdgpu: add status checking after fw is loaded
The status field must be 0 after FW is loaded.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:11:03 -05:00
Christian König
09b6f25b55 drm/amdgpu: fix VM size reporting on Raven
Raven doesn't have an VCE block and so also no buggy VCE firmware.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:11:02 -05:00
Rex Zhu
fdd34271a3 drm/amdgpu: Set clock ungate state when suspend/fini
After set power ungate state, set clock ungate state
before when suspend or fini.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:11:01 -05:00
Rex Zhu
05df1f01b2 drm/amdgpu: Set power ungate state when suspend/fini
Unify to set power ungate state at the begin of suspend/fini.
Remove the workaround code for gfx off feature in
amdgpu_device.c.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:11:01 -05:00
Rex Zhu
1112a46b48 drm/amdgpu: Refine function name and function args
There are no any logical changes here.

1. change function names:
   amdgpu_device_ip_late_set_pg/cg_state to
   amdgpu_device_set_pg/cg_state.
2. add a function argument cg/pg_state, so
   we can enable/disable cg/pg through those functions

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:11:00 -05:00
Feifei Xu
bfcea52042 drm/amdgpu:change VEGA booting with firmware loaded by PSP
With PSP firmware loading, TMR mc address is supposed to be used.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:10:50 -05:00
Evan Quan
d4e838431d drm/amdgpu: added support 2nd UVD instance
Added psp fw loading support for vega20 2nd UVD instance.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:10:49 -05:00
Christian König
0d346a14c6 drm/amdgpu: use entity instead of ring for CS
Further demangle ring from entity handling.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:10:48 -05:00
Christian König
8290268f31 drm/amdgpu: move context related stuff to amdgpu_ctx.h
Further unmangle amdgpu.h.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:10:48 -05:00
Christian König
86275d090f drm/amdgpu: remove ring lru handling
Not needed any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:10:47 -05:00
Christian König
869a53d4d7 drm/amdgpu: remove the queue manager
Not needed any more since that is now done by the scheduler.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:10:47 -05:00
Christian König
72a4c072ca drm/amdgpu: use scheduler load balancing for compute CS
Start to use the scheduler load balancing for userspace compute
command submissions.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:10:46 -05:00
Christian König
845e6fdf3b drm/amdgpu: use scheduler load balancing for SDMA CS
Start to use the scheduler load balancing for userspace SDMA
command submissions.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:10:45 -05:00
Christian König
3798e9a6e6 drm/amdgpu: use new scheduler load balancing for VMs
Instead of the fixed round robin use let the scheduler balance the load
of page table updates.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:10:45 -05:00
James Zhu
aa5873dca4 drm/amdgpu: Change VCE booting with firmware loaded by PSP
With PSP firmware loading, TMR mc address is supposed to be used.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:10:44 -05:00
Dan Carpenter
ff30e9e850 drm/amdgpu: fix integer overflow test in amdgpu_bo_list_create()
We accidentally left out the size of the amdgpu_bo_list struct.  It
could lead to memory corruption on 32 bit systems.  You'd have to
pick the absolute maximum and set "num_entries == 59652323" then size
would wrap to 16 bytes.

Fixes: 920990cb08 ("drm/amdgpu: allocate the bo_list array after the list")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Bas Nieuwenhuizen <basni@chromium.org>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:10:42 -05:00
Rex Zhu
a54594752a drm/amdgpu: Cancel the delay work when suspend
Cancel the delay work to avoid the corner case that
ib test was not running when suspend

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:10:41 -05:00
Alex Deucher
6dddaeef4f drm/amdgpu: remove experimental flag for vega20
Now that PSP and SMU support is in place.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:10:40 -05:00
Feifei Xu
3082be1aea drm/amdgpu/psp: Enlarge PSP TMR SIZE from 3M to 4M.
Enlarge the PSP TMR SIZE to 4M for dual UVD fw front-door loading.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:10:39 -05:00
Evan Quan
218a9fbc8a drm/amdgpu: update vega20 sdma golden settings
Updated vega20 SDMA0 and SDMA1 golden settings.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:10:39 -05:00
Feifei Xu
54d682d9a5 drm/amdgpu/gfx9: Update gfx9 golden settings.
Update the goldensettings for vega20.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:10:38 -05:00
Likun Gao
0df5295c99 drm/amdgpu/vg20: Change the load type of vega20 to psp (v2)
Modified the vega20 load type to psp now that psp
support is implemented.

v2: squash in fixes history (Alex)

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:10:34 -05:00
Feifei Xu
654f761cfa drm/amdgpu: Add psp 11.0 support for vega20. (v2)
Add psp 11.0 code for vega20 and enable it.  PSP is the
security processor for the GPU.  It handles firmware
loading and GPU resets among other things.

v2: whitespace fix, enable support, adjust reg includes (Alex)

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:10:34 -05:00
Evan Quan
a6637313c7 drm/amdgpu: enable vega20 powerplay support
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:10:33 -05:00
Feifei Xu
fe3c948918 drm/amdgpu: Add nbio 7.4 support for vega20 (v3)
Some register offset in nbio v7.4 are different with v7.0.
We need a seperate nbio_v7_4.c for vega20.

v2: fix doorbell range for sdma (Alex)
v3: squash in static fix (kbuild test robot)

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:10:23 -05:00
Alex Deucher
25eaa565c4 Revert "drm/amdgpu: Add nbio support for vega20 (v2)"
Revert this to add proper nbio 7.4 support.

This reverts commit f5b2e1fa321eff20a9418ebd497d8a466f024a85.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:10:22 -05:00
Mauro Rossi
00ecc6e6d4 drm/amdgpu: enable ABGR and XBGR formats (v2)
Add support for DRM_FORMAT_{A,X}BGR8888 in amdgpu with amd dc disabled

(v2) Crossbar registers are defined and used to swap red and blue channels,
     keeping the existing coding style in each of the dce modules.
     After setting crossbar bits in fb_swap, use bitwise OR for big endian
     where required in DCE6 and DCE8 which do not rely on REG_SET_FIELD()

Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:10:19 -05:00
Rex Zhu
6c1fd99bc6 drm/amdgpu: Cancel gfx off delay work when driver fini/suspend
there may be gfx off delay work pending when suspend/driver
unload, need to cancel them first.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:10:12 -05:00
Boyuan Zhang
7ea34ea3e8 drm/amdgpu: fix emit frame size and comments for jpeg
Fix vcn jpeg ring emit fence size in dword, and fix the naming in comments.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Leo Liu <leo.liu at amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:10:11 -05:00
Boyuan Zhang
36a12bd0b4 drm/amdgpu: add emit trap for vcn jpeg
Add emit trap command in jpeg emit fence call.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Leo Liu <leo.liu at amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:10:11 -05:00
Boyuan Zhang
7f31077cad drm/amdgpu: enable system interrupt for jrbc
Enable system interrupt for jrbc during engine starting time.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Leo Liu <leo.liu at amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:10:10 -05:00
Boyuan Zhang
eb4f699920 drm/amdgpu: add emit reg write reg wait for vcn jpeg
The emit_reg_write_reg_wait function was not assigned for vcn jpeg.
This patch adds it back.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu at amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:10:09 -05:00
Huang Rui
c2d358d724 drm/amdgpu: move missed gfxoff entry into amdgpu_gfx header
Move missed gfxoff entry to amdgpu_gfx.h.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:10:05 -05:00
Huang Rui
4473e1db31 drm/amdgpu: move vm definitions into amdgpu_vm header
Demangle amdgpu.h.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:10:05 -05:00
Huang Rui
c082b99878 drm/amdgpu: move gmc macros into amdgpu_gmc header
Demangle amdgpu.h.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:10:04 -05:00
Huang Rui
5df585258f drm/amdgpu: move display definitions into amdgpu_display header
Demangle amdgpu.h.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:10:04 -05:00
Huang Rui
9e21fc56fe drm/amdgpu: remove useless gds switch macro
Demangle amdgpu.h.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:10:03 -05:00
Huang Rui
0a7845db93 drm/amdgpu: move ring macros into amdgpu_ring header
Demangle amdgpu.h.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:10:03 -05:00
Christian König
7febe4bfd5 drm/scheduler: fix setting the priorty for entities (v2)
Since we now deal with multiple rq we need to update all of them, not
just the current one.

v2: Trivial: Removed unused variable (Alex)

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:10:00 -05:00
Rex Zhu
bf9b1d9dc7 drm/amdgpu: Delay 100ms to enable gfx off feature
Original 500ms delay seems a bit large.
Change to 100 ms suggested by Christian.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:10:00 -05:00
Huang Rui
2cddc50e98 drm/amdgpu: move gem definitions into amdgpu_gem header
Demangle amdgpu.h.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:09:56 -05:00
Huang Rui
6462c0071b drm/amdgpu: move psp macro into amdgpu_psp header
Demangle amdgpu.h.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:09:56 -05:00
Huang Rui
55560046d5 drm/amdgpu: move firmware definitions into amdgpu_ucode header
Demangle amdgpu.h.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:09:55 -05:00
Huang Rui
bb7743bc20 drm/amdgpu: move sdma definitions into amdgpu_sdma header
Demangle amdgpu.h.
Furthermore, SDMA is used for moving and clearing the data buffer, so the header
also need be included in ttm.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:09:55 -05:00
Huang Rui
aa47d11728 drm/amdgpu: move ih definitions into amdgpu_ih header
Demangle amdgpu.h

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:09:54 -05:00
Huang Rui
448fe1928c drm/amdgpu: move gfx definitions into amdgpu_gfx header
Demangle amdgpu.h

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:09:54 -05:00
Rex Zhu
3fded222f4 drm/amdgpu: Disable gfx off if VCN is busy
this patch is a workaround for the gpu hang
at video begin/end time if gfx off is enabled.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:09:53 -05:00
Rex Zhu
408acede87 drm/amdgpu: Ctrl gfx off via amdgpu_gfx_off_ctrl
use amdgpu_gfx_off_ctrl function so driver can arbitrate
whether the gfx ip can be power off or power on.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:09:52 -05:00
Rex Zhu
1e317b99f0 drm/amdgpu: Put enable gfx off feature to a delay thread
delay to enable gfx off feature to avoid gfx on/off frequently
suggested by Alex and Evan.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:09:52 -05:00
Rex Zhu
d23ee13fba drm/amdgpu: Add amdgpu_gfx_off_ctrl function
v2:
   1. drop the special handling for the hw IP
      suggested by hawking and Christian.
   2. refine the variable name suggested by Flora.

This funciton as the entry of gfx off feature.
we arbitrat gfx off feature enable/disable in this
function.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:09:51 -05:00
Andrey Grodzovsky
65f7260b13 drm/amdgpu: Add job pipe sync dependecy trace
It's useful to trace any dependency a job has on prevoius
jobs.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:09:47 -05:00
Rex Zhu
c36628d898 drm/amgpu/acp: Implement set_powergating_state for acp
so driver can powergate acp block after asic initialized
to save power.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:09:44 -05:00
Rex Zhu
3a54d2c895 drm/amdgpu/acp: Powrgate acp via smu
Call smu to power gate/ungate acp instand of only
powr down acp tiles in acp block.
when smu power gate acp:
smu will turn off clock, power down acp tiles,check and
enter in ULV state.
when smu  ungate acp:
smu will exit ulv, turn on clocks, power on acp tiles.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:09:43 -05:00
Vijendar Mukunda
1062ddb6d5 drm/amd/amdgpu: Enabling Power Gating for Stoney platform
Removed condition checks to skip the power gating feature for
stoney platform.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Vijendar Mukunda <vijendar.mukunda@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:09:43 -05:00
Rex Zhu
be2d6aa51e drm/amdgpu: Power down acp if board uses AZ (v2)
if board uses AZ rather than ACP, we power down acp
through smu to save power.

v2: handle S3/S4 and hw_fini (Alex)

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:09:42 -05:00
Andrey Grodzovsky
a3d9103ebf drm/amdgpu: Fix page fault and kasan warning on pci device remove.
Problem:
When executing echo 1 > /sys/class/drm/card0/device/remove kasan warning
as bellow and page fault happen because adev->gart.pages already freed by the
time amdgpu_gart_unbind is called.

BUG: KASAN: user-memory-access in amdgpu_gart_unbind+0x98/0x180 [amdgpu]
Write of size 8 at addr 0000000000003648 by task bash/1828
CPU: 2 PID: 1828 Comm: bash Tainted: G        W  O      4.18.0-rc1-dev+ #29
Hardware name: Gigabyte Technology Co., Ltd. AX370-Gaming/AX370-Gaming-CF, BIOS F3 06/19/2017
Call Trace:
dump_stack+0x71/0xab
kasan_report+0x109/0x390
amdgpu_gart_unbind+0x98/0x180 [amdgpu]
ttm_tt_unbind+0x43/0x60 [ttm]
ttm_bo_move_ttm+0x83/0x1c0 [ttm]
ttm_bo_handle_move_mem+0xb97/0xd00 [ttm]
ttm_bo_evict+0x273/0x530 [ttm]
ttm_mem_evict_first+0x29c/0x360 [ttm]
ttm_bo_force_list_clean+0xfc/0x210 [ttm]
ttm_bo_clean_mm+0xe7/0x160 [ttm]
amdgpu_ttm_fini+0xda/0x1d0 [amdgpu]
amdgpu_bo_fini+0xf/0x60 [amdgpu]
gmc_v8_0_sw_fini+0x36/0x70 [amdgpu]
amdgpu_device_fini+0x2d0/0x7d0 [amdgpu]
amdgpu_driver_unload_kms+0x6a/0xd0 [amdgpu]
drm_dev_unregister+0x79/0x180 [drm]
amdgpu_pci_remove+0x2a/0x60 [amdgpu]
pci_device_remove+0x5b/0x100
device_release_driver_internal+0x236/0x360
pci_stop_bus_device+0xbf/0xf0
pci_stop_and_remove_bus_device_locked+0x16/0x30
remove_store+0xda/0xf0
kernfs_fop_write+0x186/0x220
__vfs_write+0xcc/0x330
vfs_write+0xe6/0x250
ksys_write+0xb1/0x140
do_syscall_64+0x77/0x1e0
entry_SYSCALL_64_after_hwframe+0x44/0xa9
RIP: 0033:0x7f66ebbb32c0

Fix:
Split gmc_v{6,7,8,9}_0_gart_fini to postpone amdgpu_gart_fini to after
memory managers are shut down since gart unbind happens
as part of this procedure

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:09:40 -05:00
Emily Deng
4f0ecd36f2 amdgpu: fix multi-process hang issue
SWDEV-146499: hang during multi vulkan process testing

cause:
the second frame's PREAMBLE_IB have clear-state
and LOAD actions, those actions ruin the pipeline
that is still doing process in the previous frame's
work-load IB.

fix:
need insert pipeline sync if have context switch for
SRIOV (because only SRIOV will report PREEMPTION flag
to UMD)

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:09:40 -05:00
Christian König
9296435729 drm/amdgpu: fix preamble handling
At this point the command submission can still be interrupted.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:09:39 -05:00
Christian König
1cadf2b368 drm/amdgpu: fix VM clearing for the root PD
We need to figure out the address after validating the BO, not before.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27 11:09:39 -05:00
Linus Torvalds
5e8704ac1c amdgpu and panel/misc fixes.
-----BEGIN PGP SIGNATURE-----
 
 iQIbBAABAgAGBQJbf4GtAAoJEAx081l5xIa+WzsP8gNAadlpbPP3zmMoVwCKPeOR
 YZBeJxc/C9EXR8PfsMzo5kuUFm6rf7F9hYCaqmJj+exKCEGSwRAsHxBk2Ll9PbHm
 7iFf7HjnGlU6swRtHOniLV2c1XxyUJGafkHBET6/SarqHfTW3QvaGTAxAKmxpNSr
 qY7m1SyU1JKV2sw9N4xODLMRvoG/Y0OaiAgzOkUTbrSNomCfWVTGV/Pat7pDh/3z
 jbeeTGaMLYJISKWBMfTeN4lxex+b2txGAMBs5OQvwetD4bvsstbp1tdkB7KNmISm
 RrOJOTlD2ZhZ/Yo2i3JETa3v6nhAw6+zeOq7o/eiBtnkKSYb57hL42toKx/k4YV4
 pdTnkImrYtVOzFj39MvByISSD0XaM7nuP769DkGsRjlPa1O5LnpDcawsNuc+brqY
 wQQ/CBhh614YfTcQKRoKkeZSr5CjuQILwX5VVQFiL7DJaHXpfqK7IXUQ99zF1SF+
 V9Byb6BZpfDYEsN9biqxGTqIYEs8FWi9NP7uK8vQeMaT+9P5/ntVQVIfl5rhp3W8
 RtZc1F5NBVc3XTJOcgpcfyM5gz7L31NDHbWRxgIsCMWDFfmTxxSirJSc8EE+2fqn
 EtNzuzcVKBmTvUrcQsuclC4iymDAOnCjSwdSVTg19loi84y9UKx7BIg1pqYku3hA
 Yihn27r0Ftyd4cXdgu4=
 =kMpO
 -----END PGP SIGNATURE-----

Merge tag 'drm-next-2018-08-24' of git://anongit.freedesktop.org/drm/drm

Pull drm fixes from Dave Airlie:
 "Just a couple of fixes"

  One MAINTAINERS address change, two panels fixes, and set of amdgpu
  fixes (build fixes, display fixes and some others)"

* tag 'drm-next-2018-08-24' of git://anongit.freedesktop.org/drm/drm:
  drm/edid: Add 6 bpc quirk for SDC panel in Lenovo B50-80
  drm/amd/display: Don't build DCN1 when kcov is enabled
  Revert "drm/amdgpu/display: Replace CONFIG_DRM_AMD_DC_DCN1_0 with CONFIG_X86"
  drm/amdgpu/display: disable eDP fast boot optimization on DCE8
  drm/amdgpu: fix amdgpu_amdkfd_remove_eviction_fence v3
  drm/amdgpu: fix incorrect use of drm_file->pid
  drm/amdgpu: fix incorrect use of fcheck
  drm/powerplay: enable dpm under pass-through
  drm/amdgpu: access register without KIQ
  drm/amdgpu: set correct base for THM/NBIF/MP1 IP
  drm/amd/display: fix dentist did ranges
  drm/amd/display: make dp_ss_off optional
  drm/amd/display: fix dp_ss_control vbios flag parsing
  drm/amd/display: Do not retain link settings
  MAINTAINERS: drm-misc: Change seanpaul's email address
  drm/panel: simple: tv123wam: Add unprepare delay
2018-08-24 09:22:54 -07:00
Andrey Grodzovsky
eb7e5cfced drm/amdgpu: Fix page fault and kasan warning on pci device remove.
Problem:
When executing echo 1 > /sys/class/drm/card0/device/remove kasan warning
as bellow and page fault happen because adev->gart.pages already freed by the
time amdgpu_gart_unbind is called.

BUG: KASAN: user-memory-access in amdgpu_gart_unbind+0x98/0x180 [amdgpu]
Write of size 8 at addr 0000000000003648 by task bash/1828
CPU: 2 PID: 1828 Comm: bash Tainted: G        W  O      4.18.0-rc1-dev+ #29
Hardware name: Gigabyte Technology Co., Ltd. AX370-Gaming/AX370-Gaming-CF, BIOS F3 06/19/2017
Call Trace:
dump_stack+0x71/0xab
kasan_report+0x109/0x390
amdgpu_gart_unbind+0x98/0x180 [amdgpu]
ttm_tt_unbind+0x43/0x60 [ttm]
ttm_bo_move_ttm+0x83/0x1c0 [ttm]
ttm_bo_handle_move_mem+0xb97/0xd00 [ttm]
ttm_bo_evict+0x273/0x530 [ttm]
ttm_mem_evict_first+0x29c/0x360 [ttm]
ttm_bo_force_list_clean+0xfc/0x210 [ttm]
ttm_bo_clean_mm+0xe7/0x160 [ttm]
amdgpu_ttm_fini+0xda/0x1d0 [amdgpu]
amdgpu_bo_fini+0xf/0x60 [amdgpu]
gmc_v8_0_sw_fini+0x36/0x70 [amdgpu]
amdgpu_device_fini+0x2d0/0x7d0 [amdgpu]
amdgpu_driver_unload_kms+0x6a/0xd0 [amdgpu]
drm_dev_unregister+0x79/0x180 [drm]
amdgpu_pci_remove+0x2a/0x60 [amdgpu]
pci_device_remove+0x5b/0x100
device_release_driver_internal+0x236/0x360
pci_stop_bus_device+0xbf/0xf0
pci_stop_and_remove_bus_device_locked+0x16/0x30
remove_store+0xda/0xf0
kernfs_fop_write+0x186/0x220
__vfs_write+0xcc/0x330
vfs_write+0xe6/0x250
ksys_write+0xb1/0x140
do_syscall_64+0x77/0x1e0
entry_SYSCALL_64_after_hwframe+0x44/0xa9
RIP: 0033:0x7f66ebbb32c0

Fix:
Split gmc_v{6,7,8,9}_0_gart_fini to postpone amdgpu_gart_fini to after
memory managers are shut down since gart unbind happens
as part of this procedure

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-22 16:36:49 -05:00
Emily Deng
2f40c6eac7 amdgpu: fix multi-process hang issue
SWDEV-146499: hang during multi vulkan process testing

cause:
the second frame's PREAMBLE_IB have clear-state
and LOAD actions, those actions ruin the pipeline
that is still doing process in the previous frame's
work-load IB.

fix:
need insert pipeline sync if have context switch for
SRIOV (because only SRIOV will report PREEMPTION flag
to UMD)

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-22 16:05:20 -05:00
Christian König
d98ff24e8e drm/amdgpu: fix preamble handling
At this point the command submission can still be interrupted.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-22 16:05:00 -05:00
Christian König
8604ffcbf0 drm/amdgpu: fix VM clearing for the root PD
We need to figure out the address after validating the BO, not before.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-22 16:04:14 -05:00
Michal Hocko
93065ac753 mm, oom: distinguish blockable mode for mmu notifiers
There are several blockable mmu notifiers which might sleep in
mmu_notifier_invalidate_range_start and that is a problem for the
oom_reaper because it needs to guarantee a forward progress so it cannot
depend on any sleepable locks.

Currently we simply back off and mark an oom victim with blockable mmu
notifiers as done after a short sleep.  That can result in selecting a new
oom victim prematurely because the previous one still hasn't torn its
memory down yet.

We can do much better though.  Even if mmu notifiers use sleepable locks
there is no reason to automatically assume those locks are held.  Moreover
majority of notifiers only care about a portion of the address space and
there is absolutely zero reason to fail when we are unmapping an unrelated
range.  Many notifiers do really block and wait for HW which is harder to
handle and we have to bail out though.

This patch handles the low hanging fruit.
__mmu_notifier_invalidate_range_start gets a blockable flag and callbacks
are not allowed to sleep if the flag is set to false.  This is achieved by
using trylock instead of the sleepable lock for most callbacks and
continue as long as we do not block down the call chain.

I think we can improve that even further because there is a common pattern
to do a range lookup first and then do something about that.  The first
part can be done without a sleeping lock in most cases AFAICS.

The oom_reaper end then simply retries if there is at least one notifier
which couldn't make any progress in !blockable mode.  A retry loop is
already implemented to wait for the mmap_sem and this is basically the
same thing.

The simplest way for driver developers to test this code path is to wrap
userspace code which uses these notifiers into a memcg and set the hard
limit to hit the oom.  This can be done e.g.  after the test faults in all
the mmu notifier managed memory and set the hard limit to something really
small.  Then we are looking for a proper process tear down.

[akpm@linux-foundation.org: coding style fixes]
[akpm@linux-foundation.org: minor code simplification]
Link: http://lkml.kernel.org/r/20180716115058.5559-1-mhocko@kernel.org
Signed-off-by: Michal Hocko <mhocko@suse.com>
Acked-by: Christian König <christian.koenig@amd.com> # AMD notifiers
Acked-by: Leon Romanovsky <leonro@mellanox.com> # mlx and umem_odp
Reported-by: David Rientjes <rientjes@google.com>
Cc: "David (ChunMing) Zhou" <David1.Zhou@amd.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Doug Ledford <dledford@redhat.com>
Cc: Jason Gunthorpe <jgg@ziepe.ca>
Cc: Mike Marciniszyn <mike.marciniszyn@intel.com>
Cc: Dennis Dalessandro <dennis.dalessandro@intel.com>
Cc: Sudeep Dutt <sudeep.dutt@intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Dimitri Sivanich <sivanich@sgi.com>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: Juergen Gross <jgross@suse.com>
Cc: "Jérôme Glisse" <jglisse@redhat.com>
Cc: Andrea Arcangeli <aarcange@redhat.com>
Cc: Felix Kuehling <felix.kuehling@amd.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2018-08-22 10:52:44 -07:00
Leo (Sunpeng) Li
dc37a9a08d Revert "drm/amdgpu/display: Replace CONFIG_DRM_AMD_DC_DCN1_0 with CONFIG_X86"
This reverts commit 8624c3c4dbfe24fc6740687236a2e196f5f4bfb0.

We need CONFIG_DRM_AMD_DC_DCN1_0 to guard code that is using fp math.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-21 14:32:28 -05:00
Christian König
e6f8d26ebb drm/amdgpu: fix amdgpu_amdkfd_remove_eviction_fence v3
Fix quite a number of bugs here. Unfortunately only compile tested.

v2: fix copy&paste error
v3: fix 80 chars issue in comment

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-21 14:19:26 -05:00
Christian König
c4aed87630 drm/amdgpu: fix incorrect use of drm_file->pid
That's the PID of the creator of the file (usually the X server) and not
the end user of the file.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
CC: stable@vger.kernel.org
2018-08-21 14:19:18 -05:00
Christian König
bce31d4c1a drm/amdgpu: fix incorrect use of fcheck
The usage isn't RCU protected.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
CC: stable@vger.kernel.org
2018-08-21 14:19:10 -05:00
Yintian Tao
fa1d04e9a8 drm/amdgpu: access register without KIQ
there is no need to access register such as mmSMC_IND_INDEX_11
and mmSMC_IND_DATA_11 through KIQ because they are VF-copy.

Signed-off-by: Yintian Tao <yttao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-21 14:17:36 -05:00
Evan Quan
bde0781561 drm/amdgpu: set correct base for THM/NBIF/MP1 IP
Set correct address base for vega20.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-21 14:16:50 -05:00
Michel Dänzer
c9533d1bca drm/amdgpu: Use kvmalloc for allocating UVD/VCE/VCN BO backup memory
The allocated size can be (at least?) as large as megabytes, and
there's no need for it to be physically contiguous.

May avoid spurious failures to initialize / suspend the corresponding
block while there's memory pressure.

Bugzilla: https://bugs.freedesktop.org/107432
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-16 12:59:11 -05:00
Emily Deng
20acbed47d drm/amdgpu/vce: VCE entity initialization relies on ring initializtion
Entity init should after ring init, as the entity's sched_rq's initialization
is in ring init.

SWDEV-161495

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-13 17:21:29 -05:00
Emily Deng
33d5bd0705 drm/amdgpu/uvd: UVD entity initialization relys on ring initialization
Entity init should after ring init, as the entity's sched_rq's initialization
is in ring init.

SWDEV-161495

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-13 17:20:10 -05:00
Likun Gao
4d77c0f676 drm/amdgpu:add VCN booting with firmware loaded by PSP
Setup psp firmware loading for VCN, and make VCN block
booting from tmr mac address.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2018-08-13 17:19:46 -05:00
Likun Gao
235ac9de62 drm/amdgpu:add VCN support in PSP driver
Add VCN support in PSP driver

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2018-08-13 17:19:27 -05:00
Likun Gao
c9ca989696 drm/amdgpu:add new firmware id for VCN
Add the new firmware id for VCN into the enum

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2018-08-13 17:19:10 -05:00
James Zhu
435198f33b drm/amdgpu: update tmr mc address
Update tmr mc address with firmware loading address
which is returned from PSP firmware

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2018-08-13 17:18:54 -05:00
James Zhu
abf412b3ef drm/amdgpu:add tmr mc address into amdgpu_firmware_info
amdgpu IP blocks booting need Trust Memory Region(tmr) mc address
of its firmware which is loaded by PSP

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Likun Gao <likun.gao@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2018-08-13 17:18:39 -05:00
Dave Airlie
557ce95051 Merge branch 'drm-next-4.19' of git://people.freedesktop.org/~agd5f/linux into drm-next
More fixes for 4.19:
- Fixes for scheduler
- Fix for SR-IOV
- Fixes for display

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180809200052.2777-1-alexander.deucher@amd.com
2018-08-10 11:43:02 +10:00
Emily Deng
b045d3af7d drm/amdgpu/sriov: give 8s for recover vram under RUNTIME
Extend the timeout for recovering vram bos from shadows on sr-iov
to cover the worst case scenario for timeslices and VFs

Under runtime, the wait fence time could be quite long when
other VFs are in exclusive mode. For example, for 4 VF, every
VF's exclusive timeout time is set to 3s, then the worst case is
9s. If the VF number is more than 4,then the worst case time will
be longer.
The 8s is the test data, with setting to 8s, it will pass the TDR
test for 1000 times.

SWDEV-161490

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-09 11:59:17 -05:00
Dave Airlie
940fbcb73f Merge branch 'drm-next-4.19' of git://people.freedesktop.org/~agd5f/linux into drm-next
Fixes for 4.19:
- Fix UVD 7.2 instance handling
- Fix UVD 7.2 harvesting
- GPU scheduler fix for when a process is killed
- TTM cleanups
- amdgpu CS bo_list fixes
- Powerplay fixes for polaris12 and CZ/ST
- DC fixes for link training certain HMDs
- DC fix for vega10 blank screen in certain cases

From: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180801222906.1016-1-alexander.deucher@amd.com
2018-08-08 06:22:23 +10:00
Gustavo A. R. Silva
ddf74e79a5 drm/amdgpu/pm: Fix potential Spectre v1
idx can be indirectly controlled by user-space, hence leading to a
potential exploitation of the Spectre variant 1 vulnerability.

This issue was detected with the help of Smatch:

drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c:408 amdgpu_set_pp_force_state()
warn: potential spectre issue 'data.states'

Fix this by sanitizing idx before using it to index data.states

Notice that given that speculation windows are large, the policy is
to kill the speculation on the first load and not worry if it can be
completed with a dependent load/store [1].

[1] https://marc.info/?l=linux-kernel&m=152449131114778&w=2

Cc: stable@vger.kernel.org
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-31 16:58:23 -05:00
Thomas Zimmermann
fea872b279 drm/amdgpu: Replace ttm_bo_unref with ttm_bo_put
The function ttm_bo_put releases a reference to a TTM buffer object. The
function's name is more aligned to the Linux kernel convention of naming
ref-counting function _get and _put.

A call to ttm_bo_unref takes the address of the TTM BO object's pointer and
clears the pointer's value to NULL. This is not necessary in most cases and
sometimes even worked around by the calling code. A call to ttm_bo_put only
releases the reference without clearing the pointer.

The current behaviour of cleaning the pointer is kept in the calling code,
but should be removed if not required in a later patch.

v2:
 * set prefix to drm/amdgpu

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-31 16:58:21 -05:00
Thomas Zimmermann
71d5ef1127 drm/amdgpu: Replace ttm_bo_reference with ttm_bo_get
The function ttm_bo_get acquires a reference on a TTM buffer object. The
function's name is more aligned to the Linux kernel convention of naming
ref-counting function _get and _put.

v2:
 * changed prefix to drm/amdgpu

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-31 16:58:21 -05:00
Christian König
4a102ad4ba drm/amdgpu: create an empty bo_list if no handle is provided
Instead of having extra handling just create an empty bo_list when no
handle is provided.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming  Zhou <david1.zhou@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-31 16:58:19 -05:00
Christian König
920990cb08 drm/amdgpu: allocate the bo_list array after the list
This avoids multiple allocations for the head and the array.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming  Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-31 16:58:19 -05:00
Christian König
39f7f69a60 drm/amdgpu: add bo_list iterators
Add helpers to iterate over all entries in a bo_list.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming  Zhou <david1.zhou@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-31 16:58:19 -05:00
Christian König
a0f208453b drm/amdgpu: nuke amdgpu_bo_list_free
The RCU grace period is harmless and avoiding it is not worth the effort
of doubling the implementation.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming  Zhou <david1.zhou@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-31 16:58:18 -05:00
Christian König
81c6dabcc9 drm/amdgpu: always recreate bo_list
The bo_list handle is allocated by OP_CREATE, so in OP_UPDATE here we just
re-create the bo_list object and replace the handle. This way we don't
need locking to protect the bo_list because it's always re-created when
changed.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming  Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-31 16:58:18 -05:00
Christian König
4a8c21a1e9 drm/amdgpu: move bo_list defines to amdgpu_bo_list.h
Further demangle amdgpu.h

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming  Zhou <david1.zhou@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-31 16:58:18 -05:00
Christian König
8ab19ea619 drm/amdgpu: add new amdgpu_vm_bo_trace_cs() function v2
This allows us to trace all VM ranges which should be valid inside a CS.

v2: dump mappings without BO as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming  Zhou <david1.zhou@amd.com>
Reviewed-and-tested-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> (v1)
Reviewed-by: Huang Rui <ray.huang@amd.com> (v1)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-31 16:58:17 -05:00
Christian König
0cb7c1f03b drm/amdgpu: return error if both BOs and bo_list handle is given
Return -EINVAL when both the BOs as well as a list handle is provided in
the IOCTL.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming  Zhou <david1.zhou@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-31 16:58:17 -05:00
Christian König
275105ce7b drm/amdgpu: fix total size calculation
long might only be 32bit in size and we can easily use more than 4GB
here.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming  Zhou <david1.zhou@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-31 16:58:16 -05:00
Christian König
52c054caf8 drm/amdgpu: add proper error handling to amdgpu_bo_list_get
Otherwise we silently don't use a BO list when the handle is invalid.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-31 16:58:16 -05:00
Rex Zhu
ccf9ef0b0d drm/amdgpu: fix a reversed condition
This test was reversed so it would end up leading to vddnb value
can't be read via hwmon on APU.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2018-07-31 16:58:12 -05:00
Dave Airlie
3fce461827 BackMerge v4.18-rc7 into drm-next
rmk requested this for armada and I think we've had a few
conflicts build up.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2018-07-30 10:39:22 +10:00
Huang Rui
2e603d0429 drm/amdgpu: clean up the superfluous space and align the comment text for amdgpu_ttm
This patch cleans up spaces and align the text to refine the comment for
amdgpu_ttm.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-27 15:00:38 -05:00
Junwei Zhang
204029e197 drm/amdgpu: correct evict flag for bo move
pass the evict flag instead of hard code

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-27 15:00:29 -05:00
Alex Deucher
f1e582ebfd drm/amdgpu: implement harvesting support for UVD 7.2 (v3)
Properly handle cases where one or more instance of the IP
block may be harvested.

v2: make sure ip_num_rings is initialized amdgpu_queue_mgr.c
v3: rebase on Christian's UVD changes, drop unused var

Reviewed-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-27 09:07:44 -05:00
Christian König
66c28d6df2 drm/amdgpu: patch the IBs for the second UVD instance v2
Patch the IBs for the second UVD instance so that userspace don't need
to care about the instance they submit to.

v2: use direct IB patching

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-and-tested-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-27 09:07:41 -05:00
Christian König
9d248517d4 drm/amdgpu: add support for inplace IB patching for MM engines v2
We are going to need that for the second UVD instance on Vega20.

v2: rename to patch_cs_in_place

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-and-tested-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-27 09:07:41 -05:00
Jia-Ju Bai
586092ab4b gpu: drm: amdgpu: Replace mdelay with msleep in cik_pcie_gen3_enable()
cik_pcie_gen3_enable() is only called by cik_common_hw_init(), which is
never called in atomic context.
cik_pcie_gen3_enable() calls mdelay() to busily wait, which is not
necessary.
mdelay() can be replaced with msleep().

This is found by a static analysis tool named DCNS written by myself.

Signed-off-by: Jia-Ju Bai <baijiaju1990@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-25 15:06:40 -05:00
Alex Deucher
6cdf4e87b4 drm/amdgpu/gmc9: clarify GPUVM fault error message
The address printed is the actual address, not the page.

Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-25 15:06:40 -05:00
Nayan Deshmukh
068c330419 drm/scheduler: remove sched field from the entity
The scheduler of the entity is decided by the run queue on which
it is queued. This patch avoids us the effort required to maintain
a sync between rq and sched field when we start shifting entites
among different rqs.

Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-25 15:06:26 -05:00
Nayan Deshmukh
cdc5017659 drm/scheduler: modify API to avoid redundancy
entity has a scheduler field and we don't need the sched argument
in any of the functions where entity is provided.

Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-25 15:06:19 -05:00
Christian König
bf314ca3f1 drm/amdgpu: reduce the number of placements for a BO
Make struct amdgpu_bo a bit smaller.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-25 15:06:13 -05:00
Christian König
c704ab18e0 drm/amdgpu: consistenly name amdgpu_bo_ functions
Just rename functions, no functional change.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-25 15:06:06 -05:00
Christian König
4d4831a3da drm/amdgpu: expose only the first UVD instance for now
Going to completely rework the context to ring mapping with Nayan's GSoC
work, but for now just stopping to expose the second UVD instance should
do it.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-25 15:05:32 -05:00
Christian König
f8a91d4555 drm/amdgpu: clean up coding style a bit
No need to bitcast a boolean and even if we should use "!!" instead.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-25 15:05:08 -05:00
Shirish S
5f8181733f drm/amdgpu: move the amdgpu_fbdev_set_suspend() further up
This patch moves amdgpu_fbdev_set_suspend() to the beginning
of suspend sequence.

This is to ensure fbcon does not to write to the VRAM
after GPU is powerd down.

Signed-off-by: Shirish S <shirish.s@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-24 15:14:54 -05:00
Michel Dänzer
456607d816 drm/amdgpu: Don't warn on destroying a pinned BO
The warning turned out to be not so useful, as BO destruction tends to
be deferred to a workqueue.

Also, we should be preventing any damage from this now, so not really
important anymore to fix code doing this.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Tested-by: Mike Lothian <mike@fireburn.co.uk>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-24 15:14:45 -05:00
Michel Dänzer
226127a67e drm/amdgpu: Fix RLC safe mode test in gfx_v9_0_enter_rlc_safe_mode
We were testing the register offset, instead of the value stored in the
register, therefore always timing out the loop.

This reduces suspend time of the system in the bug report below by ~600
ms.

Cc: stable@vger.kernel.org
Bugzilla: https://bugs.freedesktop.org/107277
Tested-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-24 15:13:53 -05:00
Alex Deucher
fe1053b785 drm/amdgpu: rework suspend and resume to deal with atomic changes
Use the newly split ip suspend functions to do suspend displays
first (to deal with atomic so that FBs can be unpinned before
attempting to evict vram), then evict vram, then suspend the
other IPs.  Also move the non-DC pinning code to only be
called in the non-DC cases since atomic should take care of
DC.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107065
Fixes: e00fb85 drm: Stop updating plane->crtc/fb/old_fb on atomic drivers
Acked-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-and-tested-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-20 14:24:55 -05:00
Alex Deucher
e7854a0380 drm/amdgpu: split ip suspend into 2 phases
We need to do some IPs earlier to deal with ordering issues
similar to how resume is split into two phases. Do DCE first
to deal with atomic, then do the rest.

Acked-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-and-tested-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-20 14:24:50 -05:00
Alex Deucher
5b8eb0edba drm/amdgpu/acpi: skip backlight events for DC
No change in behavior, just bail sooner.

Reviewed-by: Jim Qu <Jim.Qu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-20 14:24:41 -05:00
Alex Deucher
9e7204beae drm/amdgpu/apci: don't call sbios request function if it's not supported
Check the supported functions mask before calling the bios
requests method.

Reviewed-by: Jim Qu <Jim.Qu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-20 14:24:35 -05:00
Andrey Grodzovsky
7766484b4a drm/amdgpu: Fix warning in dma_fence_is_later on resume from S3.
Problem:
amdgpu_ttm_set_buffer_funcs_status destroys adev->mman.entity on suspend
without releasing adev->mman.bdev.man[TTM_PL_VRAM].move fence
so on resume the new drm_sched_entity.fence_context causes
the warning against the old fence context which is different.

Fix:
When destroying sched_entity in amdgpu_ttm_set_buffer_funcs_status
release  man->move and set the pointer to NULL.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-20 14:24:25 -05:00
Shirish S
ecb8c50382 drm/amdgpu: use drm_fb helper for console_(un)lock
This patch removes the usage of console_(un)lock
by replacing drm_fb_helper_set_suspend() to
drm_fb_helper_set_suspend_unlocked() which locks and
unlocks the console instead of locking ourselves.

Signed-off-by: Shirish S <shirish.s@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-20 14:24:18 -05:00
Shirish S
4d3b9ae50e drm/amdgpu: lock and unlock console only for amdgpu_fbdev_set_suspend [V5]
[Why]
While the console_lock is held, console output will be buffered, till
its unlocked it wont be emitted, hence its ideal to unlock sooner to enable
debugging/detecting/fixing of any issue in the remaining sequence of events
in resume path.
The concern here is about consoles other than fbcon on the device,
e.g. a serial console

[How]
This patch restructures the console_lock, console_unlock around
amdgpu_fbdev_set_suspend() and moves this new block appropriately.

V2: Kept amdgpu_fbdev_set_suspend after pci_set_power_state
V3: Updated the commit message to clarify the real concern that this patch
    addresses.
V4: code clean-up.
V5: fixed return value

Signed-off-by: Shirish S <shirish.s@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-20 14:23:33 -05:00
Colin Ian King
3f48c6813f drm/amdgpu: fix spelling mistake "successed" -> "succeeded"
Trivial fix to spelling mistake in dev_err error message.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-20 14:23:14 -05:00
Dave Airlie
500775074f Merge branch 'drm-next-4.19' of git://people.freedesktop.org/~agd5f/linux into drm-next
More features for 4.19:
- Map processes to vmids for debugging GPUVM faults
- Raven gfxoff fixes
- Initial gfxoff support for vega12
- Use defines for interrupt sources rather than magic numbers
- DC aux fixes
- Finish DC logging TODO
- Add more DC debugfs interfaces for conformance testing
- Add CRC support for DCN
- Scheduler rework in preparation for load balancing
- Unify common smu9 code
- Clean up UVD instancing support
- ttm cleanups
- Misc fixes and cleanups

Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180719194001.3488-1-alexander.deucher@amd.com
2018-07-20 14:54:31 +10:00
Dave Airlie
294f96ae8a drm-misc-next for 4.19:
Core Changes:
 - add support for DisplayPort CEC-Tunneling-over-AUX (Hans Verkuil)
 - more doc updates (Daniel Vetter)
 - fourcc: Add is_yuv field to drm_format_info (Ayan Kumar Halder)
 - dma-buf: correctly place BUG_ON (Michel Dänzer)
 
 Driver Changes:
 - more vkms support(Rodrigo Siqueira)
 - many fixes and small improments to all drivers
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJbT52JAAoJEEN0HIUfOBk06UsQAIy5YwUQ9l+8GdS5bKU299KW
 ZMMi0pTgB/bg0uuqGqN1zf23kpyRTNBGu2UMZgHWTcM4gjTP9qxb5GPFyOhr5he4
 pkp0p13fcn85Mkpt6ZQQD4ErMnhJSodzPRRT+ypnM+HzcWWehQOnSbLWCTOpaCeg
 5SsSFT7RfpDcICXzZZKAHFwHAp1y1y6V027RWu0/amUTwoZPn+ktU/s0thGIdqFk
 EGb/dP4K0PAHE4ZnhZOHPFlYbVQWp0J8X7+NmkXvPgwVPahLvKbNMBfG9M3mGcku
 cMwW8phngd0ih9gd1rblG3J8pdISArg6EgqAwwUV6p8tHUBQff5mL/RTh5zrUs6D
 seLqzRM4V74WDp2meMSYogISo2b+39RiL1IhayTytdW/oaterXloSChAwKUz4pi/
 Nj3/Kn59m9DH9NoAh3DYvDg+e06U9csR6TUJZ0B6BlXIwju9/QLybsDbUdmjtSW+
 yqttEs8m4k2gB2ZRo9y2RVi/XCNv0t+GYa2HQcTGrYVZpIxKioT6WdnlobQZ6L2E
 9CClacN6v2e27cQUbZEFuU7phUkM/nw18dROFrIwJ0OxsA5nElO1DTiOy+KDwzAU
 E+l4DqZZknyxEfTxUq79+9J2HmhqA7ikQbgNJMQyQ25iRFrkvYsI7XfF4ix5z+a5
 I0/CkPP3UsTibnVhM7wn
 =HyBh
 -----END PGP SIGNATURE-----

Merge tag 'drm-misc-next-2018-07-18' of git://anongit.freedesktop.org/drm/drm-misc into drm-next

drm-misc-next for 4.19:

Core Changes:
- add support for DisplayPort CEC-Tunneling-over-AUX (Hans Verkuil)
- more doc updates (Daniel Vetter)
- fourcc: Add is_yuv field to drm_format_info (Ayan Kumar Halder)
- dma-buf: correctly place BUG_ON (Michel Dänzer)

Driver Changes:
- more vkms support(Rodrigo Siqueira)
- many fixes and small improments to all drivers

Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180718200826.GA20165@juma
2018-07-20 10:46:49 +10:00
Christian König
5c675bf2c6 drm/amdgpu: clean up UVD instance handling v2
The whole handle, filp and entity handling is superfluous here.

We should have reviewed that more thoughtfully. It looks like somebody
just made the code instance aware without knowing the background.

v2: fix one more missed case in amdgpu_uvd_suspend

Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming  Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-19 13:56:44 -05:00
Christian König
58c24b7c89 drm/amdgpu: remove superflous UVD encode entity
Not sure what that was every used for, but now it is completely unused.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming  Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-19 13:56:44 -05:00
Michel Dänzer
4841203102 drm/amdgpu/display: Replace CONFIG_DRM_AMD_DC_DCN1_0 with CONFIG_X86
Allowing CONFIG_DRM_AMD_DC_DCN1_0 to be disabled on X86 was an
opportunity for display with Raven Ridge accidentally not working.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-19 13:56:43 -05:00
Kees Cook
4b4bd04898 drm/amdgpu/pm: Remove VLA usage
In the quest to remove all stack VLA usage from the kernel[1], this
uses the maximum sane buffer size and removes copy/paste code.

[1] https://lkml.kernel.org/r/CA+55aFzCG-zNmZwX4A2FQpadafLfEzK6CC=qPXydAacU1RqZWA@mail.gmail.com

Reviewed-by: Rex Zhu <rezhu@amd.com>
Signed-off-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-18 16:18:45 -05:00
Huang Rui
7eb8042774 drm/amdgpu: simplify the bo reference on amdgpu_bo_update
BO ptr already be initialized at definition, we needn't use the complicated
reference.

v2: fix typo at subject line

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-18 16:18:44 -05:00
Sonny Jiang
f3cdadb6fe drm/amdgpu: remove internal/unused kernel module parameters
Remove internal/unused kernel module parameters

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-18 16:18:44 -05:00
Christian König
b528680170 drm/amdgpu: change ring priority after pushing the job (v2)
Pushing a job can change the ring assignment of an entity.

v2: squash in:
"drm/amdgpu: fix job priority handling" (Christian)

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-18 16:18:44 -05:00
Christian König
9d46f32bdd drm/amdgpu: allow for more flexible priority handling
Allow to call amdgpu_ring_priority_get() after pushing the ring to the
scheduler.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-18 16:18:43 -05:00
Feifei Xu
e6d5752080 drm/amdgpu/gfx9: Update golden settings for vg10.
Add some UTCL registers' golden settings.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Tested-by: Kevin Wang <Kevin1.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-18 16:18:43 -05:00
Dave Airlie
54c88a029a drm-misc-next for 4.19:
Cross-subsystem Changes:
 - many dt-bindings Doc changes
 
 Core Changes:
 - Encoder clean ups (Ville Syrjälä)
 - Connector Writeback improvements(Boris Brezillon)
 - Fake vblank support (Boris Brezillon)
 - API for in-kernel clients (Noralf Trønnes)
 - improvements to the path of finding panels(Boris Brezillon)
 
 Driver Changes:
 - initial support for the virtual display driver - vkms(Haneen Mohammed and Rodrigo Siqueira)
 - panel: add Rocktech RK070ER9427 LCD support (Jagan Teki)
 - panel: add support for the EDT ETM0700G0EDH6 and EDT ETM0700G0BDH6(Jan Tuerk)
 - panel: add DLC DLC0700YZG-1 (Philipp Zabel)
 - panel: add support for BOE HV070WSA-100 (Andrzej Hajda)
 - panel: add newhaven, nhd-4.3-480272ef-atxl LCD (Tomi Valkeinen)
 - panel: add support for Innolux G070Y2-L01 (Christoph Fritz)
 - panel: add support for DataImage SCF0700C48GGU18 (Michal Vokáč)
 - panel: add support for Sharp LQ035Q7DB03 (Vladimir Zapolskiy)
 - panel: p079zca: Refactor panel driver to support multiple panels (Lin Huang)
 - sun4i: Add R40 display engine compatible(Jernej Skrabec)
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJbRqmlAAoJEEN0HIUfOBk0I2wQALu/Kk5y7gVGZWFMP/uImqB5
 vbkNXX5rdzFfvXHbNE9GHVLtMLIJS705pou+wzuUzil3C/xjUUrP7mUdWEVgNl4s
 hj6norNP2Jhd6v+Jua5dwhamDi6RHcroWc6c3SYt//JjcZKtOb/oqwt+7Bu0I+yi
 I+62iMpOVjxOIaygthZiJD89Q0mRsFBELRC1iYm1SxXF0l1/9Hf5Xt9PbUvoMscb
 /74e0MqdqKNTopWz7TLIZT6mHDWLM8IklLkMBDEClZQUMQAfIvPSKhe7KGXnOB0T
 PzBd1MJeQ/rPyyJJtWY5BTng6C38XW5xmq+I4YUSIfRJZjJHf4vBEcJO3ErIxBGj
 LE957F/rT8IYxN0Z31wH0DZhP8KpL1KIXy3AOb7Yqqbu+SemKT/WaepAdFvKfFbO
 5BxBgeFSQg9soHv7ndjOWDQal1AmuIhK/UP18ytYO9T54fPBJ1TaaHUWacYnvo/0
 oQdCTghvFuZgpP3Tl3IisFO1xDpLq4Y4VqvP4xwSj2Id1MUp6MGh9W/A39bc8FA0
 JJcvQYYCcnf4GVQQem+QFk+bpXmzLZW3+/cMpU72zrP+8OKrxD5PwxLmhuqdRzLR
 2lMT5gXEuPl8K8wyOLJDiWbXfZB9jn7Mm+5lySKGKu6NYzLN+cbLPA7+tVsqrWMu
 XLd++4ntNy5hdvS/TO7j
 =Bepe
 -----END PGP SIGNATURE-----

Merge tag 'drm-misc-next-2018-07-11' of git://anongit.freedesktop.org/drm/drm-misc into drm-next

drm-misc-next for 4.19:

Cross-subsystem Changes:
- many dt-bindings Doc changes

Core Changes:
- Encoder clean ups (Ville Syrjälä)
- Connector Writeback improvements(Boris Brezillon)
- Fake vblank support (Boris Brezillon)
- API for in-kernel clients (Noralf Trønnes)
- improvements to the path of finding panels(Boris Brezillon)

Driver Changes:
- initial support for the virtual display driver - vkms(Haneen Mohammed and Rodrigo Siqueira)
- panel: add Rocktech RK070ER9427 LCD support (Jagan Teki)
- panel: add support for the EDT ETM0700G0EDH6 and EDT ETM0700G0BDH6(Jan Tuerk)
- panel: add DLC DLC0700YZG-1 (Philipp Zabel)
- panel: add support for BOE HV070WSA-100 (Andrzej Hajda)
- panel: add newhaven, nhd-4.3-480272ef-atxl LCD (Tomi Valkeinen)
- panel: add support for Innolux G070Y2-L01 (Christoph Fritz)
- panel: add support for DataImage SCF0700C48GGU18 (Michal Vokáč)
- panel: add support for Sharp LQ035Q7DB03 (Vladimir Zapolskiy)
- panel: p079zca: Refactor panel driver to support multiple panels (Lin Huang)
- sun4i: Add R40 display engine compatible(Jernej Skrabec)

Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180712011137.GA26620@juma
2018-07-19 05:27:57 +10:00
Vijendar Mukunda
2d95ceb454 drm/amd/amdgpu: creating two I2S instances for stoney/cz (v2)
Creating two I2S instances for Stoney/cz platforms.

v2: squash in:
"drm/amdgpu/acp: Fix slab-out-of-bounds in mfd_add_device in acp_hw_init"
From Daniel Kurtz <djkurtz@chromium.org>.

Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com>
Signed-off-by: Akshu Agrawal <akshu.agrawal@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-18 09:03:07 -05:00
Alex Deucher
b3fc2ab37e drm/amdgpu: add another ATPX quirk for TOPAZ
Needs ATPX rather than _PR3.

Bug: https://bugzilla.kernel.org/show_bug.cgi?id=200517
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2018-07-18 08:48:22 -05:00
Leo Liu
96a5d8d491 drm/amdgpu: Make sure IB tests flushed after IP resume
Fixes: 2c773de2 (drm/amdgpu: defer test IBs on the rings at boot (V3))

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-17 15:12:50 -05:00
Christian König
f024e88343 drm/amdgpu: minor cleanup in amdgpu_job.c
Remove superflous NULL check, fix coding style a bit, shorten error
messages.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-17 14:18:28 -05:00
Christian König
a1917b73d8 drm/amdgpu: remove job->adev (v2)
We can get that from the ring.

v2: squash in "drm/amdgpu: always initialize job->base.sched" (Alex)

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-17 14:18:28 -05:00
Felix Kuehling
01c097dbfc drm/amdgpu: Add kfd2kgd.set_compute_idle interface
This allows automatic switching to the compute power profile depending
on compute activity.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2018-07-16 19:10:36 -04:00
Christian König
ee913fd9e1 drm/amdgpu: add amdgpu_job_submit_direct helper
Make sure that we properly initialize at least the sched member.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-16 16:11:53 -05:00
Christian König
3320b8d2ac drm/amdgpu: remove job->ring
We can easily get that from the scheduler.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-16 16:11:53 -05:00
Christian König
0e28b10ff1 drm/amdgpu: remove ring parameter from amdgpu_job_submit
We know the ring through the entity anyway.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-16 16:11:52 -05:00
Christian König
eb3961a574 drm/amdgpu: remove fence context from the job
Can be obtained directly from the fence as well.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-16 16:11:52 -05:00
Christian König
050d9d43a7 drm/amdgpu: cleanup job header
Move job related defines, structure and function declarations to
amdgpu_job.h

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-16 16:11:51 -05:00
Andrey Grodzovsky
964d0fbf63 drm/amdgpu: Allow to create BO lists in CS ioctl v3
This change is to support MESA performace optimization.
Modify CS IOCTL to allow its input as command buffer and an array of
buffer handles to create a temporay bo list and then destroy it
when IOCTL completes.
This saves on calling for BO_LIST create and destry IOCTLs in MESA
and by this improves performance.

v2: Avoid inserting the temp list into idr struct.

v3:
Remove idr alloation from amdgpu_bo_list_create.
Remove useless argument from amdgpu_cs_parser_fini
Minor cosmetic stuff.

v4: Revert amdgpu_bo_list_destroy back to static

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-16 15:29:47 -05:00
Alex Deucher
3f2ddfa887 drm/amdgpu/vi: fix mixed up state in smu clockgating setup
Use the PP_STATE_SUPPORT_* rather than AMD_CG_SUPPORT_*
when communicating with the SMU.

Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-13 14:52:41 -05:00
Michel Dänzer
15e6b76880 drm/amdgpu: Warn and update pin_size values when destroying a pinned BO
This shouldn't happen, but if it does, we'll get a backtrace of the
caller, and update the pin_size values as needed.

v2:
* Check bo->pin_count instead of placement flags (Christian König)

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-13 14:46:28 -05:00
Michel Dänzer
a5ccfe5c20 drm/amdgpu: Make pin_size values atomic
Concurrent execution of the non-atomic arithmetic could result in
completely bogus values.

v2:
* Rebased on v2 of the previous patch

Cc: stable@vger.kernel.org
Bugzilla: https://bugs.freedesktop.org/106872
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-13 14:46:21 -05:00
Michel Dänzer
ddc21af4d0 drm/amdgpu: Keep track of amount of pinned CPU visible VRAM
Instead of CPU invisible VRAM. Preparation for the following, no
functional change intended.

v2:
* Also change amdgpu_vram_mgr_bo_invisible_size to
  amdgpu_vram_mgr_bo_visible_size, allowing further simplification
  (Christian König)

Cc: stable@vger.kernel.org
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-13 14:46:11 -05:00
Nayan Deshmukh
aa16b6c6b4 drm/scheduler: modify args of drm_sched_entity_init
replace run queue by a list of run queues and remove the
sched arg as that is part of run queue itself

Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-13 14:46:05 -05:00
Christian König
b7d85e1db3 drm/amdgpu: fix TTM move entity init order
We are initializing the entity before the scheduler is actually
initialized.

This can lead to all kind of problem, but especially NULL pointer deref
because of Nayan's scheduler work.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-13 14:45:49 -05:00
Andrey Grodzovsky
44a99b65fc drm/amd: Use newly added interrupt source defs for SOC15.
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-13 14:45:43 -05:00
Andrey Grodzovsky
091aec0b4e drm/amd: Use newly added interrupt source defs for VI v3.
v2: Rebase
v3: Use defines for CP_SQ and CP_ECC_ERROR interrupts.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-13 14:45:30 -05:00
Evan Quan
991a6b32ce drm/amd/powerplay: add vega12 SMU gfxoff support v3
Export apis for enabling/disabling SMU gfxoff support.

v2: fit the latest gfxoff support framework
v3: add feature_mask control

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Huang Rui <ray.huang at amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-13 14:45:01 -05:00
Evan Quan
a5aedc2d18 drm/amdgpu: reduce the idle period that RLC has to wait before request CGCG
Gfxoff feature may depends on the CGCG(on vega12, that's the case). This
change will help to enable gfxoff feature more frequently.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-13 14:44:52 -05:00