3 Commits

Author	SHA1	Message	Date
Martin Blumenstingl	be215b9270	dt-bindings: timer: meson6_timer: document the clock inputs ... The Meson Timer IP has two clock inputs: - pclk which is used as "system clock" timebase of Timer E - xtal which is used for the 1us, 10us, 100us and 1ms timebases of Timer A, B, C, D and E The IP block has four internal dividers (XTAL is running at 24MHz): - "xtal div 24" for 1us resolution - "xtal div 240" for 10us resolution - "xtal div 2400" for 100us resolution - "xtal div 24000" for 1ms resolution Suggested-by: Jianxin Pan <jianxin.pan@amlogic.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>	2018-11-14 17:20:11 -08:00
Martin Blumenstingl	e55b892e18	dt-bindings: timer: meson6_timer: document all interrupts ... The meson6_timer IP block supports four timers - each of them has it's own interrupt line. Update the documentation to reflect that all four interrupts should be passed. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>	2018-11-14 17:19:56 -08:00
Carlo Caione	66b2e373b3	ARM: meson: documentation: Add timer documentation ... Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Carlo Caione <carlo@caione.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>	2014-09-29 01:50:05 +02:00