Commit Graph

57 Commits

Author SHA1 Message Date
Magnus Damm
c47586b6d3 ARM: mach-shmobile: sh7372 A3SG support
Add support for the sh7372 A3SG power domain. This domain contains
the SGX hardware block, but there is no open source driver available.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
2011-07-02 14:29:58 +02:00
Magnus Damm
082517aa21 ARM: mach-shmobile: sh7372 A3RI support
Add support for the sh7372 A3RI power domain. This domain contains
the ISP hardware block, but there is no driver available.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
2011-07-02 14:29:58 +02:00
Magnus Damm
33afebf3da ARM: mach-shmobile: sh7372 A3RV support
Add support for the sh7372 A3RV power domain and hook
up the VPU device.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
2011-07-02 14:29:58 +02:00
Rafael J. Wysocki
e3e0109138 ARM / shmobile: Support for I/O power domains for SH7372 (v9)
Use the generic power domains support introduced by the previous
patch to implement support for power domains on SH7372.

Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Acked-by: Paul Mundt <lethal@linux-sh.org>
2011-07-02 14:29:57 +02:00
Paul Mundt
66ad12931d ARM: mach-shmobile: Tidy up after SH7372 pm changes.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-05-25 11:22:58 +09:00
Magnus Damm
082a8ca1d3 ARM: mach-shmobile: sh7372 Core Standby CPUIdle
This patch ties in the previously added sh7372 sleep
mode known as Core Standby together with the shared
SH-Mobile ARM CPUIdle implementation.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-05-25 11:19:24 +09:00
Magnus Damm
97991657be ARM: mach-shmobile: sh7372 Core Standby Suspend-to-RAM
Add sh7372 Core Standby sleep mode support and tie it
in with the shared SH-Mobile ARM suspend code.

The Core Standby mode is the lightest sh7372-specific
sleep mode, cutting power to the ARM core excluding the
L2 cache. Any interrupt source can be used for wakeups.

The low level portion of this code is based on the
TI OMAP sleep code in sleep34xx.S, thanks to them.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-05-25 11:19:20 +09:00