This patch fixes the following DTC warnings with W=1:
Warning (unit_address_vs_reg): Node /regulators/regulator@0 has a unit
name, but no reg property
Warning (unit_address_vs_reg): Node /regulators/regulator@1 has a unit
name, but no reg property
Warning (unit_address_vs_reg): Node /regulators/regulator@2 has a unit
name, but no reg property
Warning (unit_address_vs_reg): Node /regulators/regulator@3 has a unit
name, but no reg property
Warning (unit_address_vs_reg): Node /regulators/regulator@4 has a unit
name, but no reg property
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Add xo entry to sdhc clock node on all qcom platforms.
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the SK-RZG1E board dependent part of the Ether device node.
Enable DHCP and NFS root for the kernel booting.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the initial device tree for the R8A7745 SoC based SK-RZG1E board.
The board has 1 debug serial port (SCIF2); include support for it,
so that the serial console can work.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe the IRQC interrupt controller in the R8A7745 device tree.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the generic R8A7745 part of the Ether device node.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe [H]SCIF{|A|B} ports in the R8A7745 device tree.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
[simon: consistently use tabs for indentation]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe SYS-DMAC0/1 in the R8A7745 device tree.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The initial R8A7745 SoC device tree including CPU0, GIC, timer, SYSC, RST,
CPG, and the required clock descriptions.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the SK-RZG1M board dependent part of the Ether device node.
Enable DHCP and NFS root for the kernel booting.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the initial device tree for the R8A7743 SoC based SK-RZG1M board.
The board has one debug serial port (SCIF0); include support for it, so
that the serial console can work.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe the IRQC interrupt controller in the R8A7743 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the generic R8A7743 part of the Ether device node.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe [H]SCIF{|A|B} ports in the R8A7743 device tree.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
[simon: consistently use tabs for indentation]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe SYS-DMAC0/1 in the R8A7743 device tree.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The initial R8A7743 SoC device tree including CPU0, GIC, timer, SYSC, RST,
CPG, and the required clock descriptions.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
And the sd-uhs-sdr104 property to SDHI0.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
And the sd-uhs-sdr104 property to SDHI0.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Add the sd-uhs-sdr104 property to SDHI0.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Make it possible to fallback to GPIO for I2C4 on the EXIO-B connector.
This is based on reference work for the I2C0 core of the lager/r8a7790
by Wolfram Sang.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
[wsa: rebased and fixed aliases]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Make it possible to fallback to GPIO for I2C1 on the EXIO-C connector.
This is based on reference work for the I2C0 core of the lager/r8a7790
by Wolfram Sang.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
[wsa: rebased and fixed aliases]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Make it possible to select which I2C1 IP core you want to run on the
EXIO-A connector.
This is based on reference work for the I2C0 core of the lager board
by Wolfram Sang.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
[wsa: rebased and fixed aliases]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
The rename from i2cexio to i2cexio0 is in preparation for adding
i2cexio1 which will use the demuxer for IIC1/I2C1.
The reindexing from i2c8 to i2c10 is to allow space for grouping of
additional GPIO buses to be added by follow-up patches to support demuxing
of other i2c buses.
Also note that fallback to GPIO is not provided by the hardware for IIC0/I2C0.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
[wsa: rebased, fixed alias and removed typo in commit message]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
The parent clock of the HSUSB clock is the HP clock, not the MP clock.
Fixes: c7bab9f929 ("ARM: shmobile: r8a7794: Add USB clocks to device tree")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Update the PFC pin groups and function names of DU interface for
r8a7794 ALT board.
The currently specified pin groups and function names prevented PFC and
DU interfaces from being correctly configured:
sh-pfc e6060000.pin-controller: function 'du' not supported
sh-pfc e6060000.pin-controller: invalid function du in map table
sh-pfc e6060000.pin-controller: function 'du' not supported
sh-pfc e6060000.pin-controller: invalid function du in map table
sh-pfc e6060000.pin-controller: function 'du' not supported
sh-pfc e6060000.pin-controller: invalid function du in map table
sh-pfc e6060000.pin-controller: function 'du' not supported
sh-pfc e6060000.pin-controller: invalid function du in map table
rcar-du: probe of feb00000.display failed with error -22
Signed-off-by: Jacopo Mondi <jacopo@jmondi.org>
Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Identify the SoC type and revision, and register this information with
the SoC bus, so it is available under /sys/devices/soc0/, and can be
checked where needed using soc_device_match().
Identification is done using the Product Register or Common Chip Code
Register, as declared in DT (PRR only for now), or using a hardcoded
fallback if missing.
Example:
Detected Renesas R-Car Gen2 r8a7791 ES1.0
...
# cat /sys/devices/soc0/{machine,family,soc_id,revision}
Koelsch
R-Car Gen2
r8a7791
ES1.0
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Odroid XU3/4 didn't need to use the cd-gpios for detecting card.
Because host controller has the CDETECT register through SDx_CDN line.
Host controller can know whether card is inserted or not with this
register.
When I have checked the Odroid XU3/4, they are using CDETECT register
(not using exteranl cd-gpio).
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
devicetree binding for stmmac states:
- compatible: Should be "snps,dwmac-<ip_version>", "snps,dwmac"
For backwards compatibility: "st,spear600-gmac" is also supported.
No functional change intended.
Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The AM571x-IDK board is a board based on TI's AM5718 SOC
which has a single core 1.5GHz A15 processor. This board is a
development platform for the Industrial market with:
- 1GB of DDR3L
- Dual 1Gbps Ethernet
- HDMI,
- PRU-ICSS
- uSD
- 16GB eMMC
- CAN
- RS-485
- PCIe
- USB3.0
- Video Input Port
- Industrial IO port and expansion connector
The link to the data sheet and TRM can be found here:
http://www.ti.com/product/AM5718
Initial support is only for basic peripherals.
Signed-off-by: Schuyler Patton <spatton@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
OMAP2+ GPOs are initialized now using device tree, so legacy gpio
initialization code can be removed.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
phy-phandle is now a preferred method to reference a PHY device.
Especially in regards to cpsw it enables PHY specific settings like
max-speed etc. being specified in DTS.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The PMICs have POWERHOLD set by default which prevents PMIC shutdown
even on DEV_CTRL On bit set to 0 as the Powerhold has higher priority.
So to enable pmic power off this property lets one over ride the default
value and enable pmic power off.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The PMICs have POWERHOLD set by default which prevents PMIC shutdown
even on DEV_CTRL On bit set to 0 as the Powerhold has higher priority.
So to enable pmic power off this property lets one over ride the default
value and enable pmic power off.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
While the clk lookup table is making reference to "ohci"
other subsystems (such as phy) are trying to match "ohci.0"
Since there is a single ohci instance, instead of changing
the clk name, change the dev id to -1, and add the "-da8xx"
postfix to match the driver name that will also be changed
in a subsequent patch.
Signed-off-by: Axel Haslam <ahaslam@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
This reverts commit 4dd1837d75.
Moving the exports for assembly code into the assembly files breaks
KSYM trimming, but also breaks modversions.
While fixing the KSYM trimming is trivial, fixing modversions brings
us to a technically worse position that we had prior to the above
change:
- We end up with the prototype definitions divorsed from everything
else, which means that adding or removing assembly level ksyms
become more fragile:
* if adding a new assembly ksyms export, a missed prototype in
asm-prototypes.h results in a successful build if no module in
the selected configuration makes use of the symbol.
* when removing a ksyms export, asm-prototypes.h will get forgotten,
with armksyms.c, you'll get a build error if you forget to touch
the file.
- We end up with the same amount of include files and prototypes,
they're just in a header file instead of a .c file with their
exports.
As for lines of code, we don't get much of a size reduction:
(original commit)
47 files changed, 131 insertions(+), 208 deletions(-)
(fix for ksyms trimming)
7 files changed, 18 insertions(+), 5 deletions(-)
(two fixes for modversions)
1 file changed, 34 insertions(+)
3 files changed, 7 insertions(+), 2 deletions(-)
which results in a net total of only 25 lines deleted.
As there does not seem to be much benefit from this change of approach,
revert the change.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Refactor the oxnas Kconfig entries among the OX810SE and OX820 configs,
and add the files to support the OX820 SMP feature.
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The Oxford Semiconductor OX820 is a ARM11MPcore based SoC sharing some
features with the OX810 earlier SoC.
This patch adds the core to wake up the second core.
Clarifications about Copyrights dates :
- hotplug.c was taken from an old versatile code by Ma Haijun and left verbatim
- headsmp.S was taken from an old versatile code and adapted by Ma Haijun
- platsmp.c is a mix from versatile code, Ma Haijun code and my code for DT
Hence the 2002/2003 ARM Coryrights and 2013 Ma Haijun Copyrights.
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The I2C nodes are missing #address-cells and #size-cells. This is
causing warning at device tree compilation when some I2C device
sub-nodes are defined.
Signed-off-by: Loic Pallardy <loic.pallardy@st.com>
Install the callbacks via the state machine and let the core invoke
the callbacks on the already online CPUs.
smp_call_function_single() has been removed because the function is already
invoked on the target CPU.
[ tglx: Added protection agaist hotplug back according to discussion with Will ]
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: rt@linuxtronix.de
Cc: Will Deacon <will.deacon@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/20161117183541.8588-16-bigeasy@linutronix.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
All conflicts were simple overlapping changes except perhaps
for the Thunder driver.
That driver has a change_mtu method explicitly for sending
a message to the hardware. If that fails it returns an
error.
Normally a driver doesn't need an ndo_change_mtu method becuase those
are usually just range changes, which are now handled generically.
But since this extra operation is needed in the Thunder driver, it has
to stay.
However, if the message send fails we have to restore the original
MTU before the change because the entire call chain expects that if
an error is thrown by ndo_change_mtu then the MTU did not change.
Therefore code is added to nicvf_change_mtu to remember the original
MTU, and to restore it upon nicvf_update_hw_max_frs() failue.
Signed-off-by: David S. Miller <davem@davemloft.net>
Enable the davinci ohci driver as a module for usb
tested with the omap138-lcdk board.
Signed-off-by: Axel Haslam <ahaslam@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The Hummingbird A31 board has a VGA DAC which converts RGB output
from the LCD interface to VGA analog signals.
Add nodes for the VGA DAC, its power supply, and enable this part
of the display pipeline.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Just like on sun8i all sun5i tablets use the same interrupt and power
gpios for their touchscreens. I've checked all known a13 fex files and
only the UTOO P66 uses a different gpio for the interrupt.
Add a touchscreen node to sun5i-reference-design-tablet.dtsi, which
fills in the necessary gpios to avoid duplication in the tablet dts files,
just like we do in sun8i-reference-design-tablet.dtsi.
This will make future patches adding touchscreen nodes to a13 tablets
simpler.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The pin controllers also use the two oscillators for debouncing. Add them
to the DTs.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The Bananapi M1+ supports USB OTG, with the PMIC doing VBUS sensing.
Enable the USB OTG related functions.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Bananapi M1+, like other Allwinner A20 based boards, uses the
AXP209 PMIC to supply its power.
Add the AXP209 regulators.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The 2 USB host ports are directly tied to the 2 USB hosts in the SoC.
The 2 host pairs were already enabled, but the USB PHY wasn't.
VBUS on the 2 ports are always on.
Enable the USB PHY.
Fixes: 04c85ecad3 ("ARM: dts: sun7i: Add dts file for Bananapi M1 Plus
board")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The micro-USB on the SinA33 has a somewhat interesting design in the sense
that it has a micro USB connector, but the VBUS is (supposed to be)
controlled through an (unpopulated) jumper.
Obviously, that doesn't work really well, and only the peripheral mode
really works. Still enable it.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
On some Q8 and other tablets ldo_io1 is used as vcc-touchscreen,
config at as such in sun8i-reference-design-tablet.dtsi.
Note that it will only be enabled when it us actually referenced by
a foo-supply property in the touchscreen node, so for tablets which
do not use ldo_io1 as vcc-touchscreen, it will be disabled.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Though the mmc core driver will continue to support the legacy
"enable-sdio-wakeup" property to enable SDIO as the wakeup source,
"wakeup-source" is the new standard binding.
This patch replaces the legacy "enable-sdio-wakeup" with the unified
"wakeup-source" property in order to avoid any further copy-paste
duplication.
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The GR8-EVB comes with a wm8978 codec connected to the i2s bus.
Add a card in order to have it working
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The SinA31s routes the SoC's LINEOUT pins to a line out jack, and MIC1
to a microphone jack, with MBIAS providing phantom power.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Hummingbird A31 has headset and line in audio jacks and an onboard
mic routed to the pins for the SoC's internal codec. The line out pins
are routed to an onboard speaker amp, whose output is available on a
pin header.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A31 SoC includes the Allwinner audio codec, capable of 24-bit
playback up to 192 kHz and 24-bit capture up to 48 kHz.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The GR8-EVB has a SPDIF out connector. Enable it.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
H3 SPI subsystem is almost same as A31 SPI except buffer size, so those
DT properties are reusable.
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Milo Kim <woogyom.kim@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
H3 supports two SPI controllers. Four pins (MOSI, MISO, SCLK, SS) are
configured through the pinctrl subsystem.
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Milo Kim <woogyom.kim@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
NanoPi M1 is the Allwinner H3 based board.
This patch enables UART for debug console, LEDs, GPIO key switch, 3 USB
host ports, a micro SD slot and related power and pin controls by using
NanoPi common dtsi file.
Cc: James Pettigrew <james@innovum.com.au>
Signed-off-by: Milo Kim <woogyom.kim@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
NanoPi common dtsi supports all components of NEO SBC, so just include it.
Cc: James Pettigrew <james@innovum.com.au>
Signed-off-by: Milo Kim <woogyom.kim@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This patch provides a common file for NanoPi M1 and Neo SBC.
Those have common features below.
* UART0
* 2 LEDs
* USB host (EHCI3, OHCI3) and PHY
* MicroSD
* GPIO key switch
Cc: James Pettigrew <james@innovum.com.au>
Signed-off-by: Milo Kim <woogyom.kim@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The board has a Ampak AP6330 WiFi/BT/FM module. Inside it is a Broadcom
BCM4330 WiFi/BT/FM combo IC. The WiFi portion is connected to mmc1, with
the enabling pin connected to PL2. The AC100 RTC provides a low power
clock signal.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The board has a Ampak AP6330 WiFi/BT/FM module. Inside it is a Broadcom
BCM4330 WiFi/BT/FM combo IC. The WiFi portion is connected to mmc1, with
the enabling pin connected to PL2. The AC100 RTC provides a low power
clock signal.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
On the A80, mmc1 is available on pingroup G. Designs mostly use this
to connect to an SDIO WiFi chip.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The I2C1 and SPI2 buses are exposed on the CHIP headers, and are not
explicitly dedicated to anything.
Add them to the DTS with the muxing already set, but keep them disabled.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Some boards use the LCD in RGB565. Enable the pin muxing option.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
All the sun5i have the SPI2 pins exposed on the PE bank. Add them to the
DT.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The SPI2 pins on the sun5i PB bank are only available on the A10s. Rename
the A10s only bank so that it doesn't confuse people on the other SoCs
whose indexing would start at b.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The CHIP uses a 1-Wire bus to discover the DIPs. Enable the bus in the DT.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The WiFi chip is powered through a GPIO and two regulators in parallel.
Since that case is not supported yet, just set them as always on before we
rework the regulator framework to deal with those.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The CHIP Pro is a small embeddable board. It features a GR8, an AXP209
PMIC, a 512MB SLC NAND and a WiFi/BT chip.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The UART3 pins were missing from the DTSI. Add them.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The UART2 pins were missing from the DTSI. Add them.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The PWM controller has two different channels, but only the first pin was
exposed in the DTSI. Add the other one.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
There was a dumb copy and paste mistake here, fix it.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The GR8 has access to the UART3 controller, which was missing in the
DTSI. Add it.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The LCD0 controller on the A31 can do RGB output up to 8 bits per
channel. Add the pins for RGB888 output.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A31 has 2 parallel display pipelines, which can be intermixed.
However the driver currently only supports one of them.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
sun7i-a20-olimex-som-evb.dts doesn't contain cpu-supply needed for
voltage-scaling with cpufreq-dt so define it.
The default voltages are defined in sun7i-a20.dtsi.
Signed-off-by: Emmanuel Vadot <manu@bidouilliste.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Now that we have support for the VGA bridges using our DRM driver, enable
the display engine for the Olimex A13-Olinuxino.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The pinmux setting nodes for the A31 were added out of alphabetical
order. Sort them.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviews have found that sun5i was a better prefix after all for the GR8.
Rename the relevant device trees before it's too late.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This is good for consistency even if there is no difference in compiled
code. LTO might rely on this eventually. No need to preserve the extern
attribute as it is the default with function prototypes.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add a sysfs cpu_capacity attribute with which it is possible to read and
write (thus over-writing default values) CPUs capacity. This might be
useful in situations where values needs changing after boot.
The new attribute shows up as:
/sys/devices/system/cpu/cpu*/cpu_capacity
Signed-off-by: Juri Lelli <juri.lelli@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
With the introduction of cpu capacity-dmips-mhz bindings, CPU capacities
can now be calculated from values extracted from DT and information
coming from cpufreq. Add parsing of DT information at boot time, and
complement it with cpufreq information. We keep code that can produce
same information, based on different DT properties and hard-coded
values, as fall-back for backward compatibility.
Caveat: the information provided by this patch will start to be used in
the future. We need to #define arch_scale_cpu_capacity to something
provided in arch, so that scheduler's default implementation (which gets
used if arch_scale_cpu_capacity is not defined) is overwritten.
Signed-off-by: Juri Lelli <juri.lelli@arm.com>
Acked-by: Vincent Guittot <vincent.guittot@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The polarity of the card detect pin is inverted.
Change it to reflect the right polarity for the board
which is ACTIVE_LOW.
Signed-off-by: Axel Haslam <ahaslam@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
cleanups, GPIO line naming, and the node for the new thermal driver.
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Merge tag 'bcm2835-dt-next-2016-11-18' into devicetree/next
This pull request brings in DT changes for BCM2835: pinctrl setup
cleanups, GPIO line naming, and the node for the new thermal driver.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The Kconfig and file naming for the PM8xxx driver is totally
confusing:
- Kconfig options MFD_PM8XXX and MFD_PM8921_CORE, some in-kernel
users depending on or selecting either at random.
- A driver file named pm8921-core.c even if it is indeed
used by the whole PM8xxx family of chips.
- An irqchip named pm8xxx since it was (I guess) realized that
the driver was generic for all pm8xxx PMICs.
As I may want to add support for PM8901 this is starting to get
really messy. Fix this situation by:
- Remove the MFD_PM8921_CORE symbol and rely solely on MFD_PM8XXX
and convert all users, including LEDs Kconfig and ARM defconfigs
for qcom and multi_v7 to use that single symbol.
- Renaming the driver to qcom-pm8xxx.c to fit along the two
other qcom* prefixed drivers.
- Rename functions withing the driver from 8921 to 8xxx to
indicate it is generic.
- Just drop the =m config from the pxa_defconfig, I have no clue
why it is even there, it is not a Qualcomm platform. (Possibly
older Kconfig noise from saveconfig.)
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Andy Gross <andy.gross@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Jacek Anaszewski <j.anaszewski@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Pull ARM fixes from Russell King:
"A few more ARM fixes:
- the assembly backtrace code suffers problems with the new printk()
implementation which assumes that kernel messages without KERN_CONT
should have newlines inserted between them. Fix this.
- fix a section naming error - ".init.text" rather than ".text.init"
- preallocate DMA debug memory at core_initcall() time rather than
fs_initcall(), as we have some core drivers that need to use DMA
mapping - and that triggers a kernel warning from the DMA debug
code.
- fix XIP kernels after the ro_after_init changes made this data
permanently read-only"
* 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm:
ARM: Fix XIP kernels
ARM: 8628/1: dma-mapping: preallocate DMA-debug hash tables in core_initcall
ARM: 8624/1: proc-v7m.S: fix init section name
ARM: fix backtrace
This enables the usb otg controller for the lcdk board.
Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
This adds the device tree node for the usb otg
controller present in the da850 family of SoC's.
Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Currently, suspend/resume support is only available on da850 platforms,
and the platform PM code has dependencies on da850 functions. However,
CONFIG_SUSPEND might be enabled even when da850 support is not, causing
build failure:
arch/arm/mach-davinci/built-in.o: In function `davinci_pm_init':
pm_domain.c:(.init.text+0x1fb8): undefined reference to `da8xx_get_mem_ctlr'
pm_domain.c:(.init.text+0x20b0): undefined reference to `da8xx_syscfg1_base'
Fix this by only building the PM core when da850 is enabled.
Reported-by: Sekhar Nori <nsekhar@ti.com>
Fixes: aa9aa1ec2d ("ARM: davinci: PM: rework init, remove platform device")
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Child of mvpp2 ethernet do not have a reg property so the unit name
should not contain an address: remove them.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The skeleton.dtsi file was removed in ARM64 for different reasons as
explained in commit ("3ebee5a2e141 arm64: dts: kill skeleton.dtsi").
These also applies to ARM and it will also allow to get rid of the
following DTC warnings in the future:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
As it was previously done for kirkwood and for aramda 370/XP, this adds
missing node labels to Armada 375 and SoC specific nodes to allow to
reference them more easily.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The gpio-key nodes do not have a reg property, so remove the address from
the unit name.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The dsa node does not have a reg property, so remove the address from the
unit name.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
l2-cache which is either an aurora-outer-cache or an aurora-system-cache
has a reg property so the unit name should contain an address.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The skeleton.dtsi file was removed in ARM64 for different reasons as
explained in commit ("3ebee5a2e141 arm64: dts: kill skeleton.dtsi").
These also applies to ARM and it will also allow to get rid of the
following DTC warnings in the future:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
PCIe has a ranges property, so the unit name should contain an address.
Take the opportunity to use the node label instead of the full name.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
PCIe has a range property, so the unit name should contain an address.
Take the opportunity to use the node label instead of the full name.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
MDIO has a reg property so the unit name should contain an address.
Take the opportunity to use the node label instead of the full name.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Use the node label when possible. As a result it flattens the device tree
and it makes more visible the IP blocks specific to each SoC variant.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
As it was previously done for kirkwood, this adds missing node labels to
Armada 370 and XP common and SoC specific nodes to allow to reference
them more easily.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The cpurst nodes are identical in armada-370.dtsi and armada-xp.dtsi
files, so move it in the common armada-370-xp.dtsi file.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
In the dts for the Marvell Armada XP Matrix board the pcie-controller was
located under the internal-regs node whereas it belongs to the soc node.
It means that, until this fix, the pcie could not work for this board
because it didn't match the definition of the pcie-controller node in the
dtsi file. If we had a look on the decompiled dtb file we saw two
different instances of the pcie-controller node: one with the all the
resource set but disabled and the other without any resource but enabled.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Fix a spelling mistake in arch/arm/boot/dts/kirkwood-topkick.dts.
The manufacturer's name is Univer*s*al Scientific Industrial...
Compare with footer of page here:
http://www.usish.com/english/products_topkick1281p2.php
Signed-off-by: Paul Wassi <p.wassi@gmx.at>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This patch removes the legacy support of ls-chl which is converted to the
device tree.
[gregory.clement@free-electrons.com: removal extracted from a wider patch]
Signed-off-by: Ashley Hughes <ashley.hughes@blueyonder.co.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This patch converts my orion5x ls-chl Linkstation device to device tree.
[gregory.clement@free-electrons.com: fix title, add back the commit log,
move the removal of the platform in an other patch]
Signed-off-by: Ashley Hughes <ashley.hughes@blueyonder.co.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The SMSC9112 ethernet controller is connected to chip select 2
on the EBI2 bus on the APQ8060 Dragonboard. We set this up by
activating EBI2, creating a chipselect entry as a subnode, and then
putting the ethernet controller in a subnode of the chipselect.
After the chipselect is configured, the SMSC device will be
instantiated.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This adds the external bus interface EBI2 to the MSM8660 device
tree, albeit with status = "disabled" so that devices actually
using EBI2 can turn it on if needed.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add pstore support for the nexus7. This was useful in debugging
a crash where the cpus were getting stuck with irqs off and
serial output wasn't reliably working.
Cc: Kees Cook <keescook@chromium.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Clark <robdclark@gmail.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Andy Gross <andy.gross@linaro.org>
Cc: Vinay Simha <vinaysimha@inforcecomputing.com>
Cc: Archit Taneja <architt@codeaurora.org>
Cc: linux-arm-msm@vger.kernel.org
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add DSI and panel nodes to get graphics up and running
on the Nexus7.
This still depends on the panel driver being present
along with the rpmclk code.
Feedback would be greatly appreciated!
Cc: Archit Taneja <architt@codeaurora.org>
Cc: vinay simha <vinaysimha@inforcecomputing.com>
Cc: andy.gross@linaro.org
Cc: robdclark@gmail.com
Cc: linux-arm-msm@vger.kernel.org
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Adds the core gpu, and dsi nodes for the apq8064 needed
to get graphics working on the nexus7 and other devices.
These apply on top of Archit's patch set that enables HDMI for IFC6410
Feedback would be greatly appreciated!
Cc: Archit Taneja <architt@codeaurora.org>
Cc: vinay simha <vinaysimha@inforcecomputing.com>
Cc: andy.gross@linaro.org
Cc: robdclark@gmail.com
Cc: linux-arm-msm@vger.kernel.org
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add HDMI support on IFC6410. Populate the regulators required by HDMI-TX
and PHY. Establish the link between the MDP4 DTV encoder and HDMI. Create
a generic micro HDMI connector DT node. The msm drm driver doesn't parse
for HDMI connectors in DT, but it will do so later.
Cc: devicetree@vger.kernel.org
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
APQ8064 contains a MDP4 based display controller. It contains a HDMI, LVDS
and 2 DSI outputs.
Add display DT nodes for MDP4, HDMI TX and HDMI PHY. MDP4 based display
blocks have a flat device hierarchy.
Nodes for other outputs will be added later.
Cc: devicetree@vger.kernel.org
Tested-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This introduces the eMMC sdhci node and its pinctrl state
Signed-off-by: Bhushan Shah <bshah@kde.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add support for the Sierra Wireless MangOH Green board with the
Sierra Wireless WP8548 Module.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
In order to support the Sierra Wireless WP8548 module based on the
Qualcomm MDM9615 SoC, add a dtsi file.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Enable audio support for various Toradex devices as well as the GMI.
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Merge tag 'tegra-for-4.10-arm-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/defconfig
ARM: tegra: Default configuration updates for v4.10-rc1
Enable audio support for various Toradex devices as well as the GMI.
* tag 'tegra-for-4.10-arm-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Enable GMI driver in default configuration
ARM: tegra: Enable SGTL5000 audio
ARM: tegra: Update default configuration for v4.9-rc1
Signed-off-by: Olof Johansson <olof@lixom.net>
Adds support for GMI on Tegra20 and Tegra30 and enables the GPU on Nyan
Chromebooks. It also enables sound support on various Toradex devices.
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Merge tag 'tegra-for-4.10-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
ARM: tegra: Device tree changes for v4.10-rc1
Adds support for GMI on Tegra20 and Tegra30 and enables the GPU on Nyan
Chromebooks. It also enables sound support on various Toradex devices.
* tag 'tegra-for-4.10-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: apalis-tk1: Drop leading 0 from unit-address
ARM: tegra: apalis/colibri t30: Integrate audio
ARM: tegra: nyan: Enable GPU node and related supply
ARM: tegra: Add Tegra30 GMI support
ARM: tegra: Add Tegra20 GMI support
Signed-off-by: Olof Johansson <olof@lixom.net>
Fix invalid GIC interrupt flags - type IRQ_TYPE_NONE is not allowed for GIC
interrupts. Although this was working but with error messages like:
genirq: Setting trigger mode 0 for irq 16 failed
Use level high interrupt instead of type none. The choice of level high was
rather an arbitrary decision hoping it will work on each platform. Tests shown
no issues so far.
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Merge tag 'samsung-dt-gic-flags-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Topic branch with DT changes for v4.10.
Fix invalid GIC interrupt flags - type IRQ_TYPE_NONE is not allowed for GIC
interrupts. Although this was working but with error messages like:
genirq: Setting trigger mode 0 for irq 16 failed
Use level high interrupt instead of type none. The choice of level high was
rather an arbitrary decision hoping it will work on each platform. Tests shown
no issues so far.
* tag 'samsung-dt-gic-flags-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Use human-friendly symbols for interrupt properties in exynos5440
ARM: dts: exynos: Use human-friendly symbols for interrupt properties in exynos5260
ARM: dts: exynos: Use human-friendly symbols for interrupt properties in exynos5
ARM: dts: exynos: Use human-friendly symbols for interrupt properties in exynos4
ARM: dts: exynos: Use human-friendly symbols for interrupt properties in exynos3250
ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos5440
ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos5260
ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos5410/exynos542x
ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos5250
ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos5
ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos3250
ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos4x12
ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos4210
ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos4
Signed-off-by: Olof Johansson <olof@lixom.net>
Clean-up on thegpio driver for old SoCs(non DT)
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Merge tag 'mvebu-drivers-4.10-1' of git://git.infradead.org/linux-mvebu into next/soc
mvebu drivers for 4.10 (part 1)
Clean-up on thegpio driver for old SoCs(non DT)
* tag 'mvebu-drivers-4.10-1' of git://git.infradead.org/linux-mvebu:
ARM/orion/gpio: Replace three seq_printf() calls by seq_puts() in orion_gpio_dbg_show()
Signed-off-by: Olof Johansson <olof@lixom.net>
* Basic support for r8a7745 SoC
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Merge tag 'renesas-soc2-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Second Round of Renesas ARM Based SoC Updates for v4.10
* Basic support for r8a7745 SoC
* tag 'renesas-soc2-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: document SK-RZG1E board
ARM: shmobile: r8a7745: basic SoC support
Signed-off-by: Olof Johansson <olof@lixom.net>
- Enable tsc2004 touchscreen as a loadable module
- Enable REGULATOR_GPIO, dra71-evm needs this for MMC voltage
- Enable LP873x PMICs for dra71x-evm
- Run make savedefconfig to save some space and make it
easier to generate minimal patches against it
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Merge tag 'omap-for-v4.10/defconfig-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/defconfig
Defconfig changes for omaps for v4.10 merge window:
- Enable tsc2004 touchscreen as a loadable module
- Enable REGULATOR_GPIO, dra71-evm needs this for MMC voltage
- Enable LP873x PMICs for dra71x-evm
- Run make savedefconfig to save some space and make it
easier to generate minimal patches against it
* tag 'omap-for-v4.10/defconfig-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: omap2plus_defconfig: Run make savedefconfig to save some space
ARM: omap2plus_defconfig: Enable LP873X support
ARM: omap2plus_defconfig: Enable REGULATOR_GPIO
ARM: omap2plus_defconfig: Enable TOUCHSCREEN_TSC2004
Signed-off-by: Olof Johansson <olof@lixom.net>
We've dropped the last legacy boot board-*.c files for mach-omap2
for v4.9 so now we can start removing the unused platform_data.
All of the below has been unused since v4.9 merge window:
- Drop legacy pmic init code
- Apply seq_puts() fixes for legacy mux code, then drop it
- Drop legacy serial init
- Drop legacy i2c init
- Drop legacy PM init
- Drop legacy twl4030 platform init
- Drop legacy USB host init
- Drop legacy muxing for tusb6010, n8x0 is still using it's
platform init via pdata-quirks.c
- Drop legacy musb init
- Drop hwmod related legacy mux code
- Drop legacy hwmod data for omap3
- Drop legacy smsc911x and smc91x init
- Drop legacy board flash init
- Drop legacy ads7846 init
- Drop legacy sdram timings
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Merge tag 'omap-for-v4.10/legacy-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
Legacy platform_data removal for omaps for v4.10 merge window.
We've dropped the last legacy boot board-*.c files for mach-omap2
for v4.9 so now we can start removing the unused platform_data.
All of the below has been unused since v4.9 merge window:
- Drop legacy pmic init code
- Apply seq_puts() fixes for legacy mux code, then drop it
- Drop legacy serial init
- Drop legacy i2c init
- Drop legacy PM init
- Drop legacy twl4030 platform init
- Drop legacy USB host init
- Drop legacy muxing for tusb6010, n8x0 is still using it's
platform init via pdata-quirks.c
- Drop legacy musb init
- Drop hwmod related legacy mux code
- Drop legacy hwmod data for omap3
- Drop legacy smsc911x and smc91x init
- Drop legacy board flash init
- Drop legacy ads7846 init
- Drop legacy sdram timings
* tag 'omap-for-v4.10/legacy-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (21 commits)
ARM: OMAP2+: Drop legacy sdram timings
ARM: OMAP2+: Drop legacy ads7846 init
ARM: OMAP2+: Remove legacy board-flash.c
ARM: OMAP2+: Remove legacy smsc911x and smc91x GPMC support
ARM: OMAP2+: Remove legacy data from hwmod for omap3
ARM: OMAP2+: Remove legacy mux code
ARM: OMAP2+: Remove legacy hwmod mux code
ARM: OMAP2+: Remove legacy usb-musb.c platform init code
ARM: OMAP2+: Remove legacy muxing for usb-tusb6010.c
ARM: OMAP2+: Remove legacy usb-host.c platform init code
ARM: OMAP2+: Remove legacy twl4030 platform init code
ARM: OMAP2+: Remove legacy PM init
ARM: OMAP2+: Remove legacy i2c.c platform init code
ARM: OMAP2+: Remove legacy serial.c
ARM: OMAP2+: mux: Use seq_putc() in omap_mux_dbg_signal_show()
ARM: OMAP2+: mux: Replace three seq_printf() calls by seq_puts()
ARM: OMAP: kill omap_pmic_init
ARM: OMAP2: kill omap2_pmic_init
ARM: OMAP3: kill omap3_pmic_init
ARM: OMAP3: kill omap3_pmic_get_config and twl_{get,set}_voltage
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- A series of patches to configure tps65217 PMIC interrupts for
power button, charger and usb and use them on am335x
- Configure EEPROM, LEDs and USR1 button for omap5 boards
- Add tscadc DMA properites for am33xx and am4372
- Configure baltos-ir5221 both musb channels to host mode
- Configure internal and external RTC clocks for am335x boards
- Don't reset gpio3 block on baltos
- Remove pinmux for dra72-evm for erratum i869, fix the regulators
and seprate out tps65917 support
- Add dra718-evm support
- Add minimal droid 4 xt894 support
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Merge tag 'omap-for-v4.10/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Device tree changes for omaps for v4.10 merge window:
- A series of patches to configure tps65217 PMIC interrupts for
power button, charger and usb and use them on am335x
- Configure EEPROM, LEDs and USR1 button for omap5 boards
- Add tscadc DMA properites for am33xx and am4372
- Configure baltos-ir5221 both musb channels to host mode
- Configure internal and external RTC clocks for am335x boards
- Don't reset gpio3 block on baltos
- Remove pinmux for dra72-evm for erratum i869, fix the regulators
and seprate out tps65917 support
- Add dra718-evm support
- Add minimal droid 4 xt894 support
* tag 'omap-for-v4.10/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (22 commits)
ARM: dts: Add minimal support for motorola droid 4 xt894
ARM: dts: Add support for dra718-evm
ARM: dts: dra72: Add separate dtsi for tps65917
ARM: dts: dra72-evm: Fix modelling of regulators
ARM: dts: dra72-evm: Remove pinmux configurations for erratum i869
ARM: dts: am335x-baltos: don't reset gpio3 block
ARM: dts: AM335X-evmsk: Add the internal and external clock nodes for rtc
ARM: dts: AM335X-evm: Add the internal and external clock nodes for rtc
ARM: dts: AM335X-bone-common: Add the internal and external clock nodes for rtc
ARM: dts: am335x-baltos-ir5221: use both musb channels in host mode
ARM: dts: am4372: add DMA properties for tscadc
ARM: dts: am33xx: add DMA properties for tscadc
ARM: dts: omap5 uevm: add USR1 button
ARM: dts: omap5 uevm: add LEDs
ARM: dts: omap5 uevm: add EEPROM
ARM: dts: am335x: Add the power button interrupt
ARM: dts: am335x: Add the charger interrupt
dt-bindings: mfd: Provide human readable defines for TPS65217 interrupts
ARM: dts: am335x: Support the PMIC interrupt
ARM: dts: tps65217: Add the power button device
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add hwmod interconnect target wrapper module data for crypto
accelerators for am3xxx, am43xx and dra7
- Add support for dra71x family of SoCs
- PM fixes for omap4/5 needed for omap5 cpuidle
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Merge tag 'omap-for-v4.10/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
SoC changes for omaps for v4.10 merge window:
- Add hwmod interconnect target wrapper module data for crypto
accelerators for am3xxx, am43xx and dra7
- Add support for dra71x family of SoCs
- PM fixes for omap4/5 needed for omap5 cpuidle
* tag 'omap-for-v4.10/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: DRA7: hwmod: Do not register RTC on DRA71
ARM: OMAP2+: board-generic: add support for DRA71x family
ARM: AMx3xx: hwmod: Add data for RNG
ARM: AM43xx: hwmod: Add data for DES
ARM: OMAP: DRA7xx: Make L4SEC clock domain SWSUP only
ARM: DRA7: hwmod: Add data for RNG IP
ARM: DRA7: hwmod: Add data for SHA IP
ARM: DRA7: hwmod: Add data for AES IP
ARM: DRA7: hwmod: Add data for DES IP
ARM: OMAP5: Add basic cpuidle MPU CSWR support
ARM: OMAP4+: Fix bad fallthrough for cpuidle
ARM: OMAP5: Fix mpuss_early_init
ARM: OMAP5: Fix build for PM code
Signed-off-by: Olof Johansson <olof@lixom.net>
- Fix mismatched interrupt numbers for tps65217, these are not yet
used
- Remove unused omapdss_early_init_of()
- Use seq_putc() for pm-debug.c
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Merge tag 'omap-for-v4.10/fixes-not-urgent-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/fixes-non-critical
Non-urgent fixes for omaps for v4.10 merge window:
- Fix mismatched interrupt numbers for tps65217, these are not yet
used
- Remove unused omapdss_early_init_of()
- Use seq_putc() for pm-debug.c
* tag 'omap-for-v4.10/fixes-not-urgent-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: pm-debug: Use seq_putc() in two functions
ARM: OMAP2+: Remove the omapdss_early_init_of() function
mfd: tps65217: Fix mismatched interrupt number
Signed-off-by: Olof Johansson <olof@lixom.net>
Two patches to enable the dumb VGA bridges in the multi_v7 and sunxi
defconfig.
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Merge tag 'sunxi-defconfig-for-4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/defconfig
Allwinner defconfig changes for 4.10
Two patches to enable the dumb VGA bridges in the multi_v7 and sunxi
defconfig.
* tag 'sunxi-defconfig-for-4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: multi_v7: enable VGA bridge
ARM: sunxi: Enable VGA bridge
Signed-off-by: Olof Johansson <olof@lixom.net>
- remove obsolete STiH41[56] platform support
- add Oxford Semiconductor OX820 support
- add reset index include files for OX810SE and OX820
- make drivers with boolean Kconfig options explicitly
non-modular
- allow shared pulsed resets via reset_control_reset, which
in this case means that the reset must have been triggered
once, but possibly earlier, after the function returns, and
is never triggered again for the lifetime of the reset
control
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Merge tag 'reset-for-4.10' of git://git.pengutronix.de/git/pza/linux into next/drivers
Reset controller changes for v4.10
- remove obsolete STiH41[56] platform support
- add Oxford Semiconductor OX820 support
- add reset index include files for OX810SE and OX820
- make drivers with boolean Kconfig options explicitly
non-modular
- allow shared pulsed resets via reset_control_reset, which
in this case means that the reset must have been triggered
once, but possibly earlier, after the function returns, and
is never triggered again for the lifetime of the reset
control
* tag 'reset-for-4.10' of git://git.pengutronix.de/git/pza/linux:
reset: allow using reset_control_reset with shared reset
reset: lpc18xx: make it explicitly non-modular
reset: zynq: make it explicitly non-modular
reset: sunxi: make it explicitly non-modular
reset: socfpga: make it explicitly non-modular
reset: berlin: make it explicitly non-modular
dt-bindings: reset: oxnas: Update for OX820
dt-bindings: reset: oxnas: Add include file with reset indexes
reset: oxnas: Add OX820 support
reset: sti: softreset: Remove obsolete platforms from dt binding doc.
reset: sti: Remove STiH415/6 reset support
Signed-off-by: Olof Johansson <olof@lixom.net>
Recently added audio block of Exynos5410 missed global fixup of GIC
interrupt flags. Interrupt of type IRQ_TYPE_NONE is not allowed for GIC
interrupts so use level high.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
- Increase CMA size to 64 MiB, so that we can use etnaviv driver with
1920x1080 display devices.
- Enable ES8328 codec driver support, which is required by Kosagi
Novena boards.
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Merge tag 'imx-defconfig-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/defconfig
i.MX defconfig updates for 4.10:
- Increase CMA size to 64 MiB, so that we can use etnaviv driver with
1920x1080 display devices.
- Enable ES8328 codec driver support, which is required by Kosagi
Novena boards.
* tag 'imx-defconfig-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx_v6_v7_defconfig: Select the es8328 codec driver
ARM: imx_v6_v7_defconfig: Increase CMA size
Signed-off-by: Olof Johansson <olof@lixom.net>
- New boards support: i.MX6SX UDOO Neo, Boundary Devices Nitrogen6_SOM2,
Engicam i.CoreM6, Grinn i.MX6UL liteSOM/liteBoard, Toradex Colibri
iMX6 module, i.MX6ULL and EVK board.
- Remove skeleton.dtsi inclusion from all i.MX SoC dts files, as it's
been deprecated, since commit 9c0da3cc61 ("ARM: dts: explicitly
mark skeleton.dtsi as deprecated").
- Misc device addition and enabling: OCOTP for Vybrid, MMDC for i.MX6QP,
TMU for LS1021A, FEC for imx6qdl-icore, DMA for Vybrid DSPI.
- A few cleanups: use hyphens for node names, fix white spaces, move
imx-weim parameters into SoC dtsi, replace gpio-key,wakeup with
wakeup-source, remove pwm-leds from imx6q-apalis-ixora, remove I2C3
from vf610-zii-dev-rev-b.
- Other small random changes: calibrate USB PHY for b650v3 board,
update TX D_CAL for USBPHY, use enable-gpios for backlight on
imx6qdl-apalis, etc.
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Merge tag 'imx-dt-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
i.MX device tree updates for 4.10:
- New boards support: i.MX6SX UDOO Neo, Boundary Devices Nitrogen6_SOM2,
Engicam i.CoreM6, Grinn i.MX6UL liteSOM/liteBoard, Toradex Colibri
iMX6 module, i.MX6ULL and EVK board.
- Remove skeleton.dtsi inclusion from all i.MX SoC dts files, as it's
been deprecated, since commit 9c0da3cc61 ("ARM: dts: explicitly
mark skeleton.dtsi as deprecated").
- Misc device addition and enabling: OCOTP for Vybrid, MMDC for i.MX6QP,
TMU for LS1021A, FEC for imx6qdl-icore, DMA for Vybrid DSPI.
- A few cleanups: use hyphens for node names, fix white spaces, move
imx-weim parameters into SoC dtsi, replace gpio-key,wakeup with
wakeup-source, remove pwm-leds from imx6q-apalis-ixora, remove I2C3
from vf610-zii-dev-rev-b.
- Other small random changes: calibrate USB PHY for b650v3 board,
update TX D_CAL for USBPHY, use enable-gpios for backlight on
imx6qdl-apalis, etc.
* tag 'imx-dt-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (38 commits)
ARM: dts: imx6ull: add imx6ull support
ARM: dts: imx6q: replace gpio-key,wakeup with wakeup-source for Utilite Pro
ARM: dts: vfxxx: Enable DMA for DSPI2 and DSPI3
ARM: dts: imx: Remove skeleton.dtsi
ARM: dts: imx6q-utilite-pro: i2c1 is muxed
ARM: dts: add new compatible string for i.MX6QP mmdc
ARM: dts: imx6sx-udoo: Add board specific compatible strings
ARM: dts: mx5: Add new M53EVK manufacturer compat
ARM: dts: mxs: Add new M28EVK manufacturer compat
ARM: dts: imx6ul-14x14-evk: update TX D_CAL for USBPHY
ARM: dts: imx6sx-sdb: update TX D_CAL for USBPHY
ARM: dts: imx6: Add imx-weim parameters to dtsi's
ARM: dts: imx: Fix "ERROR: code indent should use tabs where possible"
ARM: dts: imx6qdl-nitrogen6_max: use hyphens for nodes name
ARM: dts: imx6qdl-nit6xlite: use hyphens for nodes name
ARM: dts: imx6qdl-nitrogen6x: use hyphens for nodes name
ARM: dts: imx6qdl-sabrelite: use hyphens for nodes name
ARM: dts: imx: add Boundary Devices Nitrogen6_SOM2 support
ARM: dts: imx6qdl-icore: Add FEC support
ARM: dts: imx6q: Add Engicam i.CoreM6 DualLite/Solo initial support
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- Drop PL310_ERRATA_769419 for Vybrid, as it turns out that the SoC
integrates revision r3p2 of the L2C-310, which is not affected by
errata 769419.
- Support perf for i.MX6 Multi-Mode DDR Controller (MMDC), so that we
can profile memory access performance.
- Support i.MX6ULL SoC using i.MX6UL base, since it's a derivative of
i.MX6UL and pin-to-pin compatible with i.MX6UL.
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Merge tag 'imx-soc-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc
i.MX SoC changes for 4.10:
- Drop PL310_ERRATA_769419 for Vybrid, as it turns out that the SoC
integrates revision r3p2 of the L2C-310, which is not affected by
errata 769419.
- Support perf for i.MX6 Multi-Mode DDR Controller (MMDC), so that we
can profile memory access performance.
- Support i.MX6ULL SoC using i.MX6UL base, since it's a derivative of
i.MX6UL and pin-to-pin compatible with i.MX6UL.
* tag 'imx-soc-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx: mach-imx6ul: add imx6ull support
ARM: imx: Drop errata 769419 for Vybrid
ARM: imx: mmdc perf function support i.MX6QP
ARM: imx: Added perf functionality to mmdc driver
Signed-off-by: Olof Johansson <olof@lixom.net>
- A series from Vladimir to fix broken i.MX31 DT clock initialization.
As i.MX31 DT support is still not quite complete, the changes are
tested on qemu kzm target and mx31lite board with simple written DTS
files.
- A fix for CompuLab's sbc-fx6 baseboard to remove wrong fec pinctrl
setting.
- A DTS correction for i.MX6QP to reflect the change that the gate of
LDB clock has been moved before the divider.
- An imx7d-pinfunc fix for UART pinmux defines
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Merge tag 'imx-fix-nc-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/fixes-non-critical
i.MX non-critical fixes for 4.10:
- A series from Vladimir to fix broken i.MX31 DT clock initialization.
As i.MX31 DT support is still not quite complete, the changes are
tested on qemu kzm target and mx31lite board with simple written DTS
files.
- A fix for CompuLab's sbc-fx6 baseboard to remove wrong fec pinctrl
setting.
- A DTS correction for i.MX6QP to reflect the change that the gate of
LDB clock has been moved before the divider.
- An imx7d-pinfunc fix for UART pinmux defines
* tag 'imx-fix-nc-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx6q-cm-fx6: fix fec pinctrl
ARM: dts: imx7d-pinfunc: fix UART pinmux defines
ARM: dts: imx6qp: correct LDB clock inputs
ARM: clk: imx31: properly init clocks for machines with DT
clk: imx31: fix rewritten input argument of mx31_clocks_init()
ARM: dts: imx31: move CCM device node to AIPS2 bus devices
ARM: dts: imx31: fix clock control module interrupts description
Signed-off-by: Olof Johansson <olof@lixom.net>
us to use generic parser later on. Note that the driver supports
handling the legacy binding also with no #pinctrl-cells so these
changes can be queued separately from the driver changes.
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Merge tag 'omap-for-v4.10/pinctrl-cells-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Add #pinctrl-cells for pinctrl-single using dts files. This allows
us to use generic parser later on. Note that the driver supports
handling the legacy binding also with no #pinctrl-cells so these
changes can be queued separately from the driver changes.
* tag 'omap-for-v4.10/pinctrl-cells-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: Add #pinctrl-cells for pinctrl-single instances
Signed-off-by: Olof Johansson <olof@lixom.net>
The Integrators are now migrated to handle the CPUfreq
scaling using the generic devicetree CPUfreq driver using the
common clock framework and have the required device tree
modifications, so turn off the old driver and turn on the new
generic driver.
Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
This adds the cpus node to the Integrator/AP device tree so
that we have a proper placeholder to put in the DT-defined
operating points for the generic DT/OPP cpufreq driver,
along with the proper operating points.
The old Integrator cpufreq driver would resolve the max
frequency to 71MHz, and the min frequency to 12 MHz, but
the clock driver can actually handle any frequency inbetween
so I picked a few select frequencies as OPPs. The cpufreq
framework doesn't seem to deal with sliding frequency scales,
only fixed points so 7 OPPs is better than 2 atleast.
We define a CPU node since this is required for cpufreq-dt,
however we do not define any compatible string for the CPU
since this architecture has pluggable CPU modules and we
do not know which one will be used. If necessary, the CPU
compatible can be filled in by the boot loader, but for
just cpufreq-dt it is not required.
Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
This adds the cpus node to the Integrator/CP device tree so
that we have a proper placeholder to put in the DT-defined
operating points for the generic DT/OPP cpufreq driver,
along with two working operating points.
I have only put in 48 and 50 MHz because going to e.g. 36
MHz hangs the system when CLCD graphics are active.
Presumably the memory bus gets to slow to feed the display
and the systems hangs for this reason. The ideal solution
would be for the display controller to put constraints on
the memory bus frequency, but that need to be a separate
longer-term project.
We define a CPU node since this is required for cpufreq-dt,
however we do not define any compatible string for the CPU
since this architecture has pluggable CPU modules and we
do not know which one will be used. If necessary, the CPU
compatible can be filled in by the boot loader, but for
just cpufreq-dt it is not required.
Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Add the relevant data taken from the PXA27x Electrical, Mechanical, and
Thermal Specfication. This will be input data for cpufreq-dt driver.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Add the relevant data taken from the PXA 25x Electrical, Mechanical, and
Thermal Specfication. This will be input data for cpufreq-dt driver.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Since gpio-pxa was redesigned to differenciate gpio0, gpio1 and the
gpio-mux interrupt as in the hardware IP, the device-tree description
should be amended so that interrupts from gpio0 and gpio1 can be mapped
to consumers.
This is especially true on lubbock and mainstone devices where gpio0 is
multiplexed on pxa_cplds for ethernet, sa1111, usb udc, and other
devices.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
This file describes pxa25x SoCs. Not all devices are listed yet, only
the subset which was already tested with a lubbock board.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
The TPIC2810 is available on both the AM571x and the AM572x IDKs and
is attached to I2C1. Output is attached to the I/O header and 10 LEDs.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The SN65HVS882 is available on both the AM572x and AM571x IDKs and is
attached to SPI1. Input is attached to the I/O header. The load trigger
is attached to GPIO3_19 on the AM572x IDK.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The TPIC2810 is available on the AM437x IDK and is attached to I2C1.
Output is attached to the I/O header and 10 LEDs.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The SN65HVS882 is available on the AM437x IDK and is attached to SPI1.
Input is attached to the I/O header.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
7 of the 8 ADC inputs on the am335x are connected to the Industrial I/O
header, add this here.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The LEDs tied to the Industrial I/O output pins are meant for providing
status feed-back and are not the primary use for the pins. Disable
this use by default. Also unify the LED naming across IDK platforms.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The SN65HVS882 is available on the AM335x-ICEv2 and is attached to SPI0.
Input is attached to the I/O header.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
One big merge this time with a total of 166 non-merge commits.
Most of the work, by far, is on dwc2 this time (68.2%) with dwc3 a far
second (22.5%). The remaining 9.3% are scattered on gadget drivers.
The most important changes for dwc2 are the peripheral side DMA support
implemented by Synopsys folks and support for the new IOT dwc2
compatible core from Synopsys.
In dwc3 land we have support for high-bandwidth, high-speed isochronous
endpoints and some non-critical fixes for large scatter lists.
Apart from these, we have our usual set of cleanups, non-critical fixes,
etc.
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Merge tag 'usb-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next
Felipe writes:
usb: patches for v4.10 merge window
One big merge this time with a total of 166 non-merge commits.
Most of the work, by far, is on dwc2 this time (68.2%) with dwc3 a far
second (22.5%). The remaining 9.3% are scattered on gadget drivers.
The most important changes for dwc2 are the peripheral side DMA support
implemented by Synopsys folks and support for the new IOT dwc2
compatible core from Synopsys.
In dwc3 land we have support for high-bandwidth, high-speed isochronous
endpoints and some non-critical fixes for large scatter lists.
Apart from these, we have our usual set of cleanups, non-critical fixes,
etc.
Odroid-X, -X2, -XU3 and -XU4 have SOC-ADC routed to an external connector.
Enable the ADC for use as iio-device.
Signed-off-by: Markus Reichl <m.reichl@fivetechno.de>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This is not needed as the gadget now fully supports DMA and it can
autodetect it. This was initially added because gadget DMA mode was only
partially implemented so could not be automatically enabled.
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
ARCH_MEDIATEK is enabled
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Merge tag 'v4.9-next-kconfig' of https://github.com/mbgg/linux-mediatek into next/soc
- clean up mach-mediatek Makefile as kbuild only descends into the folder if
ARCH_MEDIATEK is enabled
* tag 'v4.9-next-kconfig' of https://github.com/mbgg/linux-mediatek:
ARM: mediatek: clean up mach-mediatek/Makefile
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add clocks for auxadc on mt8173-evb
- Add nodes needed by clock controller for mt2701
- Use clocks from the clock controller for the uart of mt2701
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Merge tag 'v4.9-next-dts' of https://github.com/mbgg/linux-mediatek into next/dt
- Add bindings for mtk-scpsys for mt2701
- Add clocks for auxadc on mt8173-evb
- Add nodes needed by clock controller for mt2701
- Use clocks from the clock controller for the uart of mt2701
* tag 'v4.9-next-dts' of https://github.com/mbgg/linux-mediatek:
arm: dts: mt2701: Use real clock for UARTs
arm: dts: mt2701: Add clock controller device nodes
arm64: dts: mt8173: Fix auxadc node
soc: mediatek: Add MT2701 power dt-bindings
Signed-off-by: Olof Johansson <olof@lixom.net>
inclusion, missing unit names for memory nodes, various frequency
optimizations allowing for better performance on rk3066, the usage of
pin constants to bridge between the two numbering schemes used (gpio
controllers using 0-31 and pins being labeled A0-A7,..., D0-D7)
and UHS/HS modes for the mmc controllers on the popmetal board.
Two new boards, the PX3-based evaluation board, with the PX3 being an
industrial variant of the rk3188 soc and the Rikomagic MK808 board
based around the rk3066 are also added.
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Merge tag 'v4.10-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
32bit devicetree changes for Rockchip including removal of skeleton.dtsi
inclusion, missing unit names for memory nodes, various frequency
optimizations allowing for better performance on rk3066, the usage of
pin constants to bridge between the two numbering schemes used (gpio
controllers using 0-31 and pins being labeled A0-A7,..., D0-D7)
and UHS/HS modes for the mmc controllers on the popmetal board.
Two new boards, the PX3-based evaluation board, with the PX3 being an
industrial variant of the rk3188 soc and the Rikomagic MK808 board
based around the rk3066 are also added.
* tag 'v4.10-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (21 commits)
ARM: dts: rockchip: replace to "max-frequency" instead of "clock-freq-min-max"
ARM: dts: rockchip: Set sdmmc frequency at boot time for rk3066a
ARM: dts: rockchip: use pin constants to describe gpios on Popmetal-RK3288
include: dt-bindings: Add GPIO pin index definition for rockchip pinctrl
ARM: dts: rockchip: Add rk3066 MK808 board
devicetree: Add vendor prefix for Rikomagic
ARM: dts: rockchip: initialize rk3066 PLL clock rate
clk: rockchip: Add binding ids for cpu and peri clocks on rk3066
ARM: dts: rockchip: enable HS200/DDR52 mode for emmc on rk3288-popmetal
ARM: dts: rockchip: Support UHS mode for SD card on PopMetal-RK3288 board
ARM: dts: rockchip: remove always-on and boot-on from vcc_sd for px3-evb
ARM: dts: rockchip: update compatible strings for Rockchip efuse
ARM: dts: rockchip: add rockchip PX3 Evaluation board
ARM: dts: rockchip: Add missing unit name to memory nodes in rk3xxx boards
ARM: dts: rockchip: Add missing unit name to memory nodes in rk3288 boards
ARM: dts: rockchip: Add missing unit name to memory nodes in rk322x boards
ARM: dts: rockchip: Add missing unit name to memory nodes in rk3036 boards
ARM: dts: rockchip: Remove skeleton.dtsi inclusion in rk3xxx.dtsi
ARM: dts: rockchip: Remove skeleton.dtsi inclusion in rk3288.dtsi
ARM: dts: rockchip: Remove skeleton.dtsi inclusion in rk322x.dtsi
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add specific compatible strings for variants of Cyclone5 boards
- Add QSPI node on Arria10
- Enable QSPI on Arria5 and Arria10 devkit, and Cyclone5 SoCKit
- Add NAND controller node on Cyclone5
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Merge tag 'socfpga_dts_for_v4.10_part_2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt
SoCFPGA DTS update for v4.10, part 2
- Add specific compatible strings for variants of Cyclone5 boards
- Add QSPI node on Arria10
- Enable QSPI on Arria5 and Arria10 devkit, and Cyclone5 SoCKit
- Add NAND controller node on Cyclone5
* tag 'socfpga_dts_for_v4.10_part_2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
ARM: dts: socfpga: add nand controller nodes
ARM: dts: socfpga: Enable QSPI on the Arria5 devkit
ARM: dts: socfpga: Enable QSPI on the Cyclone5 sockit
ARM: dts: socfpga: Enable QSPI in Arria10 devkit
ARM: dts: socfpga: Add QSPI node for the Arria10
ARM: dts: socfpga: enable qspi on the Cyclone5 devkit
ARM: dts: socfpga: add specific compatible strings for boards
Signed-off-by: Olof Johansson <olof@lixom.net>
* 'sti-defconfig-for-4.10-round2' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti:
ARM: multi_v7_defconfig: Remove ST_THERMAL_SYSCFG Kconfig symbol
Signed-off-by: Olof Johansson <olof@lixom.net>
The EBI lookup is not longer in use: this has been moved to the
NAND chip driver. The syscon node is better accessed indirectly
using the regmap like the NAND chip driver does, so let's use
the syscon to set the modem control signals RTS/CTS through the
dedicated syscon register.
We also migrate the decoder status "SC_DEC" register that
enumerate the logic modules using syscon.
Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
This cycle is covering :
- some clock fixes common with sa1100 architecture
- the consequence of the pxa_camera conversion to v4l2
- a small irq related fix for pxa25x device-tree only
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Merge tag 'pxa-for-4.10' of https://github.com/rjarzmik/linux into next/soc
This is the pxa changes for v4.10 cycle.
This cycle is covering :
- some clock fixes common with sa1100 architecture
- the consequence of the pxa_camera conversion to v4l2
- a small irq related fix for pxa25x device-tree only
* tag 'pxa-for-4.10' of https://github.com/rjarzmik/linux:
ARM: pxa: fix pxa25x interrupt init
ARM: pxa: remove duplicated include from spitz.c
ARM: pxa: em-x270: use the new pxa_camera platform_data
ARM: pxa: ezx: use the new pxa_camera platform_data
ARM: pxa: mioa701: use the new pxa_camera platform_data
ARM: pxa: pxa_cplds: honor probe deferral
ARM: sa11x0/pxa: get rid of get_clock_tick_rate
watchdog: sa11x0/pxa: get rid of get_clock_tick_rate
ARM: sa11x0/pxa: acquire timer rate from the clock rate
clk: pxa25x: OSTIMER0 clocks from the main oscillator
Signed-off-by: Olof Johansson <olof@lixom.net>
1. Add TOPEET itop core and Elite boards, based on Exynos4412.
2. Remove the Exynos4415 DTSI. We did not have any mainlined boards
using it. I am also not aware of any popular out-of-tree boards using it.
3. Add Snoop Control Unit node for Exynos4.
4. Minor cleanups.
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Merge tag 'samsung-dt-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Samsung DeviceTree update for v4.10:
1. Add TOPEET itop core and Elite boards, based on Exynos4412.
2. Remove the Exynos4415 DTSI. We did not have any mainlined boards
using it. I am also not aware of any popular out-of-tree boards using it.
3. Add Snoop Control Unit node for Exynos4.
4. Minor cleanups.
* tag 'samsung-dt-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Add SCU device node to exynos4.dtsi
ARM: dts: exynos: Remove exynos4415.dtsi
ARM: dts: exynos: Document eMMC/SD/SDIO devices in Snow and Peach boards
ARM: dts: exynos: Add TOPEET itop elite based board
ARM: dts: exynos: Add TOPEET itop core board SCP package version
ARM: dts: exynos: Add entries for sound support on Odroid-XU board
ARM: dts: exynos: Remove "simple-bus" compatible from fimc-is node
Signed-off-by: Olof Johansson <olof@lixom.net>
This includes a single functional change:
* set default parent clock for PWM1 & PWM2.
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Merge tag 'lpc32xx-dt-v4.10' of https://github.com/sylemieux/linux-lpc32xx into next/dt
NXP LPC32xx ARM SoC device tree updates for v4.10
This includes a single functional change:
* set default parent clock for PWM1 & PWM2.
* tag 'lpc32xx-dt-v4.10' of https://github.com/sylemieux/linux-lpc32xx:
ARM: dts: lpc32xx: set default parent clock for pwm1 & pwm2
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add OPP tables to support generic cpufreq driver
- Use more clocks/resets properties
- Misc fixes and cleanups
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Merge tag 'uniphier-dt-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into next/dt
UniPhier ARM SoC DT updates for v4.10
- Add OPP tables to support generic cpufreq driver
- Use more clocks/resets properties
- Misc fixes and cleanups
* tag 'uniphier-dt-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
ARM: dts: uniphier: make compatible of syscon nodes SoC-specific
ARM: dts: uniphier: add clocks/resets to EHCI nodes of sLD3 SoC
ARM: dts: uniphier: remove redundant serial fifo-size properties
ARM: dts: uniphier: make 32bit SoC DTSI linear
ARM: dts: uniphier: add CPU clocks and OPP table for PXs2 SoC
ARM: dts: uniphier: add CPU clocks and OPP table for Pro5 SoC
ARM: dts: uniphier: increase register region size of sysctrl node
Signed-off-by: Olof Johansson <olof@lixom.net>
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Merge tag 'v4.9-rc3' into next/dt
Linux 4.9-rc3
* tag 'v4.9-rc3': (292 commits)
Linux 4.9-rc3
x86/smpboot: Init apic mapping before usage
ACPICA: Dispatcher: Fix interpreter locking around acpi_ev_initialize_region()
ACPICA: Dispatcher: Fix an unbalanced lock exit path in acpi_ds_auto_serialize_method()
ACPICA: Dispatcher: Fix order issue of method termination
ARC: module: print pretty section names
ARC: module: elide loop to save reference to .eh_frame
ARC: mm: retire ARC_DBG_TLB_MISS_COUNT...
ARC: build: retire old toggles
ARC: boot log: refactor cpu name/release printing
ARC: boot log: remove awkward space comma from MMU line
ARC: boot log: don't assume SWAPE instruction support
ARC: boot log: refactor printing abt features not captured in BCRs
ARCv2: boot log: print IOC exists as well as enabled status
ubifs: Fix regression in ubifs_readdir()
ubi: fastmap: Fix add_vol() return value test in ubi_attach_fastmap()
MAINTAINERS: Add entry for genwqe driver
VMCI: Doorbell create and destroy fixes
GenWQE: Fix bad page access during abort of resource allocation
vme: vme_get_size potentially returning incorrect value on failure
...
Enhancements:
* Basic support for r8a7743 SoC; only SoC code so far
* Select errata 798181 for SoCs with CA15 cores
Clean-up:
* Consolidate R8A7743 and R8A779[234] machine definitions
Documentation:
* Add Marzen, Gose and Alt board part numbers to DT bindings
* Document SK-RZG1M board
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Merge tag 'renesas-soc-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Renesas ARM Based SoC Updates for v4.10
Enhancements:
* Basic support for r8a7743 SoC; only SoC code so far
* Select errata 798181 for SoCs with CA15 cores
Clean-up:
* Consolidate R8A7743 and R8A779[234] machine definitions
Documentation:
* Add Marzen, Gose and Alt board part numbers to DT bindings
* Document SK-RZG1M board
* tag 'renesas-soc-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7779/marzen: Add board part number to DT bindings
ARM: shmobile: select errata 798181 for SoCs with CA15 cores
ARM: shmobile: Consolidate R8A7743 and R8A779[234] machine definitions
ARM: shmobile: r8a7793/gose: Add board part number to DT bindings
ARM: shmobile: r8a7794/alt: Add board part number to DT bindings
ARM: shmobile: document SK-RZG1M board
ARM: shmobile: r8a7743: basic SoC support
ARM: shmobile: only call rcar_gen2_clocks_init() if present
ARM: shmobile: Sort Kconfig selections
Signed-off-by: Olof Johansson <olof@lixom.net>
Clean-Ups and Corrections:
* Removed Z clock from r8a7794 SoC; it is not present in hardware
* Use generic pinctrl properties in SDHI nodes in gose board
* Correct W=1 dtc warnings on r8a7794 SoC
* Correct DU reg property on r8a7779 SoC
* Correct SCIFB reg properties to cover all registers
Enhancements:
* Configure pinmuxing for the DU0 input clock on the Marzen board
* Enable VIN 0 - 2 on r8a7793 SoC
* Enable HDMI input on Koelsch and Lager boards
* Enable SDHI1 on rskrza1 board
* Add MMCIF nodes to r7s72100 SoC
* Add MSIOF clocks to r8a7792 SoC
* Enable UHS for SDHI 0 & 1 on koelsch and alt boards
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Merge tag 'renesas-dt-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Renesas ARM Based SoC DT Updates for v4.10
Clean-Ups and Corrections:
* Removed Z clock from r8a7794 SoC; it is not present in hardware
* Use generic pinctrl properties in SDHI nodes in gose board
* Correct W=1 dtc warnings on r8a7794 SoC
* Correct DU reg property on r8a7779 SoC
* Correct SCIFB reg properties to cover all registers
Enhancements:
* Configure pinmuxing for the DU0 input clock on the Marzen board
* Enable VIN 0 - 2 on r8a7793 SoC
* Enable HDMI input on Koelsch and Lager boards
* Enable SDHI1 on rskrza1 board
* Add MMCIF nodes to r7s72100 SoC
* Add MSIOF clocks to r8a7792 SoC
* Enable UHS for SDHI 0 & 1 on koelsch and alt boards
* tag 'renesas-dt-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (29 commits)
ARM: dts: r8a7794: remove Z clock
ARM: dts: r8a7779: marzen: Configure pinmuxing for the DU0 input clock
ARM: dts: sh73a0: Remove skeleton.dtsi inclusion
ARM: dts: r8a7740: Remove skeleton.dtsi inclusion
ARM: dts: r8a7779: Remove skeleton.dtsi inclusion
ARM: dts: r8a7778: Remove skeleton.dtsi inclusion
ARM: dts: emev2: Remove skeleton.dtsi inclusion
ARM: dts: r8a7779: Fix DU reg property
ARM: dts: r8a7793: Enable VIN0-VIN2
ARM: dts: koelsch: add HDMI input
ARM: dts: lager: Add entries for VIN HDMI input support
ARM: dts: rskrza1: add sdhi1 DT support
ARM: dts: r7s72100: add sdhi to device tree
ARM: dts: r8a7794: Fix W=1 dtc warnings
ARM: dts: gose: use generic pinctrl properties in SDHI nodes
ARM: dts: r7s72100: add sdhi clock to device tree
ARM: dts: r7s72100: add mmcif to device tree
ARM: dts: r8a7792: add MSIOF support
ARM: dts: r8a7792: add MSIOF clocks
ARM: dts: wheat: add DU support
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Add blue-and-red-wiring -property to LCDC node. Also adds comments on
how to get support 24 bit RGB mode. After this patch am335x-boneblack
support RGB565, BGR888, and XBGR8888 color formats. See details in
Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt.
The BBB has straight color wiring from am335x to tda19988, however the
tda19988 can be configured to cross the blue and red wires. The
comments show how to do that with video-ports property of tda19988
node and how to tell LCDC that blue and red wires are crossed, with
blue-and-red-wiring LCDC node property. This changes supported color
formats from 16 bit RGB and 24 bit BGR to 16 bit BGR and 24 bit RGB.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
A fix to reintroduce missing pinmux options that turned out not to be
optional.
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Merge tag 'sunxi-fixes-for-4.9' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into fixes
Allwinner fixes for 4.9
A fix to reintroduce missing pinmux options that turned out not to be
optional.
* tag 'sunxi-fixes-for-4.9' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: dts: sun8i: fix the pinmux for UART1
Signed-off-by: Olof Johansson <olof@lixom.net>
It fixes a boot failure on imx53-qsb board with a DA9053 PMIC, which is
caused by the regulator core change, commit fa93fd4ecc ("regulator:
core: Ensure we are at least in bounds for our constraints").
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Merge tag 'imx-fixes-4.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
i.MX fixes for 4.9, 2nd round:
It fixes a boot failure on imx53-qsb board with a DA9053 PMIC, which is
caused by the regulator core change, commit fa93fd4ecc ("regulator:
core: Ensure we are at least in bounds for our constraints").
* tag 'imx-fixes-4.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx53-qsb: Fix regulator constraints
Signed-off-by: Olof Johansson <olof@lixom.net>
features printed, all these are quite trivial and tiny. The omap5 jack
detection and gpadc patches are not strictly fixes, but I wanted to get
binding document typo fixed before it pops up on other boards. The
gpadc one liner was in the same series and I applied and pushed it out
already before noticing it could have waited. The list of changes is:
- Fix omap3 SoC features printed
- Make sure OMAP_INTERCONNECT is selected for am43xx only configurations
- Add missing memory node for torpedo
- Initialize uart4_mask properly to avoid writing garbage to PRM registers
- Fix NULL pointer dereference for omap4 volt_data
- Add alias for omap5 gpadc needed by iio drivers
- Enable omap5 jack headset jack detection and fix it's binding typo
- Add missing memory node for logicpd-som-lv
- Fix wrong SMPS6 voltage for VDD-DDR3 for omap5
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Merge tag 'omap-for-v4.9/fixes-for-rc-cycle' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Fixes for omaps for v4.9-rc cycle. Except for the omap3 fix for the SoC
features printed, all these are quite trivial and tiny. The omap5 jack
detection and gpadc patches are not strictly fixes, but I wanted to get
binding document typo fixed before it pops up on other boards. The
gpadc one liner was in the same series and I applied and pushed it out
already before noticing it could have waited. The list of changes is:
- Fix omap3 SoC features printed
- Make sure OMAP_INTERCONNECT is selected for am43xx only configurations
- Add missing memory node for torpedo
- Initialize uart4_mask properly to avoid writing garbage to PRM registers
- Fix NULL pointer dereference for omap4 volt_data
- Add alias for omap5 gpadc needed by iio drivers
- Enable omap5 jack headset jack detection and fix it's binding typo
- Add missing memory node for logicpd-som-lv
- Fix wrong SMPS6 voltage for VDD-DDR3 for omap5
* tag 'omap-for-v4.9/fixes-for-rc-cycle' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: omap5: board-common: fix wrong SMPS6 (VDD-DDR3) voltage
ARM: omap3: Add missing memory node in SOM-LV
ASoC: omap-abe-twl6040: fix typo in bindings documentation
dts: omap5: board-common: enable twl6040 headset jack detection
dts: omap5: board-common: add phandle to reference Palmas gpadc
ARM: OMAP2+: avoid NULL pointer dereference
ARM: OMAP2+: PRM: initialize en_uart4_mask and grpsel_uart4_mask
ARM: dts: omap3: Fix memory node in Torpedo board
ARM: AM43XX: Select OMAP_INTERCONNECT in Kconfig
ARM: OMAP3: Fix formatting of features printed
Signed-off-by: Olof Johansson <olof@lixom.net>
Though the keyboard driver for GPIO buttons(gpio-keys) will continue to
check for/support the legacy "gpio-key,wakeup" boolean property to
enable gpio buttons as wakeup source, "wakeup-source" is the new
standard binding.
This patch replaces the legacy "gpio-key,wakeup" with the unified
"wakeup-source" property in order to avoid any further copy-paste
duplication.
Cc: "Benoît Cousson" <bcousson@baylibre.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
There is no drivers using those fields so remove them and
the remaining initializations.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Tested-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
This patch adds DMA slave map tables to the pl080 devices's
platform_data in order to support the new channel request API.
A few devices for which there was no DMA support with current
code are omitted in the tables.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Tested-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
No need to duplicate the same define everywhere. Since
the only user is stop-machine and the only provider is
s390, we can use a default implementation of cpu_relax_yield()
in sched.h.
Suggested-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Nicholas Piggin <npiggin@gmail.com>
Cc: Noam Camus <noamc@ezchip.com>
Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Will Deacon <will.deacon@arm.com>
Cc: kvm@vger.kernel.org
Cc: linux-arch@vger.kernel.org
Cc: linux-s390 <linux-s390@vger.kernel.org>
Cc: linuxppc-dev@lists.ozlabs.org
Cc: sparclinux@vger.kernel.org
Cc: virtualization@lists.linux-foundation.org
Cc: xen-devel@lists.xenproject.org
Link: http://lkml.kernel.org/r/1479298985-191589-1-git-send-email-borntraeger@de.ibm.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Commit 7619751f8c ("ARM: 8595/2: apply more __ro_after_init") caused
a regression with XIP kernels by moving the __ro_after_init data into
the read-only section. With XIP kernels, the read-only section is
located in read-only memory from the very beginning.
Work around this by moving the __ro_after_init data back into the .data
section, which will be in RAM, and hence will be writable.
It should be noted that in doing so, this remains writable after init.
Fixes: 7619751f8c ("ARM: 8595/2: apply more __ro_after_init")
Reported-by: Andrea Merello <andrea.merello@gmail.com>
Tested-by: Andrea Merello <andrea.merello@gmail.com> [ XIP stm32 ]
Tested-by: Alexandre Torgue <alexandre.torgue@st.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
This adds the GPIO names for the Raspberry Pi Zero. The GPIO lines
of the RPi Zero are almost identical to the Model A+ except:
* GPIO 35, 38, 40 and 45 are not connected
* Status LED is active low
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
There are some differences between the schematics and the official firmware
DTS [1]. So based on these additional information the following has been
changed:
* use consistent "CAM_GPIO1" for camera LED
* use consistent "CAM_GPIO0" for camera shutdown
* add "USB_LIMIT" for USB current limit (0=600mA, 1=1200mA)
[1] - https://github.com/raspberrypi/firmware/blob/master/extra/dt-blob.dts
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
This enables the GPIO-b support for Broadcom NSP SoC
Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
It's BCM4709A0 based device with 16 MiB flash, 128 MiB of RAM and two
PCIe based on-PCB BCM4360 chipsets.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Since early BCM5301X days we got abort handler that was removed by
commit 937b12306e ("ARM: BCM5301X: remove workaround imprecise abort
fault handler"). It assumed we need to deal only with pending aborts
left by the bootloader. Unfortunately this isn't true for BCM5301X.
When probing PCI config space (device enumeration) it is expected to
have master aborts on the PCI bus. Most bridges don't forward (or they
allow disabling it) these errors onto the AXI/AMBA bus but not the
Northstar (BCM5301X) one.
iProc PCIe controller on Northstar seems to be some older one, without
a control register for errors forwarding. It means we need to workaround
this at platform level. All newer platforms are not affected by this
issue.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The M0 processor handles interrupts for the always-on CRMU GPIO
controller. Setting the CRMU GPIO driver with the mailbox controller as
the interrupt parent allows the mailbox controller to forward interrupts
from the M0 to the GPIO driver for processing.
Reviewed-by: Jonathan Richardson <jonathan.richardson@broadcom.com>
Tested-by: Jonathan Richardson <jonathan.richardson@broadcom.com>
Reviewed-by: Vikram Prakash <vikram.prakash@broadcom.com>
Reviewed-by: Shreesha Rajashekar <shreesha.rajashekar@broadcom.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Jonathan Richardson <jonathan.richardson@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
RK1108 EVB is designed by Rockchip for CVR field.
This patch add basic support for it, which can boot with
initramfs into shell.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
RK1108 is embedded with an ARM Cortex-A7 single core and a DSP core.
It is designed for varies application scenario such as car DVR, sports
DV, secure camera and UAV camera.
This patch add basic support for it with DMAC / UART / CRU / pinctrl / MMC
enabled.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Tested-by: Jacob Chen <jacob2.chen@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
As there are no users left, we can remove cpu_relax_lowlatency()
implementations from every architecture.
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Nicholas Piggin <npiggin@gmail.com>
Cc: Noam Camus <noamc@ezchip.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Cc: virtualization@lists.linux-foundation.org
Cc: xen-devel@lists.xenproject.org
Cc: <linux-arch@vger.kernel.org>
Link: http://lkml.kernel.org/r/1477386195-32736-6-git-send-email-borntraeger@de.ibm.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
For spinning loops people do often use barrier() or cpu_relax().
For most architectures cpu_relax and barrier are the same, but on
some architectures cpu_relax can add some latency.
For example on power,sparc64 and arc, cpu_relax can shift the CPU
towards other hardware threads in an SMT environment.
On s390 cpu_relax does even more, it uses an hypercall to the
hypervisor to give up the timeslice.
In contrast to the SMT yielding this can result in larger latencies.
In some places this latency is unwanted, so another variant
"cpu_relax_lowlatency" was introduced. Before this is used in more
and more places, lets revert the logic and provide a cpu_relax_yield
that can be called in places where yielding is more important than
latency. By default this is the same as cpu_relax on all architectures.
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Nicholas Piggin <npiggin@gmail.com>
Cc: Noam Camus <noamc@ezchip.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Cc: virtualization@lists.linux-foundation.org
Cc: xen-devel@lists.xenproject.org
Link: http://lkml.kernel.org/r/1477386195-32736-2-git-send-email-borntraeger@de.ibm.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Since the PM core code is no longer using a fake platform_device or
platform_data, remove references to 'pdata'.
No functional changes.
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Remove fake platform device used for PM init. Move pdata values which
are common across all current platforms into pm.c.
Also, since PM is only used on da8xx, remove davinci_pm_init() from
common init code, and only use in da850/omapl138 board files that are
currently creating the fake platform_device.
Suggested-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
[nsekhar@ti.com: subject line adjustment]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Drop the space before/after '<' and '>'; and
separate the entries to be a bit more readable.
Reported-by: Julia Cartwright <julia@ni.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Series-to: arm-soc
Series-cc: julia@ni.com
The patch removes these warnings reported by dtc 1.4:
Warning (unit_address_vs_reg): Node /pmu has a reg or ranges property,
but no unit name
Warning (unit_address_vs_reg): Node /fixedregulator@0 has a unit name,
but no reg property
Warning (unit_address_vs_reg): Node /memory has a reg or ranges
property, but no unit name
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Julia Cartwright <julia@ni.com>
Series-to: arm-soc
Based on
"ARM: dts: explicitly mark skeleton.dtsi as deprecated"
(sha1: 9c0da3cc61)
skeleton.dtsi is deprecated.
Move address and size-cells directly to zynq-7000.dtsi.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Julia Cartwright <julia@ni.com>
This shrinks down omap2plus_defconfig a bit and makes it easier for
people to generate minimal patches against it.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Let's add minimal support for droid 4 with MMC and WLAN working.
It can be booted with appended dtb using kexec to a state where
MMC and WLAN work with currently no support for it's PMIC or
display.
Note that we are currently using fixed regulators as we don't
have support for it's cpcap PMIC. I'll be posting regmap_spi
based minimal cpcap patches later on for USB and the debug
UART on droid 4 multiplexed with the USB connector.
Cc: Marcel Partap <mpartap@gmx.net>
Cc: Michael Scott <michael.scott@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The UniPhier outer cache (arch/arm/mm/cache-uniphier.c) has 128 byte
line length and its tags are also managed per 128 byte line. This
is very unfortunate, but the current 64 byte alignment for kmalloc()
causes sharing problems on DMA if used with this outer cache.
This commit adds ARM_L1_CACHE_SHIFT_7 to increase the DMA minimum
alignment to 128 byte if CACHE_UNIPHIER is enabled. There are
several drivers that assume aligning to L1_CACHE_BYTES will be DMA
safe, so this commit also changes the L1_CACHE_BYTES for safety.
Having said that, I hesitate to align all the other SoCs in Multi
platform to the UniPhier's requirement. So, I am disabling the
CONFIG_CACHE_UNIPHIER by default, so that multi_v7_defconfig will
still stay with CONFIG_ARM_L1_CACHE_SHIFT=6. With this commit,
UniPhier SoCs will become slower, but it is much better than system
crash. If desired, the outer-cache can be enabled by merge_config
or something.
Note:
The UniPhier PH1-Pro5 SoC is equipped also with L3 cache with 256
byte line size but its tags are managed per 128 byte sub-line.
So, ARM_L1_CACHE_SHIFT_7 should be fine for all the UniPhier SoCs.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
fs_initcall is definitely too late to initialize DMA-debug hash tables,
because some drivers might get probed and use DMA mapping framework
already in core_initcall. Late initialization of DMA-debug results in
false warning about accessing memory, that was not allocated, like this
one:
------------[ cut here ]------------
WARNING: CPU: 5 PID: 1 at lib/dma-debug.c:1104 check_unmap+0xa1c/0xe50
exynos-sysmmu 10a60000.sysmmu: DMA-API: device driver tries to free DMA memory it has not allocated [device
address=0x000000006ebd0000] [size=16384 bytes]
Modules linked in:
CPU: 5 PID: 1 Comm: swapper/0 Not tainted 4.9.0-rc5-00028-g39dde3d-dirty #44
Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[<c0119dd4>] (unwind_backtrace) from [<c01122bc>] (show_stack+0x20/0x24)
[<c01122bc>] (show_stack) from [<c062714c>] (dump_stack+0x84/0xa0)
[<c062714c>] (dump_stack) from [<c0132560>] (__warn+0x14c/0x180)
[<c0132560>] (__warn) from [<c01325dc>] (warn_slowpath_fmt+0x48/0x50)
[<c01325dc>] (warn_slowpath_fmt) from [<c06814f8>] (check_unmap+0xa1c/0xe50)
[<c06814f8>] (check_unmap) from [<c06819c4>] (debug_dma_unmap_page+0x98/0xc8)
[<c06819c4>] (debug_dma_unmap_page) from [<c076c3e8>] (exynos_iommu_domain_free+0x158/0x380)
[<c076c3e8>] (exynos_iommu_domain_free) from [<c0764a30>] (iommu_domain_free+0x34/0x60)
[<c0764a30>] (iommu_domain_free) from [<c011f168>] (release_iommu_mapping+0x30/0xb8)
[<c011f168>] (release_iommu_mapping) from [<c011f23c>] (arm_iommu_release_mapping+0x4c/0x50)
[<c011f23c>] (arm_iommu_release_mapping) from [<c0b061ac>] (s5p_mfc_probe+0x640/0x80c)
[<c0b061ac>] (s5p_mfc_probe) from [<c07e6750>] (platform_drv_probe+0x70/0x148)
[<c07e6750>] (platform_drv_probe) from [<c07e25c0>] (driver_probe_device+0x12c/0x6b0)
[<c07e25c0>] (driver_probe_device) from [<c07e2c6c>] (__driver_attach+0x128/0x17c)
[<c07e2c6c>] (__driver_attach) from [<c07df74c>] (bus_for_each_dev+0x88/0xc8)
[<c07df74c>] (bus_for_each_dev) from [<c07e1b6c>] (driver_attach+0x34/0x58)
[<c07e1b6c>] (driver_attach) from [<c07e1350>] (bus_add_driver+0x18c/0x32c)
[<c07e1350>] (bus_add_driver) from [<c07e4198>] (driver_register+0x98/0x148)
[<c07e4198>] (driver_register) from [<c07e5cb0>] (__platform_driver_register+0x58/0x74)
[<c07e5cb0>] (__platform_driver_register) from [<c174cb30>] (s5p_mfc_driver_init+0x1c/0x20)
[<c174cb30>] (s5p_mfc_driver_init) from [<c0102690>] (do_one_initcall+0x64/0x258)
[<c0102690>] (do_one_initcall) from [<c17014c0>] (kernel_init_freeable+0x3d0/0x4d0)
[<c17014c0>] (kernel_init_freeable) from [<c116eeb4>] (kernel_init+0x18/0x134)
[<c116eeb4>] (kernel_init) from [<c010bbd8>] (ret_from_fork+0x14/0x3c)
---[ end trace dc54c54bd3581296 ]---
This patch moves initialization of DMA-debug to core_initcall. This is
safe from the initialization perspective. dma_debug_do_init() internally calls
debugfs functions and debugfs also gets initialised at core_initcall(), and
that is earlier than arch code in the link order, so it will get initialized
just before the DMA-debug.
Reported-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Recent kernels have changed their behaviour to be more inconsistent
when handling printk continuations. With todays kernels, the output
looks sane on the console, but dmesg splits individual printk()s which
do not have the KERN_CONT prefix into separate lines.
Since the assembly code is not trivial to add the KERN_CONT, and we
ideally want to avoid using KERN_CONT (as multiple printk()s can race
between different threads), convert the assembly dumping the register
values to C code, and have the C code build the output a line at a
time before dumping to the console.
This avoids the KERN_CONT issue, and also avoids situations where the
output is intermixed with other console activity.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Add the nodes for the MSTPRI configuration and DDR2/mDDR memory
controller drivers to da850.dtsi.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Trivial fix to spelling mistake "Mananger" to "Manager"
in error message
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
This patch adds the QSPI clock for stm32f469 discovery board.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
The STMicrolectornics's STM32F746 MCU has the following main features:
- Cortex-M7 core running up to @216MHz
- 1MB internal flash, 320KBytes internal RAM (+4KB of backup SRAM)
- FMC controller to connect SDRAM, NOR and NAND memories
- Dual mode QSPI
- SD/MMC/SDIO support
- Ethernet controller
- USB OTFG FS & HS controllers
- I2C, SPI, CAN busses support
- Several 16 & 32 bits general purpose timers
- Serial Audio interface
- LCD controller
- HDMI-CEC
- SPDIFRX
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
This patch introduces the MACH_STM32F746 to make possible to only select
STM32F746 pinctrl driver
By default, all the MACH_STM32Fxxx flags will be set with STM32 defconfig.
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Some kernel configuration options required for systemd
support are missing in davinci_all_defconfig. Add them.
This is based on recommendations in:
http://cgit.freedesktop.org/systemd/systemd/tree/README
Options which kernel enables by default (and will thus be removed
upon next savedefconfig update) are not included.
Tested on OMAP-L138 LCDK board with fully up to date armv5
archlinux filesystem.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
With the da8xx memory controller and master peripheral priority
drivers merged and corresponding device tree changes in place we can
now enable appropriate options by default.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Add minimal support for the RZ/G1E (R8A7745) SoC.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
It is the 10th processor in the well-known imx6 series, and derived
from imx6ul but cost optimized. The more information about imx6ull
can be found at:
http://www.nxp.com/products/microcontrollers-and-processors/
arm-processors/i.mx-applications-processors/i.mx-6-processors
/i.mx6qp/i.mx-6ull-single-core-processor-with-arm-cortex-a7-core
:i.MX6ULL
imx6ul.dtsi is the SoC common stuff for both imx6ul and imx6ull;
imx6ul-14x14-evk.dts is the board common stuff for both imx6ul
and imx6ull 14x14 evk. In this patch, for SoC part, the
imx6ull.dtsi includes imx6ul.dtsi; for board part, imx6ull-14x14-evk.dts
includes imx6ul-14x14-evk.dts.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Though the keyboard driver for GPIO buttons(gpio-keys) will continue to
check for/support the legacy "gpio-key,wakeup" boolean property to
enable gpio buttons as wakeup source, "wakeup-source" is the new
standard binding.
This patch replaces the legacy "gpio-key,wakeup" with the unified
"wakeup-source" property in order to avoid any further copy-paste
duplication.
Cc: Sascha Hauer <kernel@pengutronix.de>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
DDR3L is usually specified as
JEDEC standard 1.35V(1.28V~1.45V) & 1.5V(1.425V~1.575V)
Therefore setting smps6 regulator to 1.2V is definitively below
minimum. It appears that real world chips are more forgiving than
data sheets indicate, but let's set the regulator right.
Note: a board that uses other voltages (DDR with 1.5V) can
overwrite by referencing &smps6_reg.
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>