4 Commits

Author	SHA1	Message	Date
Chen-Yu Tsai	13e0dde8b2	clk: sunxi-ng: Support multiple variable pre-dividers ... On the A83T, the AHB1 clock has a shared pre-divider on the two PLL-PERIPH clock parents. To support such instances of shared pre-dividers, this patch extends the mux clock type to support multiple variable pre-dividers. As the pre-dividers are only used to calculate the rate, but do not participate in the factorization process, this is fairly straightforward. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>	2017-06-07 15:32:15 +02:00
Philipp Tomsich	fe686babf4	clk: sunxi-ng: Fix div/mult settings for osc12M on A64 ... The mult/div for osc12M was previously backwards (giving a 48M rate for osc12M). Fix it. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Christoph Muellner <christoph.muellner@theobroma-systems.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>	2017-03-20 09:49:43 +01:00
Stephen Boyd	30e1db86ba	clk: sunxi-ng: Mark structs static and cleanup spaces ... Some checkpatch warnings about spaces were missed and we didn't mark two structs as static. Clean it up. Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>	2016-11-16 11:27:28 -08:00
Maxime Ripard	c6a0637460	clk: sunxi-ng: Add A64 clocks ... Add the A64 CCU clocks set. Acked-by: Rob Herring <robh@kernel.org> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>	2016-11-03 09:06:18 +01:00