Commit Graph

2 Commits

Author SHA1 Message Date
Christian Daudt
b8eb35fd59 ARM: bcm281xx: Add L2 cache enable code
- Adds a module to provide calls into secure monitor mode
- Uses this module to make secure monitor calls to enable L2 cache.

Updates from V1:
- Split DT portion into separate patch
- replace #ifdef-ed L2 code with "if".
- move init call to board init

Signed-off-by: Christian Daudt <csd@broadcom.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2013-04-09 09:18:13 -07:00
Christian Daudt
8ac49e0485 Add support for generic BCM SoC chipsets
In order to start upstreaming Broadcom SoC support, create
a starting hierarchy, arch and dts files.
The first support SoC family that is planned is the
BCM281XX (BCM11130/11140/11351/28145/28155) family of dual A9 mobile
SoC cores.
This code is just the skeleton code for get the machine upstreamed. It
has been made MULTIPLATFORM compatible.
Next steps
----------
Upstream a basic set of drivers - sufficient for a console boot to
ramdisk. These will includer timer, gpio, i2c drivers.
After this basic set, we will proceed with a more comprehensive set
of drivers for the 281XX SoC family.

v2 patch mods
--------
 - Remove l2x0_of_init call as there were problems with the code.
   A separate patch will be submitted with cache init code
 - Rename capri files and refs to bcm281xx-based names
 - Add bcm281xx binding doc
 - various misc cleanups

v3 patch mods
-------------
 - Remove extra #include lines
 - Remove remaining references to capri
 - dt uart chipset string added
 - cleaned up chip # references

v4 patch mods
-------------
 - swap order of compatible definitions for uart
 - fix typo

v5 patch mods
-------------
 - Rename bcm281xx to bcm11351 in dts+code,
   leaving references to bcm281xx only in help+comments.

v6 patch mods
-------------
 - fix typo in uart 'compatible' string

Signed-off-by: Christian Daudt <csd@broadcom.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2012-11-19 22:39:07 -08:00