Encoding the cpu family name apparently confuses people when they try to
boot an image on a sub-variant, so encode the specific cpu name and the
silicon rev instead.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This is useful for quick tests where networks are faster than compression,
and/or the compression code is broken.
Reported-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Rather than use "Linux" in the boot image name (as this is redundant --
the image type is already set to "linux"), use the CPU name. This makes
it fairly obvious when a wrong image is accidentally booted. Otherwise
there is no kernel output and you waste time scratching your head
wondering wtf just happened.
Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Since U-Boot can support these compression types, add appropriate targets
to the Blackfin boot files.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Convert a few echos in the build system to new $(kecho) so we get correct
output according to build verbosity.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
[sam: added kecho in a few more places for O=... builds]
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
