7 Commits

Author	SHA1	Message	Date
Jolly Shah	e23d9c6d0d	drivers: soc: xilinx: Add ZynqMP power domain driver ... The zynqmp-genpd driver communicates the usage requirements for logical power domains / devices to the platform FW. FW is responsible for choosing appropriate power states, taking Linux' usage information into account. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>	2019-02-12 13:38:16 +01:00
Rajan Vaja	ab272643d7	drivers: soc: xilinx: Add ZynqMP PM driver ... Add ZynqMP PM driver. PM driver provides power management support for ZynqMP. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>	2019-02-12 13:36:24 +01:00
Michal Simek	056b54eeae	soc: xilinx: Fix Kconfig alignment ... Tabs should be used for alignment instead of spaces. Signed-off-by: Michal Simek <michal.simek@xilinx.com>	2018-01-16 15:50:21 +01:00
Gustavo A. R. Silva	2a7157b137	soc: xilinx: xlnx_vcu: Use bitwise & rather than logical && on clkoutdiv ... Currently clkoutdiv is being operated on by a logical && operator rather than a bitwise & operator. This looks incorrect as these should be bit flag operations. Addresses-Coverity-ID: 1463959 ("Logical vs. bitwise operator") Fixes: cee8113a29 ("soc: xilinx: xlnx_vcu: Add Xilinx ZYNQMP VCU logicoreIP init driver") Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com> Acked-by: Dhaval Shah <dshah@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>	2018-01-16 15:50:20 +01:00
Dhaval Shah	0501506122	soc: xilinx: xlnx_vcu: Depends on HAS_IOMEM for xlnx_vcu ... xlnx_vcu driver uses devm_ioremap_nocache, which is included only when HAS_IOMEM is enabled. drivers/soc/xilinx/xlnx_vcu.o: In function `xvcu_probe': xlnx_vcu.c:(.text+0x116): undefined reference to `devm_ioremap_nocache' xlnx_vcu.c:(.text+0x1ae): undefined reference to `devm_ioremap_nocache' Signed-off-by: Dhaval Shah <dshah@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>	2018-01-16 08:34:30 +01:00
Dhaval Shah	cee8113a29	soc: xilinx: xlnx_vcu: Add Xilinx ZYNQMP VCU logicoreIP init driver ... Xilinx ZYNQMP logicoreIP Init driver is based on the new LogiCoreIP design created. This driver provides the processing system and programmable logic isolation. Set the frequency based on the clock information get from the logicoreIP register set. Signed-off-by: Dhaval Shah <dshah@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>	2018-01-08 13:42:47 +01:00
Michal Simek	5abcdc206f	soc: xilinx: Create folder structure for soc specific drivers ... Create directory structure with Makefile/Kconfig for adding xilinx soc specific drivers. Signed-off-by: Michal Simek <michal.simek@xilinx.com>	2018-01-08 13:42:39 +01:00